ent purpose in a later change.
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Wei Liu
CC: Roger Pau Monné
CC: Stefano Stabellini
CC: Julien Grall
CC: George Dunlap
CC: Edwin Török
CC: Christian Lindig
CC: Pau Ruiz Safont
---
xen/common/schedule.c | 32 ++--
On 10/05/2019 19:28, Andrew Cooper wrote:
> By rearranging the logic, the timer allocation loop can reuse the common timer
> arming/clearing logic. This results in easier to follow code, and a modest
> reduction in compiled code size (-64, 290 => 226).
>
> For domains which
On 13/05/2019 14:47, Jan Beulich wrote:
On 10.05.19 at 20:28, wrote:
>> --- a/xen/common/schedule.c
>> +++ b/xen/common/schedule.c
>> @@ -1050,6 +1050,8 @@ static void domain_watchdog_timeout(void *data)
>>
>> static long domain_watchdog(struct domain *d, uint32_t id, uint32_t timeout)
>>
On 13/05/2019 16:01, Jan Beulich wrote:
On 10.05.19 at 20:28, wrote:
>> All modifications to the watchdog_inuse_map happen with d->watchdog_lock
>> held,
>> so there are no concurrency problems to deal with.
> But concurrency problems can also occur for readers. While
> not a problem afaict,
On 14/05/2019 10:23, Wei Liu wrote:
> On Tue, May 14, 2019 at 10:55:18AM +0200, Roger Pau Monné wrote:
>> On Mon, May 13, 2019 at 04:28:12PM +0100, Wei Liu wrote:
>>> On Mon, May 13, 2019 at 05:20:05PM +0200, Roger Pau Monné wrote:
On Mon, May 13, 2019 at 04:53:21PM +0200, Olaf Hering wrote:
>
On 14/05/2019 08:07, Jan Beulich wrote:
On 02.05.19 at 16:51, wrote:
> On 05.04.19 at 09:01, wrote:
>>> Signed-off-by: Jan Beulich
>>>
>>> --- a/xen/drivers/passthrough/amd/iommu_intr.c
>>> +++ b/xen/drivers/passthrough/amd/iommu_intr.c
>>> @@ -503,7 +503,7 @@ static struct amd_iommu *_
On 14/05/2019 13:03, Jan Beulich wrote:
> Luckily the function currently has no callers - it would have called
> through NULL for both Arm and x86/AMD.
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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On 15/05/2019 10:47, Wei Liu wrote:
> On Tue, May 14, 2019 at 08:43:25AM +, Eslam Elnikety wrote:
>> Each HVM guest currently gets a vkbd frontend/backend pair (c/s ebbd2561b4c).
>> This consumes host resources unnecessarily for guests that have no use for
>> vkbd. Make this behaviour tunable t
On 15/05/2019 10:44, Roger Pau Monné wrote:
> On Wed, May 15, 2019 at 02:44:07AM -0600, Jan Beulich wrote:
>> Log information likely relevant for understanding why the BUG()s were
> Why not use panic instead of printk + BUG?
Because the backtrace is useful a lot of the time.
~Andrew
On 15/05/2019 09:44, Jan Beulich wrote:
> Log information likely relevant for understanding why the BUG()s were
> triggering.
>
> Requested-by: Andrew Cooper
> Signed-off-by: Jan Beulich
Reviewed-by: Andrew Cooper
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On 15/05/2019 11:09, Roger Pau Monné wrote:
> On Wed, May 15, 2019 at 10:59:20AM +0100, Andrew Cooper wrote:
>> On 15/05/2019 10:44, Roger Pau Monné wrote:
>>> On Wed, May 15, 2019 at 02:44:07AM -0600, Jan Beulich wrote:
>>>> Log information likely relevant for und
On 15/05/2019 09:23, Jan Beulich wrote:
> Their pre-AVX512 incarnations have clearly been overlooked during much
> earlier work. Their memory access pattern is entirely standard, so no
> specific tests get added to the harness.
>
> Reported-by: Razvan Cojocaru
> Signed-off-by: Jan Beulich
>
> ---
introduced with MMX, then
> promoted with SSE2 and again with AVX and AVX2.
Oh - terribly sorry - I was reading the adjacent instruction in the manual.
Sorry for the noise.
Reviewed-by: Andrew Cooper
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On 15/05/2019 12:40, Anthony PERARD wrote:
> This was probably useful to load ELF Note, but now ELF notes
> "should live in a PT_NOTE segment" (elfnote.h).
>
> With notes living in segment, there are no need for sections, so there
> is nothing to be stored in the shstrtab.
>
> This patch would allo
On 15/05/2019 20:58, Julien Grall wrote:
> Hi all,
>
> It looks like the structures vcpu_guest_core_regs and
> vcpu_guest_context does not correctly reflect the AArch64 state. For
> instance, all Arm64 system registers (e.g sctlr, cpsr, spsr_el1)
> should be 64-bit wide not 32-bit wide.
>
> On ARMv
On 16/05/2019 03:46, wencongyang (A) wrote:
> Hi all
>
> Fill buffers, load ports are shared between threads on the same physical core.
> We need to run more than one vm on the same physical core.
> Is there any complete mitigation for environments utilizing SMT?
No - not really.
An approach whic
On 16/05/2019 08:56, wencongyang (A) wrote:
>
> On 2019/5/16 15:38, Andrew Cooper wrote:
>> On 16/05/2019 03:46, wencongyang (A) wrote:
>>> Hi all
>>>
>>> Fill buffers, load ports are shared between threads on the same physical
>>> core.
>>
On 16/05/2019 08:58, Jan Beulich wrote:
On 15.05.19 at 22:12, wrote:
>> On 15/05/2019 20:58, Julien Grall wrote:
>>> Hi all,
>>>
>>> It looks like the structures vcpu_guest_core_regs and
>>> vcpu_guest_context does not correctly reflect the AArch64 state. For
>>> instance, all Arm64 system re
; $@
>> So we need to tell the top Makefile to filter out libfdt.
>>
>> Reported-by: Viktor Mitin
>> Signed-off-by: Julien Grall
>> Tested-by: Viktor Mitin
> Reviewed-by: Wei Liu
>
> Although I would like to ask you to adjust the subject to be more
> specific:
>
On 16/05/2019 12:48, wencongyang (A) wrote:
>
> On 2019/5/16 15:58, Andrew Cooper wrote:
>> On 16/05/2019 08:56, wencongyang (A) wrote:
>>> On 2019/5/16 15:38, Andrew Cooper wrote:
>>>> On 16/05/2019 03:46, wencongyang (A) wrote:
>>>>> Hi all
>>
On 16/05/2019 14:23, Wei Liu wrote:
> On Wed, May 15, 2019 at 01:55:30PM +0100, Anthony PERARD wrote:
>> On Wed, May 15, 2019 at 01:07:03PM +0100, Andrew Cooper wrote:
>>> On 15/05/2019 12:40, Anthony PERARD wrote:
>>>> This was probably useful to load ELF Note, but n
On 16/05/2019 14:50, Alexander Graf wrote:
> On 14.05.19 08:16, Filippo Sironi wrote:
>> Start populating /sys/hypervisor with KVM entries when we're running on
>> KVM. This is to replicate functionality that's available when we're
>> running on Xen.
>>
>> Start with /sys/hypervisor/uuid, which use
On 26/04/2019 13:02, Andrew Cooper wrote:
> On 26/04/2019 12:59, Andrew Cooper wrote:
>> On 18/03/2019 16:13, Jan Beulich wrote:
>>> All,
>>>
>>> the release is due by the end of the month, but will likely don't make
>>> it before early April
On 16/05/2019 16:20, Jan Beulich wrote:
>>>> On 16.05.19 at 17:11, wrote:
>> On 26/04/2019 13:02, Andrew Cooper wrote:
>>> On 26/04/2019 12:59, Andrew Cooper wrote:
>>>> On 18/03/2019 16:13, Jan Beulich wrote:
>>>>> All,
>>>>&
On 16/05/2019 17:17, Ian Jackson wrote:
> Andrew Cooper writes ("Re: [Xen-devel] preparations for 4.11.2"):
>> In addition,
> Thanks.
>
> wanting discussion:
>
>> 365aabb6e502 "tools/libxendevicemodel: add
>> xendevicemodel_modified_memory
ktor Mitin
Sent: 17 May 2019 12:56
To: Andrew Cooper; Ian Campbell; xen-devel@lists.xenproject.org
Cc: Volodymyr Babchuk
Subject: Re: libxc: memory leak in handle_hvm_context
There is no memory leak in case when handle_hvm_context function is
called next time.
So the code seems ok, please ignore
f the comparison).
~Andrew
From: Viktor Mitin
Sent: 17 May 2019 12:25
To: Juergen Gross; Andrew Cooper; Wei Liu; xen-devel@lists.xenproject.org
Cc: Volodymyr Babchuk
Subject: libxc: Casting of xen virtual address type xen_vaddr_t to signed int64
type: (in
for now.
>
> Reported-by: Andrew Cooper
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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re based on the full AVX512
> emulator series, but shouldn't be overly difficult to re-base
> ahead of it.
To follow up on the IRC conversations which occurred because of my email
problems...
> 1: x86/CPUID: support leaf 7 subleaf 1 / AVX512_BF16
Reviewed-by: Andrew Cooper
ore make it have
> AVX512BW instead of AVX512F as a prerequisite, for requiring full
> 64-bit mask registers (the upper 48 bits of which can't be accessed
> other than through XSAVE/XRSTOR without AVX512BW support).
>
> Signed-off-by: Jan Beulich
As for the rest, Acked-by: And
On 15/03/2019 10:43, Jan Beulich wrote:
> Also include vshuff{32x4,64x2} as being very similar to vshufi{32x4,64x2}.
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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lich
Acked-by: Andrew Cooper
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On 15/03/2019 10:43, Jan Beulich wrote:
> Test various of the insns which have been implemented already.
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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On 15/03/2019 10:44, Jan Beulich wrote:
> Test various of the insns which have been implemented already.
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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They are both Airmont-based and should have been included in c/s 17f74242ccf
"x86/spec-ctrl: Extend repoline safey calcuations for eIBRS and Atom parts".
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Wei Liu
CC: Roger Pau Monné
---
xen/arch/x86/spec_ctrl.c | 2 ++
1 file
Reflow the ZynqMP message for grepability, and fix the omission of a newline.
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Wei Liu
CC: Roger Pau Monné
CC: Stefano Stabellini
CC: Julien Grall
---
xen/arch/arm/cpuerrata.c | 18 ++
xen/arch/arm/platforms
processors
(XEN) ACPI: X2APIC (apic_id[0x119] uid[0x119] enabled)
(XEN) ACPI: X2APIC (apic_id[0x11d] uid[0x11d] enabled)
(XEN) ACPI: X2APIC (apic_id[0x121] uid[0x121] enabled)
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Wei Liu
CC: Roger Pau Monné
---
xen/arch/x86/mpparse.c | 9
ffc0)
Nothing has ever cared about xen_build_init()'s return value, so convert it to
void rather than include errno.h into the !BUILD_ID case of version.h
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Wei Liu
CC: Roger Pau Monné
CC: Stefano Stabellini
CC: Julien Grall
---
xen/c
On 20/05/2019 10:14, Roger Pau Monné wrote:
>
>> diff --git a/tools/libxl/libxl_mem.c b/tools/libxl/libxl_mem.c
>> index 448a2af8fd..fe1f9c2ff8 100644
>> --- a/tools/libxl/libxl_mem.c
>> +++ b/tools/libxl/libxl_mem.c
>> @@ -457,6 +457,24 @@ int libxl_domain_need_memory(libxl_ctx *ctx,
>> libxl
On 20/05/2019 10:17, Viktor Mitin wrote:
>>> Mean that result of "(int64_t)vaddr >> 63" can be 0 or 1.
>>> So the next code may not work properly in case of another 'implementations'.
>>> With another compiler (i.e. clang, etc) this code may introduce bugs
>>> which are hard to find.
>>>
>>> ((int6
On 20/05/2019 10:37, Viktor Mitin wrote:
> On Mon, May 20, 2019 at 12:22 PM Andrew Cooper
> wrote:
>> On 20/05/2019 10:17, Viktor Mitin wrote:
>>>>> Mean that result of "(int64_t)vaddr >> 63" can be 0 or 1.
>>>>> So the next code may no
specification (i.e. with up to
date microcode) no longer have this feature, and therefore are not using it.
Drop support from Xen. The main motivation here is to remove unnecessary
complexity from CPUID handling, but it also tidies up the SVM code nicely.
Signed-off-by: Andrew Cooper
---
CC: Jan
This started out as just patch 3, trying to clean up the remains of the
pv-l1tf debugging, and expanded a little upon reading the surrounding code.
Andrew Cooper (4):
x86/pv: Fix error handling in dom0_construct_pv()
x86/boot: Rename dom0_{pvh,verbose} variables to have an opt_ prefix
x86
We currently have an asymmetric setup where CONFIG_VERBOSE_DEBUG controls
extra diagnostics for a PV dom0, and opt_dom0_verbose controls extra
diagnostics for a PVH dom0.
Default opt_dom0_verbose to CONFIG_VERBOSE_DEBUG and use opt_dom0_verbose
consistently.
Signed-off-by: Andrew Cooper
---
CC
() doesn't like the state it finds.
Reuse the pv_l1tf tasklet for convenience, which will switch dom0 into shadow
mode just before it starts executing.
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Wei Liu
CC: Roger Pau Monné
---
docs/misc/xen-command-line.pandoc | 14 +-
xen
For consistency with other command line options.
No functional change.
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Wei Liu
CC: Roger Pau Monné
---
xen/arch/x86/dom0_build.c | 12 ++--
xen/arch/x86/hvm/dom0_build.c | 2 +-
xen/arch/x86/setup.c | 2 +-
xen
different elf_check_broken()
clauses.
As the elf_check_broken() is just a warning and doesn't influence the further
boot, fold the exit paths together and use a single clause.
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Wei Liu
CC: Roger Pau Monné
---
xen/arch/x86/pv/dom0_build.c
On 19/05/2019 19:46, Eitan Kaplan wrote:
> Hi all,
>
> I am a computer engineering student at Columbia University. This is my
> first time writing to this list (please let me know if this isn't the
> place for this type of question!).
This is indeed the correct place for this kind of question.
>
On 19/05/2019 19:46, Eitan Kaplan wrote:
> Hi all,
>
> I am a computer engineering student at Columbia University. This is my
> first time writing to this list (please let me know if this isn't the
> place for this type of question!).
(Apologies for the repost - I accidentally dropped the CC list
we maintain in the main codebase.
>
>>> Furthermore make it have
>>> AVX512BW instead of AVX512F as a prerequisite, for requiring full
>>> 64-bit mask registers (the upper 48 bits of which can't be accessed
>>> other than through XSAVE/XRSTOR without
t), but it's necessary for
> VUNPCK* as their table entries use simd_other, which is necessary
> because of the memory access pattern of PUNPCKL*. In fact the
> PUNPCKH* entries could equally well use simd_packed_int, but
> that would then call for their case labels to get mov
om Xen. The main motivation here is to remove unnecessary
>> complexity from CPUID handling, but it also tidies up the SVM code nicely.
>>
>> Signed-off-by: Andrew Cooper
> Reviewed-by: Jan Beulich
Thanks.
>
>> --- a/xen/include/public/arch-x86/cpufeatureset.h
>&
Note however that this doesn't make #MC any safer for fully offline
> CPUs.
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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ad of leaf 1 is required - just that a CPUID instruction is required.
Using leaf 0 results in better code generation, following the write of 0 to
MSR_IA32_UCODE_REV.
Suggested-by: Jan Beulich
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Wei Liu
CC: Roger Pau Monné
---
xe
On 15/03/2019 10:44, Jan Beulich wrote:
> No explicit test harness additions other than the overrides, as the
> compiler already makes use of the insns.
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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additions other than the overrides, as the
> compiler already makes use of the insns.
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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On 15/03/2019 10:46, Jan Beulich wrote:
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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On 15/03/2019 10:46, Jan Beulich wrote:
> No further test harness additions - what is there is good enough for
> these rather "regular" insns.
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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On 15/03/2019 10:47, Jan Beulich wrote:
> @@ -9312,7 +9386,8 @@ x86_emulate(
>
> if ( ea.type == OP_MEM )
> {
> -rc = ops->write(ea.mem.seg, ea.mem.off, mmvalp, 8 << vex.l,
> ctxt);
> +rc = ops->write(ea.mem.seg, truncate_ea(ea.mem.off + first_byte),
> +
byte_table[] entries are benign to
> pre-existing code, but allow decode_disp8scale() to work as is here.
>
> The at this point wrong placement of the 0xe6 case block is once again
> in anticipation of further additions of case labels.
>
> Sig
ucting the stub.
>
> Slightly adjust the scalar to_int() in the test harness, to increase the
> chances of the operand ending up in memory.
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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On 15/03/2019 10:52, Jan Beulich wrote:
> VCVT{,T}PS2QQ, sharing their main opcodes with others, once again need
> "manual" overrides of disp8scale.
>
> While not directly related here, also add a scalar variant of to_wint()
> to the test harness.
>
> Signed-off-by:
so available.
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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).
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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On 15/03/2019 10:54, Jan Beulich wrote:
> Plus their AVX512BW counterparts.
>
> Take the opportunity and also eliminate a pair of open coded instances
> of scalar_1op().
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
___
On 15/03/2019 10:54, Jan Beulich wrote:
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -435,7 +435,10 @@ static const struct ext0f38_table {
> disp8scale_t d8s:4;
> } ext0f38_table[256] = {
> [0x00] = { .simd_size = simd_packed_int, .d8
On 21/05/2019 15:29, Julien Grall wrote:
> Commit 03957f58db "xen/const: Extend the existing macro BIT to take a
> suffix in parameter" didn't convert all the callers of the macro BIT.
>
> This will result to a build breakage when enabling Livepatch on arm64.
>
f preempt_count()
> in non-debug builds enabling further optimizations.
>
> Signed-off-by: Juergen Gross
Reviewed-by: Andrew Cooper
This code has never been used and is obviously not doing anything useful.
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are both
the same change, and it would reduce the churn.
Reviewed-by: Andrew Cooper , ideally with the
two folded into one.
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ilds.
>>>
>>> Signed-off-by: Juergen Gross
>> I'd be tempted to fold patches 2 and 3 together, because they are both
>> the same change, and it would reduce the churn.
>>
>> Reviewed-by: Andrew Cooper , ideally with the
>> two folded into one.
> I
mostly due to no longer writing out 64 leaves for xstate when (on
this CoffeeLake system) 8 will do.
Extend the unit tests to cover empty and partially filled subleaf unions.
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Wei Liu
CC: Roger Pau Monné
---
tools/tests/cpu-policy
This also introduced the top-level Guest Documentation section.
Signed-off-by: Andrew Cooper
---
CC: George Dunlap
CC: Ian Jackson
CC: Jan Beulich
CC: Konrad Rzeszutek Wilk
CC: Stefano Stabellini
CC: Tim Deegan
CC: Wei Liu
CC: Julien Grall
The rendered version can be viewed at:
https
n the each function to avoid needing extra local
variables, and to write the page in one single pass.
No functional change.
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Wei Liu
CC: Roger Pau Monné
CC: Jun Nakajima
CC: Kevin Tian
CC: Boris Ostrovsky
CC: Suravee Suthikulpanit
CC: B
For the rendered result (along with some other in-progress documentation),
see:
https://andrewcoop-xen.readthedocs.io/en/docs-devel/guest-guide/hypercall-abi.html
Andrew Cooper (2):
x86: init_hypercall_page() cleanup
docs: Introduce some hypercall page documentation
docs/guest-guide
This avoids opencoding the slightly-awkward logic. More uses of these
wrappers will be introduced shortly.
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Wei Liu
CC: Roger Pau Monné
I've decided to introduce this patch ahead of "[PATCH] libx86: Elide more
empty CPUID l
tly due to no longer writing out 64 leaves for xstate when (on
>> this CoffeeLake system) 8 will do.
>>
>> Extend the unit tests to cover empty and partially filled subleaf unions.
>>
>> Signed-off-by: Andrew Cooper
> For the lib/x86/ part
> Reviewed-by: Jan Beulich
On 23/05/2019 11:56, Jan Beulich wrote:
>>>> On 23.05.19 at 12:20, wrote:
>> This also introduced the top-level Guest Documentation section.
>>
>> Signed-off-by: Andrew Cooper
> Large parts of this are entirely x86-centric, yet hypercalls exist
> for Arm as
On 23/05/2019 12:52, Jan Beulich wrote:
On 23.05.19 at 12:27, wrote:
>> --- a/xen/arch/x86/xstate.c
>> +++ b/xen/arch/x86/xstate.c
>> @@ -660,9 +660,7 @@ static bool valid_xcr0(u64 xcr0)
>> int validate_xstate(const struct domain *d, uint64_t xcr0, uint64_t
>> xcr0_accum,
>>
On 23/05/2019 12:41, Jan Beulich wrote:
>>>> On 23.05.19 at 13:01, wrote:
>> On 23/05/2019 11:56, Jan Beulich wrote:
>>>>>> On 23.05.19 at 12:20, wrote:
>>>> This also introduced the top-level Guest Documentation section.
>>>>
&g
> | ^
>>
>> Simply drop these attributes. Take the liberty and also re-format the
>> structure definitions at the same time.
>>
>> Reported-by: Charles Arnold
>> Signed-off-by: Jan Beulich
> Reviewe
ot support fault suppression (as that's an
> AVX512 feature), and hence no such adjustment was needed
> here before.
Ah - what I hadn't spotted was that this is the special case for
vcvtps2ph, so this change is fine in context.
Acked-by: Andrew Cooper
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On 15/03/2019 10:54, Jan Beulich wrote:
> Signed-off-by: Jan Beulich
With the identified issue fixed, Acked-by: Andrew Cooper
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(without AVX512VL in the picture).
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
Seeing as I have some ER hardware, is there an easy way to get
GCC/binutils to emit a weird L'L field, or will this involve some manual
opcode generation to test?
~Andrew
___
On 10/05/2019 17:10, Roger Pau Monne wrote:
> This avoids code duplication between the helpers.
>
> No functional change intended.
>
> Signed-off-by: Roger Pau Monné
-1. I see this as actively making the code worse, not an improvement.
~Andrew
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Xe
t; ---
> Cc: Jan Beulich
> Cc: Andrew Cooper
> Cc: Wei Liu
> Cc: George Dunlap
> Cc: Ian Jackson
> Cc: Julien Grall
> Cc: Konrad Rzeszutek Wilk
> Cc: Stefano Stabellini
> Cc: Tim Deegan
> Cc: Suravee Suthikulpanit
> Cc: Brian Woods
> Cc: Kevin Tia
On 24/05/2019 11:36, Jan Beulich wrote:
On 10.05.19 at 18:10, wrote:
>> The new format specifier is '%pp', and prints a pci_sbdf_t using the
>> seg:bus:dev.func format. Replace all SBDFs printed using
>> '%04x:%02x:%02x.%u' to use the new format specifier.
> So on the positive side Linux does
On 24/05/2019 09:39, Jan Beulich wrote:
On 24.05.19 at 10:34, wrote:
>> On 24/05/2019 08:38, Jan Beulich wrote:
>> On 24.05.19 at 07:41, wrote:
On 22/05/2019 12:10, Jan Beulich wrote:
On 22.05.19 at 11:45, wrote:
>> --- a/xen/arch/x86/hvm/hvm.c
>> +++ b/xen/arch/x8
more in line with how hardware has involved, and
> how other projects like gcc and binutils connect things together.
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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gain for all of the
> involved functions.
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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cpu-polcy, adjust the equivelent logic from
x86_emulator on which this was based. Printing:
Test harness not built, use newer compiler than "gcc"
isn't helpful for anyone unexpectedly encountering the error.
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Wei Liu
CC: Roge
ilt, use newer compiler than "gcc"
>>
>> isn't helpful for anyone unexpectedly encountering the error.
>>
>> Signed-off-by: Andrew Cooper
> Fundamentally
> Reviewed-by: Jan Beulich
> But there are remarks:
>
>> --- a/tools/tests/cpu-polic
This causes objdump to disassemble them, rather than rendering them as
straight hex data.
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Wei Liu
CC: Roger Pau Monné
---
tools/tests/x86_emulator/Makefile | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/tests
; locked/unlocked gfns when it didn't need to.
>
> Signed-off-by: Tamas K Lengyel
Reviewed-by: Andrew Cooper
Sorry - this fell off my radar. I've got a separate series which
partially overlaps with this.
If George is happy with both, I'll see about taking this and
rebasing
EVEX.L'L is 3 for AVX512ER scalar insns is done
>>> to be on the safe side. The SDM does not clarify behavior there, and
>>> it's even more ambiguous here (without AVX512VL in the picture).
>>>
>>> Signed-off-by: Jan Beulich
>> Acked-by: Andrew Coope
On 28/05/2019 14:44, Tamas K Lengyel wrote:
>> * Improvements to domain creation (v2)
>> - Andrew Cooper
> Hi Andrew,
> could you point me to a git branch where you have this work? I'm
> experimenting with some stuff and would like to see what your work in
>
On 28/05/2019 13:33, Mathieu Tarral wrote:
> Hi Andrew,
>
>>> The bug is still here, so we can exclude a microcode issue.
>> Good - that is one further angle excluded. Always make sure you are
>> running with up-to-date microcode, but it looks like we back to
>> investigating a logical bug in libv
On 29/05/2019 02:34, Tamas K Lengyel wrote:
>> And some questions.
>>
>> 1) I'm guessing the drakvuf_inject_trap(drakvuf, 0x293e6a0, 0) call is
>> specific to the exact windows kernel in use?
>>
>> 2) In vmi_init(), what is the purpose of fmask and zero_page_gfn? You add
>> one extra gfn to the
This also introduced the top-level Guest Documentation section.
Signed-off-by: Andrew Cooper
---
CC: George Dunlap
CC: Ian Jackson
CC: Jan Beulich
CC: Konrad Rzeszutek Wilk
CC: Stefano Stabellini
CC: Tim Deegan
CC: Wei Liu
CC: Julien Grall
v2:
* Drop AT&T ligatures
* Move into an
Drop introduced trailing whitespace, excessively long lines, mal-indention,
superfluous use of PRI macros for int-or-smaller types, and incorrect PRI
macros for gfns and mfns.
Signed-off-by: Andrew Cooper
---
CC: George Dunlap
CC: Tamas K Lengyel
CC: Jan Beulich
CC: Wei Liu
CC: Roger Pau
On 29/05/2019 05:23, Andrew Cooper wrote:
> Drop introduced trailing whitespace, excessively long lines, mal-indention,
> superfluous use of PRI macros for int-or-smaller types, and incorrect PRI
> macros for gfns and mfns.
>
> Signed-off-by: Andrew Cooper
> ---
> CC: George
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