On Mon, Mar 10, 2025 at 06:30:15PM +, Andrew Cooper wrote:
> On 10/03/2025 6:16 pm, Roger Pau Monne wrote:
> > Always store xen/.config as an artifact, renamed to xen-config to match
> > the naming used in the Gitlab CI tests.
> >
> > Reported-by: Andrew Cooper
> > Signed-off-by: Roger Pau Mon
On 2025-03-10 04:21, Jan Beulich wrote:
On 10.03.2025 09:17, Juergen Gross wrote:
On 10.03.25 09:01, Jan Beulich wrote:
On 06.03.2025 23:03, Jason Andryuk wrote:
+shared_entry_v1(gt, idx).flags = flags;
+shared_entry_v1(gt, idx).domid = be_domid;
+shared_entry_v1(gt, idx).frame = f
From: Denis Mukhin
Add new CONRING_SHIFT Kconfig parameter to specify the boot console buffer size
as a power of 2.
The supported range is [14..27] -> [16KiB..128MiB].
Set default to 15 (32 KiB).
Resolves: https://gitlab.com/xen-project/xen/-/issues/185
Signed-off-by: Denis Mukhin
---
Changes
On 11/3/25 05:08, Pierrick Bouvier wrote:
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Missing the "why" justification we couldn't do that before.
---
include/exec/memory-internal.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/exec/memory-internal.h b/in
On 11/3/25 05:08, Pierrick Bouvier wrote:
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Missing the "why" justification we couldn't do that before.
---
include/exec/exec-all.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-
From: Denis Mukhin
'Resolves:' tag may be used if the patch addresses one of the tickets
logged via Gitlab to auto-close such ticket when the patch got merged.
Add documentation for the tag.
Signed-off-by: Denis Mukhin
---
docs/process/sending-patches.pandoc | 12
1 file changed,
On 11/3/25 05:08, Pierrick Bouvier wrote:
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
I didn't follow this direction because Richard had a preference
on removing unnecessary inlined functions:
https://lore.kernel.org/qemu-devel/9151205a-13d3-401e-b403-f9195cdb1...@linaro.or
In docs/misc/xenstore.txt all Xenstore commands are specified, but
the specifications lack the numerical values of the commands.
Add a table with all commands, their values, and a potential remark
(e.g. whether the command is optional).
Reported-by: Jan Beulich
Signed-off-by: Juergen Gross
---
On Tuesday, March 11th, 2025 at 12:28 AM, dm...@proton.me
wrote:
>
>
> From: Denis Mukhin dmuk...@ford.com
>
>
> 'Resolves:' tag may be used if the patch addresses one of the tickets
> logged via Gitlab to auto-close such ticket when the patch got merged.
>
> Add documentation for the tag.
On 10.03.2025 16:42, Roger Pau Monné wrote:
> On Mon, Mar 10, 2025 at 11:51:09AM +0100, Jan Beulich wrote:
>> On 10.03.2025 10:55, Roger Pau Monne wrote:
>>> Attempt to reduce the MSI entry writes, and the associated checking whether
>>> memory decoding and MSI-X is enabled for the PCI device, when
On 10.03.25 23:22, Kees Cook wrote:
When a character array without a terminating NUL character has a static
initializer, GCC 15's -Wunterminated-string-initialization will only
warn if the array lacks the "nonstring" attribute[1]. Mark the arrays
with __nonstring to and correctly identify the cha
On 10.03.2025 15:11, Jason Andryuk wrote:
> On 2025-03-10 05:03, Jan Beulich wrote:
>> On 06.03.2025 23:03, Jason Andryuk wrote:
>>> --- a/xen/include/public/domctl.h
>>> +++ b/xen/include/public/domctl.h
>>> @@ -155,6 +155,12 @@ struct xen_domctl_getdomaininfo {
>>> /* domain has hardware assist
On Tue Mar 11, 2025 at 8:30 AM GMT, Jan Beulich wrote:
> On 10.03.2025 16:25, Alejandro Vallejo wrote:
> > Commit cefeffc7e583 marked ACPI tables as NVS in the hvmloader path
> > because SeaBIOS may otherwise just mark it as RAM. There is, however,
> > yet another reason to do it even in the PVH pa
Hi Michal,
> On 11 Mar 2025, at 10:04, Michal Orzel wrote:
>
> At the moment, we print a warning about max number of IRQs supported by
> GIC bigger than vGIC only for hardware domain. This check is not hwdom
> special, and should be made common. Also, in case of user not specifying
> nr_spis for
Hi Jan,
> On 11 Mar 2025, at 09:35, Jan Beulich wrote:
>
> On 10.03.2025 15:50, Bertrand Marquis wrote:
>> --- a/docs/misc/xen-command-line.pandoc
>> +++ b/docs/misc/xen-command-line.pandoc
>> @@ -2651,6 +2651,20 @@ Specify the per-cpu trace buffer size in pages.
>>
>> Flag to enable TSC deadli
Hi Juergen,
On 04/02/2025 11:34, Juergen Gross wrote:
In order to close a race window for Xenstore live update when using
the new unique_id of domains, the migration stream needs to contain
this unique_id for each domain known by Xenstore.
Signed-off-by: Juergen Gross
---
V8:
- new patch
---
This series adds support for R-Car Gen4 PCI host controller.
To fully support the controller, the following changes were made:
- Generic mechanism to support PCI child buses is added.
- Private data for PCI host bridge and means to access it are added.
The series also includes a workaround for pr
From: Oleksandr Andrushchenko
Add support for Renesas R-Car Gen4 PCI host controller, specifically
targeting the S4 and V4H SoCs. The implementation includes configuration
read/write operations for both root and child buses. For accessing the
child bus, iATU is used for address translation.
Code
On 3/5/25 10:11 AM, Mykola Kvach wrote:
Signed-off-by: Mykola Kvach
---
CHANGELOG.md | 2 ++
1 file changed, 2 insertions(+)
diff --git a/CHANGELOG.md b/CHANGELOG.md
index 04c21d5bce..489404fc8b 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -7,6 +7,8 @@ The format is based on [Keep a
Chan
From: Volodymyr Babchuk
There are high chances that there will be a number of a consecutive
accesses to configuration space of one device. To speed things up,
we can program ATU only during first access.
This is mostly beneficial taking into account the previous patch that
adds 1ms delay after A
On 11.03.25 10:35, Julien Grall wrote:
Hi Juergen,
On 04/02/2025 11:33, Juergen Gross wrote:
Today Xen will happily allow binding a global virq by a domain which
isn't configured to receive it. This won't result in any bad actions,
but the bind will appear to have succeeded with no event ever b
From: Oleksii Moisieiev
This patch introduces SCI driver to support for ARM EL3 Trusted Firmware-A
(TF-A) which provides SCMI interface with multi-agnet support, as shown
below.
+-+
| |
| EL3 TF-A SCMI
Hi Juergen,
On 04/02/2025 11:33, Juergen Gross wrote:
Today Xen will happily allow binding a global virq by a domain which
isn't configured to receive it. This won't result in any bad actions,
but the bind will appear to have succeeded with no event ever being
received by that event channel.
In
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
buffer size. Align the pitch to a multiple of 8.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_gem_shmem_helper.c | 16 +---
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/d
Dumb-buffer pitch and size is specified by width, height, bits-per-pixel
plus various hardware-specific alignments. The calculation of these
values is inconsistent and duplicated among drivers. The results for
formats with bpp < 8 are sometimes incorrect.
This series fixes this for most drivers. D
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
buffer size. Align the pitch to a multiple of 128.
The hibmc driver's new hibmc_dumb_create() is similar to the one
in GEM VRAM helpers. The driver was the only caller of
drm_gem_vram_fill_create_dumb(). Remove the now unused help
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch
and buffer size. No alignment required.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Zack Rusin
Cc: Zack Rusin
Cc: Broadcom internal kernel review list
---
drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | 21 -
1 fi
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch
and buffer size. Align the pitch to a multiple of 8.
Signed-off-by: Thomas Zimmermann
Cc: Oleksandr Andrushchenko
---
drivers/gpu/drm/xen/xen_drm_front.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/dr
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
buffer size. Align the pitch to a multiple of 8.
Push the current calculation into the only direct caller imx. Imx's
hardware requires the framebuffer width to be aligned to 8. The
driver's current approach is actually incorrect,
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch
and buffer size. Alignment is specified in bytes, but the hardware
requires the scanline pitch to be a multiple of 32 pixels. Therefore
compute the byte size of 32 pixels in the given color mode and align
the pitch accordingly. This re
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
buffer size. The hardware requires the framebuffer width to be a
multiple of 8. The scanline pitch has be large enough to support
this. Therefore compute the byte size of 8 pixels in the given color
mode and align the pitch accordi
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
buffer size. Align the pitch to a multiple of 64.
Signed-off-by: Thomas Zimmermann
Acked-by: Heiko Stuebner
Cc: Sandy Huang
Cc: "Heiko Stübner"
Cc: Andy Yan
---
drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 12 ++--
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
buffer size. Align the pitch to a multiple of 8.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Tomi Valkeinen
Cc: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/omap_gem.c | 15 +++
1 file changed, 7 insertions(+), 8 d
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
buffer size. Align the pitch according to hardware requirements.
Signed-off-by: Thomas Zimmermann
Cc: Biju Das
---
drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
buffer size. Align the pitch according to hardware requirements.
Signed-off-by: Thomas Zimmermann
Acked-by: Thierry Reding
Cc: Thierry Reding
Cc: Mikko Perttunen
---
drivers/gpu/drm/tegra/gem.c | 8 +---
1 file changed, 5
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
buffer size. Align the pitch according to hardware requirements.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Sui Jingfeng
Cc: Sui Jingfeng
---
drivers/gpu/drm/loongson/lsdc_gem.c | 29 -
1 file ch
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
buffer size. Inline code from drm_gem_vram_fill_create_dumb() without
the existing size computation. Align the pitch to a multiple of 8.
Only hibmc and vboxvideo use gem-vram. Hibmc invokes the call to
drm_gem_vram_fill_create_dum
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch
and buffer size. Align the pitch to a multiple of 8. Align the
buffer size according to hardware requirements.
Xe's internal calculation allowed for 64-bit wide buffer sizes, but
the ioctl's internal checks always verified against 32-
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
buffer size. Align the pitch to a multiple of 256.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Lyude Paul
Cc: Karol Herbst
Cc: Lyude Paul
Cc: Danilo Krummrich
---
drivers/gpu/drm/nouveau/nouveau_display.c | 7 ---
1 fi
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
buffer size. Align the pitch to a multiple of 8.
Signed-off-by: Thomas Zimmermann
Cc: Chun-Kuang Hu
Cc: Philipp Zabel
Cc: Matthias Brugger
Cc: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_gem.c | 13 --
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
buffer size. No alignment required.
Signed-off-by: Thomas Zimmermann
Cc: Inki Dae
Cc: Seung-Woo Kim
Cc: Kyungmin Park
Cc: Krzysztof Kozlowski
Cc: Alim Akhtar
---
drivers/gpu/drm/exynos/exynos_drm_gem.c | 8 +---
1 file
On 3/11/25 4:48 PM, Jan Beulich wrote:
On 11.03.2025 16:45, Oleksii Kurochko wrote:
--- a/xen/arch/riscv/arch.mk
+++ b/xen/arch/riscv/arch.mk
@@ -9,7 +9,8 @@ riscv-abi-$(CONFIG_RISCV_64) := -mabi=lp64
riscv-march-$(CONFIG_RISCV_64) := rv64
riscv-march-y += ima
riscv-march-$(CONFIG_RISCV_I
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
buffer size. Align the pitch to a multiple of 128.
v4:
- align pitch to 128 bytes (Russell)
Signed-off-by: Thomas Zimmermann
Cc: Russell King
---
drivers/gpu/drm/armada/armada_gem.c | 16 +++-
1 file changed, 7 ins
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch
and buffer size. No alignment required.
Signed-off-by: Thomas Zimmermann
Cc: Dave Airlie
Cc: Gerd Hoffmann
---
drivers/gpu/drm/qxl/qxl_dumb.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/dr
On 11.03.2025 16:45, Oleksii Kurochko wrote:
> --- a/xen/arch/riscv/arch.mk
> +++ b/xen/arch/riscv/arch.mk
> @@ -9,7 +9,8 @@ riscv-abi-$(CONFIG_RISCV_64) := -mabi=lp64
> riscv-march-$(CONFIG_RISCV_64) := rv64
> riscv-march-y += ima
> riscv-march-$(CONFIG_RISCV_ISA_C) += c
> -riscv-march-y += _zi
On 11.03.2025 13:06, Roger Pau Monne wrote:
> --- a/xen/arch/x86/hvm/vmx/vmx.c
> +++ b/xen/arch/x86/hvm/vmx/vmx.c
> @@ -396,6 +396,13 @@ static int cf_check vmx_pi_update_irte(const struct vcpu
> *v,
> const struct pi_desc *pi_desc = v ? &v->arch.hvm.vmx.pi_desc : NULL;
> struct irq_desc
On Tue, Mar 11, 2025 at 02:53:04PM +, Alejandro Vallejo wrote:
> On Tue Mar 11, 2025 at 12:46 PM GMT, Roger Pau Monné wrote:
> > On Tue, Mar 04, 2025 at 11:10:00AM +, Alejandro Vallejo wrote:
> > > The logic has too many levels of indirection and it's very hard to
> > > understand it its cu
H provides additional instructions and CSRs that control the new stage of
address translation and support hosting a guest OS in virtual S-mode
(VS-mode).
According to the Unprivileged Architecture (version 20240411) specification:
```
Table 74 summarizes the standardized extension names. The table
On 11.03.2025 16:27, Roger Pau Monne wrote:
> The current usage of msi_desc->msg in vmx_pi_update_irte() will make the
> field contain a translated MSI message, instead of the expected
> untranslated one. This breaks dump_msi(), that use the data in
> msi_desc->msg to print the interrupt details.
On 11.03.2025 12:16, Grygorii Strashko wrote:
> --- a/xen/include/public/domctl.h
> +++ b/xen/include/public/domctl.h
> @@ -1223,6 +1223,13 @@ struct xen_domctl_vmtrace_op {
> #define XEN_DOMCTL_vmtrace_get_option 5
> #define XEN_DOMCTL_vmtrace_set_option 6
> };
> +
> +/* XEN_DOM
> On 11 Mar 2025, at 14:33, Orzel, Michal wrote:
>
>
>
> On 11/03/2025 14:26, Bertrand Marquis wrote:
>>
>>
>> Hi Michal,
>>
>>> On 11 Mar 2025, at 12:06, Orzel, Michal wrote:
>>>
>>>
>>>
>>> On 11/03/2025 11:12, Bertrand Marquis wrote:
> On 11 Mar 2025, at 10:59, Orze
On 11/03/2025 14:26, Bertrand Marquis wrote:
>
>
> Hi Michal,
>
>> On 11 Mar 2025, at 12:06, Orzel, Michal wrote:
>>
>>
>>
>> On 11/03/2025 11:12, Bertrand Marquis wrote:
>>>
>>>
On 11 Mar 2025, at 10:59, Orzel, Michal wrote:
On 11/03/2025 10:30, Bertrand Marquis wr
On Tue Mar 11, 2025 at 12:46 PM GMT, Roger Pau Monné wrote:
> On Tue, Mar 04, 2025 at 11:10:00AM +, Alejandro Vallejo wrote:
> > The logic has too many levels of indirection and it's very hard to
> > understand it its current form. Split it between the corner case where
> > the adjustment is bi
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
buffer size. Align the pitch to a multiple of 4.
Signed-off-by: Thomas Zimmermann
Cc: David Airlie
Cc: Gerd Hoffmann
Cc: Gurchetan Singh
Cc: Chia-I Wu
---
drivers/gpu/drm/virtio/virtgpu_gem.c | 11 +--
1 file changed
The ioctls MODE_CREATE_DUMB and MODE_MAP_DUMB return results into a
memory buffer supplied by user space. On errors, it is possible that
intermediate values are being returned. The exact semantics depends
on the DRM driver's implementation of these ioctls. Although this is
most-likely not a securit
we'll use it in system/memory.c.
Signed-off-by: Pierrick Bouvier
---
include/exec/memory.h | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 60c0fb6ccd4..57661283684 100644
--- a/include/exec/memory.h
+++ b
On 11.03.25 10:21, Julien Grall wrote:
Hi Juergen,
On 11/03/2025 07:31, Juergen Gross wrote:
In docs/misc/xenstore.txt all Xenstore commands are specified, but
the specifications lack the numerical values of the commands.
Add a table with all commands, their values, and a potential remark
(e.g
On 11.03.2025 11:27, Sergiy Kibrik wrote:
> From: Stefano Stabellini
>
> Extend coverage of CONFIG_VM_EVENT option and make the build of VM events
> and monitoring support optional. Also make MEM_PAGING option depend on
> VM_EVENT
> to document that mem_paging is relying on vm_event.
> This is t
Hi Juergen,
On 11/03/2025 07:31, Juergen Gross wrote:
In docs/misc/xenstore.txt all Xenstore commands are specified, but
the specifications lack the numerical values of the commands.
Add a table with all commands, their values, and a potential remark
(e.g. whether the command is optional).
Rep
Attempt to reduce the MSI entry writes, and the associated checking whether
memory decoding and MSI-X is enabled for the PCI device, when the MSI data
hasn't changed.
When using Interrupt Remapping the MSI entry will contain an index into
the remapping table, and it's in such remapping table where
On Tue, Mar 11, 2025 at 8:01 AM Jan Beulich wrote:
>
> On 11.03.2025 11:23, Sergiy Kibrik wrote:
> > --- a/xen/common/Kconfig
> > +++ b/xen/common/Kconfig
> > @@ -92,7 +92,7 @@ config HAS_VMAP
> > config MEM_ACCESS_ALWAYS_ON
> > bool
> >
> > -config MEM_ACCESS
> > +config VM_EVENT
> >
11.03.25 14:01, Jan Beulich:
On 11.03.2025 11:23, Sergiy Kibrik wrote:
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -92,7 +92,7 @@ config HAS_VMAP
config MEM_ACCESS_ALWAYS_ON
bool
-config MEM_ACCESS
+config VM_EVENT
def_bool MEM_ACCESS_ALWAYS_ON
prompt "Memo
On Tue, Mar 11, 2025 at 7:59 AM Jan Beulich wrote:
>
> On 11.03.2025 11:27, Sergiy Kibrik wrote:
> > From: Stefano Stabellini
> >
> > Extend coverage of CONFIG_VM_EVENT option and make the build of VM events
> > and monitoring support optional. Also make MEM_PAGING option depend on
> > VM_EVENT
On 11.03.25 12:24, Mykyta Poturai wrote:
From: Oleksandr Andrushchenko
Some of the PCI host bridges require private data. Create a generic
approach for that, so such bridges may request the private data to
be allocated during initialization.
Signed-off-by: Oleksandr Andrushchenko
Signed-of
On 3/10/25 21:08, Pierrick Bouvier wrote:
They are now accessible through exec/memory.h instead, and we make sure
all variants are available for common or target dependent code.
Signed-off-by: Pierrick Bouvier
---
include/exec/cpu-all.h | 12
include/exec/memory_ldst.h.i
On 3/11/25 00:26, Philippe Mathieu-Daudé wrote:
On 11/3/25 05:08, Pierrick Bouvier wrote:
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Missing the "why" justification we couldn't do that before.
---
include/exec/memory-internal.h | 2 --
1 file changed, 2 deletions(-
On 11.03.2025 15:21, Andrew Cooper wrote:
> On 26/02/2025 8:44 am, Jan Beulich wrote:
>> On 26.02.2025 08:44, Jan Beulich wrote:
>>> On 25.02.2025 23:45, Andrew Cooper wrote:
A CALL with 0 displacement is handled specially, and is why this logic
functions even with CET Shadow Stacks activ
On 3/11/25 00:26, Philippe Mathieu-Daudé wrote:
On 11/3/25 05:08, Pierrick Bouvier wrote:
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Missing the "why" justification we couldn't do that before.
---
include/exec/exec-all.h | 1 -
1 file changed, 1 deletion(-)
diff -
On 3/11/25 00:36, Philippe Mathieu-Daudé wrote:
On 11/3/25 05:08, Pierrick Bouvier wrote:
we'll use it in system/memory.c.
Having part of the commit description separated in its subject is a
bit annoying. But then I'm probably using 20-years too old tools in
my patch workflow.
Only used in sy
On 3/11/25 00:29, Philippe Mathieu-Daudé wrote:
On 11/3/25 05:08, Pierrick Bouvier wrote:
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
I didn't follow this direction because Richard had a preference
on removing unnecessary inlined functions:
https://lore.kernel.org/qemu-dev
On 3/11/25 00:36, Philippe Mathieu-Daudé wrote:
On 11/3/25 05:08, Pierrick Bouvier wrote:
we'll use it in system/memory.c.
Having part of the commit description separated in its subject is a
bit annoying. But then I'm probably using 20-years too old tools in
my patch workflow.
Can you please
On 2/17/25 3:49 AM, Volodymyr Babchuk wrote:
Stack protector is meant to be enabled on all architectures, but
currently it is tested (and enabled) only on ARM, so mention it in ARM
section.
Signed-off-by: Volodymyr Babchuk
---
TODO: If this patch will not make into 4.20 - rework it by menti
Consume the return code from hvm_pi_update_irte(), and propagate the error
back to the caller if hvm_pi_update_irte() fails.
Fixes: 35a1caf8b6b5 ('pass-through: update IRTE according to guest interrupt
config changes')
Signed-off-by: Roger Pau Monné
---
Changes since v3:
- New in this version.
On 10.03.25 15:32, Jason Andryuk wrote:
On 2025-03-08 02:02, Jürgen Groß wrote:
On 06.03.25 23:03, Jason Andryuk wrote:
With split hardware and control domains, each domain should be
privileged with respect to xenstore. When adding domains to xenstore,
look at their privilege and add them to
From: Oleksandr Andrushchenko
Some of the PCI host bridges require private data. Create a generic
approach for that, so such bridges may request the private data to
be allocated during initialization.
Signed-off-by: Oleksandr Andrushchenko
Signed-off-by: Mykyta Poturai
---
v1->v2:
* no change
From: Stefano Stabellini
Extend coverage of CONFIG_VM_EVENT option and make the build of VM events
and monitoring support optional. Also make MEM_PAGING option depend on VM_EVENT
to document that mem_paging is relying on vm_event.
This is to reduce code size on Arm when this option isn't enabled.
Commit cefeffc7e583 marked ACPI tables as NVS in the hvmloader path
because SeaBIOS may otherwise just mark it as RAM. There is, however,
yet another reason to do it even in the PVH path. Xen's incarnation of
AML relies on having access to some ACPI tables (e.g: _STA of Processor
objects relies on
Replace more general CONFIG_HVM option with CONFIG_VM_EVENT which is more
relevant and specific to monitoring. This is only to clarify at build level
to which subsystem this file belongs.
No functional change here, as VM_EVENT depends on HVM.
Acked-by: Jan Beulich
Signed-off-by: Sergiy Kibrik
-
On 11.03.2025 12:16, Grygorii Strashko wrote:
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -526,6 +526,12 @@ S: Supported
> F: xen/arch/arm/include/asm/tee/
> F: xen/arch/arm/tee/
>
> +SCI MEDIATORS
> +M: Oleksii Moisieiev
> +S: Supported
> +F: xen/arch/arm/sci
> +F: xen/incl
On 10.03.2025 15:53, Roger Pau Monné wrote:
> On Wed, Feb 26, 2025 at 12:52:27PM +0100, Jan Beulich wrote:
>> Handling of both grants and foreign pages was different between the two
>> paths.
>>
>> While permitting access to grants would be desirable, doing so would
>> require more involved handlin
On 10.03.2025 15:50, Bertrand Marquis wrote:
> --- a/docs/misc/xen-command-line.pandoc
> +++ b/docs/misc/xen-command-line.pandoc
> @@ -2651,6 +2651,20 @@ Specify the per-cpu trace buffer size in pages.
>
> Flag to enable TSC deadline as the APIC timer mode.
>
> +### tee
> +> `= `
This wants a
Hello,
Patches 1 and 2 are new bugfixes in this version. Patch 3 is still
mostly as v3, just with the extra logic to ensure vmx_pi_update_irte()
correctness.
Thanks, Roger.
Roger Pau Monne (3):
x86/vmx: fix posted interrupts usage of msi_desc->msg field
x86/hvm: check return code of hvm_pi_
On Tue, Mar 04, 2025 at 11:10:00AM +, Alejandro Vallejo wrote:
> The logic has too many levels of indirection and it's very hard to
> understand it its current form. Split it between the corner case where
> the adjustment is bigger than the current claim and the rest to avoid 5
> auxiliary vari
From: Oleksandr Andrushchenko
PCI host bridges often have different ways to access the root and child
bus configuration spaces. One of the examples is Designware's host bridge
and its multiple clones [1].
Linux kernel implements this by instantiating a child bus when device
drivers provide not o
On Tue, Mar 11, 2025 at 08:35:35AM +0100, Jan Beulich wrote:
> On 10.03.2025 16:42, Roger Pau Monné wrote:
> > On Mon, Mar 10, 2025 at 11:51:09AM +0100, Jan Beulich wrote:
> >> On 10.03.2025 10:55, Roger Pau Monne wrote:
> >>> Attempt to reduce the MSI entry writes, and the associated checking
> >
> On 11 Mar 2025, at 10:59, Orzel, Michal wrote:
>
>
>
> On 11/03/2025 10:30, Bertrand Marquis wrote:
>>
>>
>> Hi Michal,
>>
>>> On 11 Mar 2025, at 10:04, Michal Orzel wrote:
>>>
>>> At the moment, we print a warning about max number of IRQs supported by
>>> GIC bigger than vGIC only fo
The MMIO_CONF_BASE reports the base of the MCFG range on AMD systems.
Linux pre-6.14 is unconditionally attempting to read the MSR without a
safe MSR accessor, and since Xen doesn't allow access to it Linux reports
the following error:
unchecked MSR access error: RDMSR from 0xc0010058 at rIP: 0xff
On 11.03.2025 13:22, Roger Pau Monne wrote:
> The MMIO_CONF_BASE reports the base of the MCFG range on AMD systems.
> Linux pre-6.14 is unconditionally attempting to read the MSR without a
> safe MSR accessor, and since Xen doesn't allow access to it Linux reports
> the following error:
>
> unchec
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
include/exec/exec-all.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index dd5c40f2233..19b0eda44a7 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -20
Use more generic CONFIG_VM_EVENT name throughout Xen code instead of
CONFIG_MEM_ACCESS. This reflects the fact that vm_event is a higher level
feature, with mem_access & monitor depending on it.
CC: Jan Beulich
Suggested-by: Tamas K Lengyel
Acked-by: Tamas K Lengyel
Signed-off-by: Sergiy Kibrik
From: Volodymyr Babchuk
For some reason, we need a delay before accessing ATU region after
we programmed it. Otherwise, we'll get erroneous TLP.
There is a code below, which should do this in proper way, by polling
CTRL2 register, but according to documentation, hardware does not
change this ATU
From: Volodymyr Babchuk
According to ATU documentation, bits [18:16] of accessed memory
address correspond to a function number. This is somewhat similar to
ECAM, but with huge holes between regions.
We can use this to minimize number of ATU re-programmings: configure
ATU to access BDF with F=0
From: Oleksandr Andrushchenko
Some of the PCI host bridges require additional processing during the
probe phase. For that they need to access struct bridge of the probed
host, so return pointer to the new bridge from pci_host_common_probe.
Signed-off-by: Oleksandr Andrushchenko
Signed-off-by: M
Currently, the uboot-script-gen does not account for reserved memory
regions in the device tree. This oversight can lead to scenarios where
one or more boot modules overlap with a reserved region. As a result,
Xen will always crash upon detecting this overlap. However, the crash
will be silent (wit
The introduced SCI (System Control Interface) subsystem provides unified
interface to integrate in Xen SCI drivers which adds support for ARM
firmware (EL3, SCP) based software interfaces (like SCMI) that are used in
system management. The SCI subsystem allows to add drivers for different FW
interf
Hi,
This is respin of RFCv2 series from Oleksii Moisieiev [1] which was send pretty
long time ago (2022),
with the main intention is to resume this discussion in public and gather more
opinions.
Hence the code was previously sent long time ago there are pretty high number
of changes,
including
From: Oleksii Moisieiev
libxenhypfs will return blob properties as is. This output can be used
to retrieve information from the hypfs. Caller is responsible for
parsing property value.
Signed-off-by: Oleksii Moisieiev
Reviewed-by: Volodymyr Babchuk
---
tools/libs/hypfs/core.c | 2 --
1 file c
On Tue, Mar 11, 2025 at 09:44:18AM +0100, Jan Beulich wrote:
> On 10.03.2025 15:53, Roger Pau Monné wrote:
> > On Wed, Feb 26, 2025 at 12:52:27PM +0100, Jan Beulich wrote:
> >> Handling of both grants and foreign pages was different between the two
> >> paths.
> >>
> >> While permitting access to g
At the moment, we print a warning about max number of IRQs supported by
GIC bigger than vGIC only for hardware domain. This check is not hwdom
special, and should be made common. Also, in case of user not specifying
nr_spis for dom0less domUs, we should take into account max number of
IRQs supporte
Refer:
https://lore.kernel.org/xen-devel/20250306220343.203047-6-jason.andr...@amd.com/T/#mc15ab00940d5964b18b3d6092869dae6f85af1dc
Michal Orzel (2):
xen/arm: Improve handling of nr_spis
tools/arm: Reject configuration with incorrect nr_spis value
docs/man/xl.cfg.5.pod.in| 13 +--
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