On 28/06/2023 20:21, Julien Grall wrote:
>
>
> Hi,
>
> On 26/06/2023 12:28, Michal Orzel wrote:
>> On 25/06/2023 22:49, Julien Grall wrote:
>>> From: Julien Grall
>>>
>>> At the moment, we are mapping the size of the reserved area for Xen
>>> (i.e. 2MB) even if the binary is smaller. We don't
flight 181632 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/181632/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-armhf-armhf-libvirt-qcow2 15 saverestore-support-check fail like 181607
test-amd64-amd64-xl-qemut-win7-amd64
On 28/06/2023 22:02, Julien Grall wrote:
>
>
> Hi,
>
> On 26/06/2023 12:43, Michal Orzel wrote:
>>
>>
>> On 25/06/2023 22:49, Julien Grall wrote:
>>>
>>>
>>> From: Julien Grall
>>>
>>> At the moment, the maximum size of Xen binary we can support is 2MB.
>>> This is what we reserved in the vi
On 28/06/2023 22:39, Julien Grall wrote:
>
>
> On 27/06/2023 09:09, Michal Orzel wrote:
>> Hi Julien,
>>
>> On 26/06/2023 14:56, Julien Grall wrote:
>>>
>>>
>>> Hi,
>>>
>>> On 26/06/2023 12:56, Michal Orzel wrote:
On 25/06/2023 22:49, Julien Grall wrote:
>
>
> From:
flight 181633 linux-linus real [real]
http://logs.test-lab.xenproject.org/osstest/logs/181633/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-qemuu-nested-amd 11 leak-check/basis(11) fail REGR. vs. 180278
test-amd64-amd64-x
Hi Stefano,
> On 21 Jun 2023, at 03:26, Stefano Stabellini wrote:
>
> From: Stefano Stabellini
>
> Signed-off-by: Stefano Stabellini
Reviewed-by: Bertrand Marquis
Cheers
Bertrand
> ---
> docs/misra/rules.rst | 16
> 1 file changed, 16 insertions(+)
>
> diff --git a/docs/m
On 20.06.23 13:24, Julien Grall wrote:
Hi Juergen,
On 30/05/2023 10:13, Juergen Gross wrote:
diff --git a/tools/xenstore/xenstored_core.h b/tools/xenstore/xenstored_core.h
index f7cb035f26..7fc6d73e5a 100644
--- a/tools/xenstore/xenstored_core.h
+++ b/tools/xenstore/xenstored_core.h
@@ -358,11
On 20.06.23 14:20, Julien Grall wrote:
Hi Juergen,
On 30/05/2023 10:13, Juergen Gross wrote:
@@ -395,18 +393,18 @@ static int finalize_transaction(struct connection *conn,
while ((i = list_top(&trans->accessed, struct accessed_node, list))) {
if (i->ta_node) {
- set_t
Here are my notes from memory, organized by topic (and somehow enriched
with more details in places)
# context
Guest-management stacks typically need the guest to communicate some
information back. This essentially happens through Xenstore and some of
it has been normalized in the Xen docs.
S
Hi all,
This patch series is about the violations present in the Xen sources of
Rule 3.1 from MISRA C:2012, whose headline states:
"The character sequences '/*' and '//' shall not be used within a comment".
In the context of the effort to bring xen into compliance w.r.t.
MISRA C:2012, and Rule 3.
In the file `xen/drivers/passthrough/arm/smmu-v3.c' there are a few occurrences
of nested '//' character sequences inside C-style comment blocks, which violate
Rule 3.1.
The patch aims to resolve those by replacing the nested comments with
equivalent constructs that do not violate the rule.
Signe
In the files `xen/arch/arm/include/asm/arm(32|64)/flushtlb.h' there are a
few occurrences of nested '//' character sequences inside C-style comment
blocks, which violate Rule 3.1. The patch aims to resolve those by changing
the inner comments to arm asm comments, delimited by ';' instead.
Signed-o
In the files modified by this patch there are a few occurrences of nested '//'
character sequences inside C-style comment blocks, which violate Rule 3.1.
The patch aims to resolve those by removing the nested comments.
In the file 'xen/common/xmalloc_tlsf.c' the comment has been replaces by
an ASS
On 20.06.23 14:28, Julien Grall wrote:
Hi Juergen,
On 30/05/2023 10:13, Juergen Gross wrote:
Add a wrapper function for tdb_fetch taking the name of the node in
the data base as a parameter. Let it return a data pointer and the
length of the data via a length pointer provided as additional
para
On 20.06.23 15:03, Julien Grall wrote:
Hi Juergen,
One more remark as I was reviewing patch #10.
On 30/05/2023 10:13, Juergen Gross wrote:
Add a wrapper function for tdb_fetch taking the name of the node in
the data base as a parameter. Let it return a data pointer and the
length of the data v
Hi Juergen,
On 29/06/2023 10:29, Juergen Gross wrote:
On 20.06.23 13:24, Julien Grall wrote:
Hi Juergen,
On 30/05/2023 10:13, Juergen Gross wrote:
diff --git a/tools/xenstore/xenstored_core.h
b/tools/xenstore/xenstored_core.h
index f7cb035f26..7fc6d73e5a 100644
--- a/tools/xenstore/xenstored
On 29.06.23 12:21, Julien Grall wrote:
Hi Juergen,
On 29/06/2023 10:29, Juergen Gross wrote:
On 20.06.23 13:24, Julien Grall wrote:
Hi Juergen,
On 30/05/2023 10:13, Juergen Gross wrote:
diff --git a/tools/xenstore/xenstored_core.h b/tools/xenstore/xenstored_core.h
index f7cb035f26..7fc6d73e5
Fixes: 21e3ef57e040 ("x86: Rename {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy
fields")
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Roger Pau Monné
CC: Wei Liu
---
xen/include/public/sysctl.h | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/xen/includ
On 20.06.23 14:43, Julien Grall wrote:
Hi Juergen,
On 30/05/2023 10:13, Juergen Gross wrote:
For an effective way to replace a hashtable entry add a new function
hashtable_replace().
While at it let hashtable_add() fail if an entry with the specified
key does already exist.
Please explain wh
On Thu, Jun 29, 2023 at 11:26:00AM +0100, Andrew Cooper wrote:
> Fixes: 21e3ef57e040 ("x86: Rename
> {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy fields")
> Signed-off-by: Andrew Cooper
Reviewed-by: Roger Pau Monné
Thanks.
On 28/06/2023 14:42, Julien Grall wrote:
Hi Ayan,
Hi Julien,
On 28/06/2023 14:22, Ayan Kumar Halder wrote:
On 28/06/2023 12:17, Julien Grall wrote:
Hi,
Hi Julien,
On 28/06/2023 11:55, Ayan Kumar Halder wrote:
On 26/06/2023 04:34, Penny Zheng wrote:
CAUTION: This message has originated
On 20.06.23 15:09, Julien Grall wrote:
Hi Juergen,
On 30/05/2023 10:13, Juergen Gross wrote:
Today all Xenstore nodes are stored in a TDB data base. This data base
has several disadvantages:
- it is using a fixed sized hash table, resulting in high memory
overhead for small installations wi
Hi Ayan,
On 29/06/2023 12:21, Ayan Kumar Halder wrote:
On 28/06/2023 14:42, Julien Grall wrote:
What's the guarantee that the compiler will not generate any
instructions that could generate an alignment fault?
I thought by writing in assembly, we tell the compiler what instructions
to gener
v3:
* Fixed a Gitlab CI breakage on older toolchains (patch 1)
* Removed XD_DISABLE override logic from cpu/intel.c
* Various style fixes to patch 2 (from Andrew's feedback)
This option hardens Xen by forcing it to write secure (NX-enhanced) PTEs
regardless of the runtime NX feature bit in b
This option hardens Xen by forcing it to write secure (NX-enhanced) PTEs
regardless of the runtime NX feature bit in boot_cpu_data. This prevents an
attacker with partial write support from affecting Xen's PTE generation
logic by overriding the NX feature flag. The patch asserts support for the
NX
Currently libxl and the x86-emulator tests carry their own versions. Factor
those out into the common macros header so every library can make use of
it. This is required so the following patch can add this macro to a header
used both in Xen and tools/libs.
No functional change.
Signed-off-by: Ale
Intel CPUs have a bit in MSR_IA32_MISC_ENABLE that may prevent the NX bit
from being advertised. Clear it unconditionally if we can't find the NX
feature right away on boot.
The conditions for the MSR being read on early boot are (in this order):
* Long Mode is supported
* NX isn't advertised
* T
Hi,
On 29/06/2023 08:26, Michal Orzel wrote:
On 28/06/2023 20:21, Julien Grall wrote:
Hi,
On 26/06/2023 12:28, Michal Orzel wrote:
On 25/06/2023 22:49, Julien Grall wrote:
From: Julien Grall
At the moment, we are mapping the size of the reserved area for Xen
(i.e. 2MB) even if the binary
Hello guys,
Be careful. Futher on will be long read...
Still continue to fight. What I found out ?
I built xen with cache coloring for Xilinx zyncmp.
In xen we are enabled harware encryption for some necessities.
Actually there one only change in xen/arch/arm/platforms/xilinx-eemi.c
at bool xilin
flight 181635 libvirt real [real]
flight 181640 libvirt real-retest [real]
http://logs.test-lab.xenproject.org/osstest/logs/181635/
http://logs.test-lab.xenproject.org/osstest/logs/181640/
Failures :-/ but no regressions.
Tests which are failing intermittently (not blocking):
test-amd64-i386-lib
Hi Penny,
On 26/06/2023 04:34, Penny Zheng wrote:
CAUTION: This message has originated from an External Source. Please use proper
judgment and caution when opening attachments, clicking links, or responding to
this email.
Function setup_pagetables is responsible for boot-time pagetable setup
On 26/06/2023 04:34, Penny Zheng wrote:
CAUTION: This message has originated from an External Source. Please use proper
judgment and caution when opening attachments, clicking links, or responding to
this email.
virt_to_maddr and maddr_to_virt are used widely in Xen code. So
even there is n
On 29/06/2023 3:20 pm, Ayan Kumar Halder wrote:
> On 26/06/2023 04:34, Penny Zheng wrote:
>> diff --git a/xen/arch/arm/include/asm/mm.h
>> b/xen/arch/arm/include/asm/mm.h
>> index eb520b49e3..ea4847c12b 100644
>> --- a/xen/arch/arm/include/asm/mm.h
>> +++ b/xen/arch/arm/include/asm/mm.h
>> @@ -292,
Hi,
On 29/06/2023 15:05, Ayan Kumar Halder wrote:
On 26/06/2023 04:34, Penny Zheng wrote:
CAUTION: This message has originated from an External Source. Please
use proper judgment and caution when opening attachments, clicking
links, or responding to this email.
Function setup_pagetables is
> On 29 Jun 2023, at 11:06, Nicola Vetrini wrote:
>
> In the files `xen/arch/arm/include/asm/arm(32|64)/flushtlb.h' there are a
> few occurrences of nested '//' character sequences inside C-style comment
> blocks, which violate Rule 3.1. The patch aims to resolve those by changing
> the inner c
On 29/06/2023 11:33 am, Roger Pau Monné wrote:
> On Thu, Jun 29, 2023 at 11:26:00AM +0100, Andrew Cooper wrote:
>> Fixes: 21e3ef57e040 ("x86: Rename
>> {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy fields")
>> Signed-off-by: Andrew Cooper
> Reviewed-by: Roger Pau Monné
Thanks, but I've just not
On 29/06/2023 15:23, Andrew Cooper wrote:
On 29/06/2023 3:20 pm, Ayan Kumar Halder wrote:
On 26/06/2023 04:34, Penny Zheng wrote:
diff --git a/xen/arch/arm/include/asm/mm.h
b/xen/arch/arm/include/asm/mm.h
index eb520b49e3..ea4847c12b 100644
--- a/xen/arch/arm/include/asm/mm.h
+++ b/xen/arch/a
On 29/06/23 16:41, Luca Fancellu wrote:
On 29 Jun 2023, at 11:06, Nicola Vetrini wrote:
In the files `xen/arch/arm/include/asm/arm(32|64)/flushtlb.h' there are a
few occurrences of nested '//' character sequences inside C-style comment
blocks, which violate Rule 3.1. The patch aims to res
On 29/06/2023 15:29, Julien Grall wrote:
Hi,
On 29/06/2023 15:05, Ayan Kumar Halder wrote:
On 26/06/2023 04:34, Penny Zheng wrote:
CAUTION: This message has originated from an External Source. Please
use proper judgment and caution when opening attachments, clicking
links, or responding to
> On 29 Jun 2023, at 11:06, Nicola Vetrini wrote:
>
> In the file `xen/drivers/passthrough/arm/smmu-v3.c' there are a few
> occurrences
here you use a different character to enclose the file path (` vs ‘) may I
suggest to
use only (‘)?
> of nested '//' character sequences inside C-style com
On Fri, Jun 23, 2023 at 09:33:56AM +0200, Jan Beulich wrote:
> On 22.06.2023 19:42, Alejandro Vallejo wrote:
> > --- a/xen/arch/x86/cpu/microcode/core.c
> > +++ b/xen/arch/x86/cpu/microcode/core.c
> > @@ -885,5 +885,18 @@ int __init early_microcode_init(unsigned long
> > *module_map,
> > if (
> On 29 Jun 2023, at 11:06, Nicola Vetrini wrote:
>
> In the files modified by this patch there are a few occurrences of nested '//'
> character sequences inside C-style comment blocks, which violate Rule 3.1.
> The patch aims to resolve those by removing the nested comments.
>
> In the file '
Hi,
On 29/06/2023 15:44, Ayan Kumar Halder wrote:
On 29/06/2023 15:23, Andrew Cooper wrote:
On 29/06/2023 3:20 pm, Ayan Kumar Halder wrote:
On 26/06/2023 04:34, Penny Zheng wrote:
diff --git a/xen/arch/arm/include/asm/mm.h
b/xen/arch/arm/include/asm/mm.h
index eb520b49e3..ea4847c12b 100644
-
Move MSR_ARCH_CAPS read code from tsx_init() to early_cpu_init(). Because
microcode updates might make them that MSR to appear/have different values
we also must reload it after a microcode update in early_microcode_init().
Signed-off-by: Alejandro Vallejo
---
v5:
* Re-run early_cpu_init() after
microcode_update_one() currently assumes all microcode handlers are set or
none are. That won't be the case in a future patch, as apply_microcode()
may not be set while the others are. Hence, this patch allows reading the
microcode revision even if updating it is unavailable.
Signed-off-by: Alejan
If IA32_MSR_MCU_CONTROL exists then it's possible a CPU may be unable to
perform microcode updates. This is controlled through the DIS_MCU_LOAD bit
and is intended for baremetal clouds where the owner may not trust the
tenant to choose the microcode version in use. If we notice that bit being
set t
Under certain conditions a CPU may not be able to perform microcode updates
even if hardware exists to that effect. In particular:
* If Xen runs under certain hypervisors they won't allow microcode
updates, and will signal this fact by reporting a microcode revision of
-1.
* If the DIS_MCU
Some hypervisors report ~0 as the microcode revision to mean "don't issue
microcode updates". Ignore the microcode loading interface in that case.
Signed-off-by: Alejandro Vallejo
Reviewed-by: Jan Beulich
---
v5:
* Style fix. Brace position.
---
xen/arch/x86/cpu/microcode/core.c | 16
On Thu, Jun 29, 2023 at 1:17 PM Alejandro Vallejo <
alejandro.vall...@cloud.com> wrote:
> v3:
> * Fixed a Gitlab CI breakage on older toolchains (patch 1)
> * Removed XD_DISABLE override logic from cpu/intel.c
> * Various style fixes to patch 2 (from Andrew's feedback)
>
> This option harden
On Thu, Jun 29, 2023 at 1:17 PM Alejandro Vallejo <
alejandro.vall...@cloud.com> wrote:
> Currently libxl and the x86-emulator tests carry their own versions. Factor
> those out into the common macros header so every library can make use of
> it. This is required so the following patch can add thi
Xen 4.17 supports the creation of static evtchns. To allow user space
application to bind static evtchns introduce new ioctl
"IOCTL_EVTCHN_BIND_STATIC". Existing IOCTL doing more than binding
that’s why we need to introduce the new IOCTL to only bind the static
event channels.
Also, static evtchns
On Thu, Jun 29, 2023 at 1:17 PM Alejandro Vallejo <
alejandro.vall...@cloud.com> wrote:
> Intel CPUs have a bit in MSR_IA32_MISC_ENABLE that may prevent the NX bit
> from being advertised. Clear it unconditionally if we can't find the NX
> feature right away on boot.
>
> The conditions for the MSR
On Thu, Jun 29, 2023 at 1:17 PM Alejandro Vallejo <
alejandro.vall...@cloud.com> wrote:
> This option hardens Xen by forcing it to write secure (NX-enhanced) PTEs
> regardless of the runtime NX feature bit in boot_cpu_data. This prevents an
> attacker with partial write support from affecting Xen'
To comply with Rule 8.3 ("All declarations of an object or function
shall use the same names and type qualifiers") change the parameter
names in order to have function declarations consistent with the
corresponding definitions.
Federico Serafini (5):
x86: swap parameter names of hvm_copy_context
Change parameter names of nestedhvm_vcpu_iomap_get() definition to
those used in the function declaration in order to:
1) improve readability;
2) fix violations of MISRA C:2012 Rule 8.3.
Signed-off-by: Federico Serafini
---
xen/arch/x86/hvm/nestedhvm.c | 10 +-
1 file changed, 5 insertio
Swap parameter names 'src' and 'dst' of hvm_copy_context_and_params()
declaration for consistency with the corresponding definition and the
uses of such function.
Also, this fixes a violation of MISRA C:2012 Rule 8.3.
Signed-off-by: Federico Serafini
---
xen/arch/x86/include/asm/hvm/hvm.h | 2 +-
Change parameter names in guest_wrmsr_x2apic() and
guest_wrmsr_apic_base() definitions in order to:
1) keep consistency with parameter names used in guest_* function
declarations;
2) fix violations of MISRA C:2012 Rule 8.3.
Signed-off-by: Federico Serafini
---
xen/arch/x86/hvm/vlapic.c | 56 +
Change parameter name from 's' to 'state' in function definitions in
order to:
1) keep consistency with the parameter names used in the corresponding
declarations;
2) keep consistency with parameter names used within x86_emulate.h;
3) fix violations of MISRA C:2012 Rule 8.3.
Signed-off-by: Fede
Change the parameter names of function declarations to be consistent
with the names used in the corresponding function definitions
so as to fix violations of MISRA C:2012 Rule 8.3.
Signed-off-by: Federico Serafini
---
xen/arch/x86/cpu/mcheck/mce.h | 2 +-
xen/arch/x86/cpu/mcheck/x86_m
On 6/21/2023 4:14 AM, Robert Beckett wrote:
On 21/06/2023 09:39, Gerd Hoffmann wrote:
On Tue, Jun 20, 2023 at 01:26:15PM +0100, Robert Beckett wrote:
On 20/06/2023 10:41, Gerd Hoffmann wrote:
Hi,
The guest driver should be able to restore resources after resume.
Thank you for your su
This method - letting QEMU not remove resources would work on S3 case
but with S4, the QEMU would lose all the resources anyway as the process
will be terminated. So objects restoring was only option for us as
in [RFC PATCH 2/2] drm/virtio: restore virtio_gpu_objects upon suspend
and resume (l
flight 181636 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/181636/
Failures and problems with tests :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-xl-qemuu-debianhvm-amd64-shadowbroken
test-amd6
On 26/06/2023 04:34, Penny Zheng wrote:
CAUTION: This message has originated from an External Source. Please use proper
judgment and caution when opening attachments, clicking links, or responding to
this email.
In MPU system, MPU memory region is always mapped PAGE_ALIGN, so in order to
no
On 29.06.23 18:46, Rahul Singh wrote:
Hello Rahul
> Xen 4.17 supports the creation of static evtchns. To allow user space
> application to bind static evtchns introduce new ioctl
> "IOCTL_EVTCHN_BIND_STATIC". Existing IOCTL doing more than binding
> that’s why we need to introduce the new IOCT
On Thu, 29 Jun 2023, Luca Fancellu wrote:
> > On 29 Jun 2023, at 11:06, Nicola Vetrini wrote:
> >
> > In the files `xen/arch/arm/include/asm/arm(32|64)/flushtlb.h' there are a
> > few occurrences of nested '//' character sequences inside C-style comment
> > blocks, which violate Rule 3.1. The pat
On Thu, 29 Jun 2023, Luca Fancellu wrote:
> > On 29 Jun 2023, at 11:06, Nicola Vetrini wrote:
> >
> > In the file `xen/drivers/passthrough/arm/smmu-v3.c' there are a few
> > occurrences
>
> here you use a different character to enclose the file path (` vs ‘) may I
> suggest to
> use only (‘)?
On Thu, 29 Jun 2023, Luca Fancellu wrote:
> > On 29 Jun 2023, at 11:06, Nicola Vetrini wrote:
> >
> > In the files modified by this patch there are a few occurrences of nested
> > '//'
> > character sequences inside C-style comment blocks, which violate Rule 3.1.
> > The patch aims to resolve th
On Thu, 29 Jun 2023, Federico Serafini wrote:
> Swap parameter names 'src' and 'dst' of hvm_copy_context_and_params()
> declaration for consistency with the corresponding definition and the
> uses of such function.
> Also, this fixes a violation of MISRA C:2012 Rule 8.3.
>
> Signed-off-by: Federic
On Thu, 29 Jun 2023, Federico Serafini wrote:
> Change parameter names of nestedhvm_vcpu_iomap_get() definition to
> those used in the function declaration in order to:
> 1) improve readability;
> 2) fix violations of MISRA C:2012 Rule 8.3.
>
> Signed-off-by: Federico Serafini
Reviewed-by: Stefa
On Thu, 29 Jun 2023, Federico Serafini wrote:
> Change parameter names in guest_wrmsr_x2apic() and
> guest_wrmsr_apic_base() definitions in order to:
> 1) keep consistency with parameter names used in guest_* function
>declarations;
> 2) fix violations of MISRA C:2012 Rule 8.3.
>
> Signed-off-
On Thu, 29 Jun 2023, Federico Serafini wrote:
> Change parameter name from 's' to 'state' in function definitions in
> order to:
> 1) keep consistency with the parameter names used in the corresponding
>declarations;
> 2) keep consistency with parameter names used within x86_emulate.h;
> 3) fix
Hi,
On 29/06/2023 20:11, Stefano Stabellini wrote:
On Thu, 29 Jun 2023, Luca Fancellu wrote:
On 29 Jun 2023, at 11:06, Nicola Vetrini wrote:
In the files `xen/arch/arm/include/asm/arm(32|64)/flushtlb.h' there are a
few occurrences of nested '//' character sequences inside C-style comment
bloc
> On 29 Jun 2023, at 20:20, Stefano Stabellini wrote:
>
> On Thu, 29 Jun 2023, Luca Fancellu wrote:
>>> On 29 Jun 2023, at 11:06, Nicola Vetrini wrote:
>>>
>>> In the files modified by this patch there are a few occurrences of nested
>>> '//'
>>> character sequences inside C-style comment bl
On Thu, 29 Jun 2023, Federico Serafini wrote:
> Change the parameter names of function declarations to be consistent
> with the names used in the corresponding function definitions
> so as to fix violations of MISRA C:2012 Rule 8.3.
>
> Signed-off-by: Federico Serafini
> ---
> xen/arch/x86/cpu/m
On 29/06/2023 02:36, Henry Wang wrote:
Hi Julien,
Hi Henry,
-Original Message-
Subject: Re: [PATCH 8/9] xen/arm: Allow the user to build Xen with USBAN
On 26/06/2023 08:29, Henry Wang wrote:
Hi Julien,
Hi Henry,
Reviewed-by: Henry Wang
Thanks, I will fix both typos.
Great
From: Julien Grall
At the moment, we are mapping the size of the reserved area for Xen
(i.e. 2MB) even if the binary is smaller. We don't exactly know what's
after Xen, so it is not a good idea to map more than necessary for a
couple of reasons:
* We would need to use break-before-make if the
From: Julien Grall
Hi all,
At the moment, we are not able to enable UBSAN on Arm because the
final binary will be over the maximum size of Xen we currently support
(i.e. 2MB).
This patch series aim to lift the restrictions and also
enable UBSAN.
Cheers,
Julien Grall (4):
xen/arm64: head: Do
From: Julien Grall
UBSAN has been enabled a few years ago on x86 but was never
enabled on Arm because the final binary is bigger than 2MB (
the maximum we can currently handled).
With the recent rework, it is now possible to grow Xen over 2MB.
So there is no more roadblock to enable Xen other th
From: Julien Grall
At the moment, we are mapping the size of the reserved area for Xen
(i.e. 2MB) even if the binary is smaller. We don't exactly know what's
after Xen, so it is not a good idea to map more than necessary for a
couple of reasons:
* We would need to use break-before-make if the
From: Julien Grall
At the moment, the maximum size of Xen binary we can support is 2MB.
This is what we reserved in the virtual address but also what all
the code in Xen relies on as we only allocate one L3 page-table.
When feature like UBSAN (will be enabled in a follow-up patch) and GCOV
are e
flight 181637 linux-linus real [real]
http://logs.test-lab.xenproject.org/osstest/logs/181637/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-xl-pvshim broken
test-amd64-amd64-xl-pvshim5 host-insta
On 29.06.23 04:00, Stefano Stabellini wrote:
Hello Stefano
> On Wed, 21 Jun 2023, Oleksandr Tyshchenko wrote:
>> On 21.06.23 16:12, Petr Pavlu wrote:
>>
>>
>> Hello Petr
>>
>>
>>> When attempting to run Xen on a QEMU/KVM virtual machine with virtio
>>> devices (all x86_64), dom0 tries to establ
From: Julien Grall
Both the stub and the x86 prototypes for replace_grant_host_mapping()
and create_grant_host_mapping() will define the first parameter (and
third for the former) as uint64_t. Yet Arm will define it as
'unsigned long'.
While there are no differences for 64-bit, for 32-bit it mea
Hi,
On 29/06/2023 00:00, Stefano Stabellini wrote:
On Mon, 26 Jun 2023, Ayan Kumar Halder wrote:
Currently if the processor id is not identified (ie it is missing in proc-v7.S)
, then Xen boot fails quite early.
We have removed this restriction as for some CPUs (eg Cortex-R52), there isn't
any
Sorry I forgot to CC Bertrand and Stefano.
On 29/06/2023 22:01, Julien Grall wrote:
From: Julien Grall
Both the stub and the x86 prototypes for replace_grant_host_mapping()
and create_grant_host_mapping() will define the first parameter (and
third for the former) as uint64_t. Yet Arm will def
Hi Juergen,
On 27/06/2023 13:27, Juergen Gross wrote:
Instead of using #ifdef in xenstored_control.c split out the code of
environment specific functions (daemon or Mini-OS) to dedicated source
files.
Signed-off-by: Juergen Gross
Reviewed-by: Julien Grall
Cheers,
--
Julien Grall
Hi Juergen,
On 27/06/2023 13:27, Juergen Gross wrote:
Move the rest of live update related code from xenstored_control.c to
a dedicated new source file.
Signed-off-by: Juergen Gross
Acked-by: Julien Grall
Cheers,
--
Julien Grall
Hi Juergen,
On 27/06/2023 13:27, Juergen Gross wrote:
Some more cleanups of Xenstore.
Changes in V2:
- rebase
- one small modification of patch 10
- added patches 11-13
Changes in V3:
- rebase
- modified patch 4
- added patches 10, 11 and 13
Changes in V4:
- patches 1-11 already committed
- m
On 24/06/2023 15:54, Jiatong Shen wrote:
Hello Julien,
Hi,
Thank you very much for your reply. Can you teach me how to find the
relationship between MBI-gen and devices?
I am not sure how to find out the mbi-gen backed devices..
I am afraid I don't have any experience with the MBI-gen.
Hi,
Sorry for the late answer.
On 07/06/2023 14:41, Stewart Hildebrand wrote:
On 6/7/23 03:27, Julien Grall wrote:
Hi Stewart,
On 07/06/2023 04:02, Stewart Hildebrand wrote:
From: Oleksandr Tyshchenko
Improve readability of check for devices already registered with the SMMU with
legacy mmu
With UBSAN on some arm64 platforms, e.g. FVP_Base_RevC-2xAEMvA, the
following splat will be printed while Dom0 is booting:
```
(XEN) ==
(XEN) UBSAN: Undefined behaviour in arch/arm/vgic.c:372:15
(XEN) left shift of 1 by 31 places canno
Hi Stewart,
On 07/06/2023 04:02, Stewart Hildebrand wrote:
From: Oleksandr Tyshchenko
This flag will be re-used for PCI devices by the subsequent
patches.
I was expecting that we would only do PCI passthrough on boards where
all the PCI devices are behind an IOMMU. So it would be a all or n
Hi Stewart,
On 07/06/2023 04:02, Stewart Hildebrand wrote:
From: Oleksandr Tyshchenko
Move code for processing DT IOMMU specifier to a separate helper.
This helper will be re-used for adding PCI devices by the subsequent
patches as we will need exact the same actions for processing
DT PCI-IOMM
Hi Stewart,
I haven't yet fully reviewed the code. However, I have one question...
On 07/06/2023 04:02, Stewart Hildebrand wrote:
From: Oleksandr Tyshchenko
+static inline int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev)
+{
+return 0;
+}
#endif /* HAS_DEVICE_TREE */
+static
On Thu, 29 Jun 2023, Oleksandr Tyshchenko wrote:
> On 29.06.23 04:00, Stefano Stabellini wrote:
>
> Hello Stefano
>
> > On Wed, 21 Jun 2023, Oleksandr Tyshchenko wrote:
> >> On 21.06.23 16:12, Petr Pavlu wrote:
> >>
> >>
> >> Hello Petr
> >>
> >>
> >>> When attempting to run Xen on a QEMU/KVM vir
Hi Julien,
> -Original Message-
> Subject: [v2 2/4] xen/arm32: head: Don't map too much in boot_third
>
> From: Julien Grall
>
> At the moment, we are mapping the size of the reserved area for Xen
> (i.e. 2MB) even if the binary is smaller. We don't exactly know what's
> after Xen, so i
Hi Julien,
> -Original Message-
> Subject: [v2 4/4] xen/arm: Allow the user to build Xen with UBSAN
>
> From: Julien Grall
>
> UBSAN has been enabled a few years ago on x86 but was never
> enabled on Arm because the final binary is bigger than 2MB (
> the maximum we can currently handle
Hi Julien,
> -Original Message-
> Subject: [v2 1/4] xen/arm64: head: Don't map too much in boot_third
>
> From: Julien Grall
>
> At the moment, we are mapping the size of the reserved area for Xen
> (i.e. 2MB) even if the binary is smaller. We don't exactly know what's
> after Xen, so i
flight 181643 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/181643/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 15 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm 1
On Fri, 30 Jun 2023, Henry Wang wrote:
> With UBSAN on some arm64 platforms, e.g. FVP_Base_RevC-2xAEMvA, the
> following splat will be printed while Dom0 is booting:
> ```
> (XEN) ==
> (XEN) UBSAN: Undefined behaviour in arch/arm/vgic.
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