On Thu, Jun 29, 2023 at 1:17 PM Alejandro Vallejo < alejandro.vall...@cloud.com> wrote:
> Intel CPUs have a bit in MSR_IA32_MISC_ENABLE that may prevent the NX bit > from being advertised. Clear it unconditionally if we can't find the NX > feature right away on boot. > > The conditions for the MSR being read on early boot are (in this order): > > * Long Mode is supported > * NX isn't advertised > * The vendor is Intel > > The order of checks has been chosen carefully so a virtualized Xen on a > hypervisor that doesn't emulate that MSR (but supports NX) doesn't triple > fault trying to access the non-existing MSR. > > With that done, we can remove the XD_DISABLE checks in the intel-specific > init path (as they are already done in early assembly). Keep a printk to > highlight the fact that NX was forcefully enabled. > > Signed-off-by: Alejandro Vallejo <alejandro.vall...@cloud.com> > --- > v3: > * In head.S: s/has_nx/got_nx and s/nx_bit/nx > * Style changes in assembly instructions (spaces + width modifiers) > * Big comment in head.S replaced > * Jump directly to .Lno_nx if NX not found and XD_DISABLE not present > * Restored rdmsrl (previously refactored into rdmsr_safe() in v2) and > removed XD_DISABLE clearing in C (as it's now done in head.S). > * Moved printk in intel.c to highlight the XD_DISABLE override even when > done in head.S > --- > xen/arch/x86/boot/head.S | 49 ++++++++++++++++++++++---- > xen/arch/x86/cpu/intel.c | 16 ++++----- > xen/arch/x86/include/asm/msr-index.h | 2 +- > xen/arch/x86/include/asm/x86-vendors.h | 6 ++-- > 4 files changed, 53 insertions(+), 20 deletions(-) > @mantainers
