This is very interesting. I am trying to set the rx bandwidth on a N321 for a
while now.
Is there any workaround? Our bandwidth seems stuck at 8MHz while our
application needs much more.
Thanks
Lorenzo
On Feb 25, 2021, at 10:32 AM, Marcus D. Leech via USRP-users
wrote:
On 02/25/2021 11:3
Thanks everyone for this thread, it's very helpful.
Underruns occur even with top spec hardware on the host side, and my
application is very susceptible to streaming errors, hence, DPDK .
I'm still trying to get DPDK working, and I'm stuck with:
sudo uhd_usrp_probe --args="use_dpdk=1,type=n3xx,a
case: is there any other software solution I can attempt?
Thanks,
Lorenzo
From: Rob Kossler
Sent: Monday, August 2, 2021 10:32 AM
To: Minutolo, Lorenzo
Cc: usrp-users@lists.ettus.com
Subject: Re: [USRP-users] Re: DPDK troubles (invalid ELF header loading dpdk
Hi,
I'm trying to update the filesystem on my N321 to use UHD 4.1. I'm running into
some troubles.
After installing UHD 4.1, downloading and copying the image, logging in into
the N321:
root@ni-n3xx-xxx:~# mender install usrp_n3xx_fs.mender
INFO[] Loaded configuration file: /var/lib/men
Thanks for the reply, I'll go ahead and flash the whole SD.
Lorenzo
From: Rob Kossler
Sent: Monday, August 23, 2021 6:51 PM
To: Minutolo, Lorenzo
Cc: usrp-users@lists.ettus.com
Subject: Re: [USRP-users] Mender update error
Hi Lorenzo,
Do you have the ab
Hi All,
I'm trying to use the internal GPIO connector of an N321 to read an external
digital signal.
Cabling: after looking at the N321 schematic, I found that the GPIO connector
on the board mates with a Molex duo-clasp connector, 20 contacts, 2 rows. After
buying the casing and the pins I pat
GPIO example from UHD, running:
rb = usrp->get_gpio_attr(gpio, "READBACK");
std::cout << "\rREADBACK: " << to_bit_string(rb, num_bits);
gives me: READBACK: 1 1 1 1 0 1 1 1 1 1 1
Am I using the rfnoc GPIO api in a wrong way? Why are these two
Hi All,
I'm trying to make a custom OOT block for rfnoc4.
I already went through the synthesis of the stock rfnoc firmware, as well as
the gain example: all works well on my x300.
I added some custom logic in the gain example's verilog and I am quite
satisfied with the results.
The next step for
Hi All,
I'm using UHD 4.2 to play around with RFNOC4. I successfully added an FFT block
to the XG image of an X300, no static connections. uhd_usrp_probe returns as
expected. I use the attached code to test it out.
When I commit the graph I get the following error:
Traceback (most recent call la
renzo
From: Rob Kossler
Sent: Tuesday, September 13, 2022 11:19 AM
To: Paul Atreides
Cc: Minutolo, Lorenzo ; USRP-users@lists.ettus.com
Subject: Re: [USRP-users] Re: RFNOC4, FFT Block, Python
Yes, the spp needs to be the same. I don't use gnuradio much so I
Hi All,
I'm trying to develop a rfnoc4 block that changes the data rate and the packet
size.
Specifically, my block is very similar to the keep-1-in-N block operated in
packet mode with the exception that the first arbitrary M packets are
discarded, the output packet-in-N is an average of the pa
Same here.
Since switching to Vivado 2021.1 and UHD-4.3 even compiling the stock firmware
results in [IP_Flow 19-2162] IP 'axi_hb31' is locked.
Apparently, this error is well known
https://support.xilinx.com/s/article/58832?language=en_US
I'm trying to switch to UHD 4.4 to see if this error goes
ilog or VHDL sources specified
Currently looking for a workaround before reverting to 2019.1 and UHD 4.2
Lorenzo
________
From: Minutolo, Lorenzo
Sent: Tuesday, January 31, 2023 11:48 AM
To: jmalo...@umass.edu ; usrp-users@lists.ettus.com
Subject: [USRP-users] Re: Err
ed below.
____
From: Minutolo, Lorenzo
Sent: Tuesday, January 31, 2023 2:20 PM
To: jmalo...@umass.edu ; usrp-users@lists.ettus.com
Subject: [USRP-users] Re: Error when synthesizing example OOT block : IP
"cmplx_mul" is locked
I tried installing Vivado 2021.1 and applyi
o open the .xci without
creating a new project?
Thanks,
Lorenzo
From: Wade Fife
Sent: Thursday, February 2, 2023 7:37 PM
To: Minutolo, Lorenzo
Cc: usrp-users@lists.ettus.com
Subject: Re: [USRP-users] Re: Error when synthesizing example OOT block : IP
"cmplx
there.
Lorenzo
From: Wade Fife
Sent: Friday, February 3, 2023 11:27 AM
To: Minutolo, Lorenzo
Cc: usrp-users@lists.ettus.com
Subject: Re: [USRP-users] Re: Error when synthesizing example OOT block : IP
"cmplx_mul" is locked
Setupenv says you're using
Hi All,
I am trying to build a firmware for an x300 device that uses the radio block
and the Keep-1-in-N block using UHD 4.4.
For my application I need the Keep-1-in-N block to operate in packet mode, on
packets 2048 samples long.
Before connecting the graph, I try to set the radio block to use
2048 samples.
Thanks,
Lorenzo
From: Rob Kossler
Sent: Tuesday, September 13, 2022 6:54 AM
To: Minutolo, Lorenzo
Cc: USRP-users@lists.ettus.com
Subject: Re: [USRP-users] RFNOC4, FFT Block, Python
Hi Lorenzo,
The FFT block requires the number of samples per pack
esday, February 28, 2023 8:05 AM
To: Minutolo, Lorenzo
Cc: usrp-users@lists.ettus.com
Subject: Re: [USRP-users] RFNOC packet size - Keep one in N
Hi Lorenzo,
Regarding the SPP=364, this sounds like it is being set according to your
Ethernet transport MTU. Sometimes the NIC defaults to MTU=1500 ra
Hi All,
After many unsuccessfull attempts to compile a RFNOC block that uses some
memory (store and operate on 4096 samples using distributed memory results in
too many LUT/Slices being used), I am moving toward using the on-board RAM. The
reference design I am looking into is the replay block.
cts that ultimately create a socket, you can run out of
sockets. Pure speculation on my part, and it
may be something else entirely.
On Wed, Nov 6, 2019 at 1:41 PM Minutolo, Lorenzo via USRP-users
mailto:usrp-users@lists.ettus.com>> wrote:
Hi All,
My C++ application has a loop which a
I' using:
dpdk-procinfo -v
EAL: Detected 16 lcore(s)
EAL: RTE Version: 'DPDK 17.11.9'
Thanks,
Lorenzo
From: Sam Reiter
Sent: Monday, January 6, 2020 8:27 AM
To: Minutolo, Lorenzo
Cc: usrp-users@lists.ettus.com
Subject: Re: [USRP-users] dpdk wit
020 2:05 PM
To: Minutolo, Lorenzo
Cc: usrp-users@lists.ettus.com
Subject: Re: [USRP-users] dpdk with x300
That should be fine.
Looking over those screenshots again, you'll need to change your dpdk driver
path in uhd.conf. Here's what the uncommented parts of uhd.conf should look
As a side note: I tried running the program as "sudo su" with the same exact
result.
Lorenzo
From: USRP-users on behalf of Minutolo,
Lorenzo via USRP-users
Sent: Friday, January 10, 2020 3:08 PM
To: Sam Reiter
Cc: usrp-users@lists.ettus.com
S
Hi Francisco,
I had the same problem with a brand new N321. Deleting, downloading again and
reloading the FPGA image from the host did the trick in my case.
Note: I did't try to reproduce the condition so I'm not 100% sure of validity
of the solution, just saying it's worth a test.
Best,
Lorenzo
Hello,
I'm trying to tune the TX channel on the N321 to import the LO from the RX
channel. I'm on ununtu server 18.04 and UHD 3.15.
The command I'm using are:
On the RX side:
uhd::tune_request_t tune_request(2e9);
tune_request.args = uhd::device_addr_t("mode_n=integer");
my_usrp->set_rx_freq(tune
Hi All,
Is there any plan (or ~simple way) to use GPUDirect to make USRP samples go to
and from an Nvidia GPU memory without passing through the CPU?
My application, which heavily relies on GPU for processing, is currently
limited by the round trip latency. Since we have a new streaming protocol
Hi All,
I'm using a USRP x300 configured with two WBX-120 daughterboards and the XG
firmware version from the UHD 3.13.
The link with the host pc is done with two 10GBe connections.
In my C++ application I have the necessity of receiving and streaming signals
to both daughterboards at the sam
Hi All,
We're using the USRP x3x0 for cosmology and many other applications: we use
them to read out our cryogenics detectors.
Do you need the full spectral bandwidth of the device? Things get much easier
if you decimate the signal before storing it to disk. The system we realized
uses a GPU t
Hi All,
I'm Using the X300 with the XG firmware from UHD 3.14, connected to the host pc
via primary and secondary addresses.
Since I'm using four different streamer I'd like to be able to tell to each
streamer which address to use. Is that possible?
Thanks,
Lorenzo
__
Hi,
I have some question about your new products.
1) What is the suggested hardware for communicating with the QSFP+ port? As I
understand this a normal 40 Gbit PCIe card won’t work.
2) Does the embedded linux system gives any error while handling two channels
at 200Msps full duplex without any
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