Hi All, I'm trying to make a custom OOT block for rfnoc4. I already went through the synthesis of the stock rfnoc firmware, as well as the gain example: all works well on my x300. I added some custom logic in the gain example's verilog and I am quite satisfied with the results.
The next step for me is to integrate a more complex design that includes CORDICs, FFTs and other IPs from Xilinx. To do that, I plan to develop a block design in Vivado and pass it to the rfnoc infrastructure. I'd like to know if you attempted this workflow and if there is a guide of some sort for getting started. Right now, I am quite lost. 1. The IPs that Vivado generate have an AXI interface, I suspect I cannot directly reproduce the steps to implement the gain block. 2. Once I have my top module, how do I integrate it in the rfnoc workflow? A basic example of the gain block (or even an empty pass-through block) implemented via the Vivado block design technique would be really appreciated. I work for a non-profit research institution (Caltech); all my results will be available under some open-source license. My plan is also to release a guide that documents how I developed the firmware. Thanks, Lorenzo
_______________________________________________ USRP-users mailing list -- usrp-users@lists.ettus.com To unsubscribe send an email to usrp-users-le...@lists.ettus.com