I am able to program N210 FPGA using newly generated .bit file. I am trying
to transmit MSB (1-bit only ) from the N210 board and faithfully process
these MSBs at the receiver end.
Would appreciate some information on how it can be achieved. A pointer or
two is the need of hour.
__
Hello all,
I am Brajesh and working on Ettus Research N210 FPGA board modifications.
While doing so, I am facing some issues which are listed below,
i. How to implement Verilog code ( available at following GitHub link ) on
N210's ( Ettus Research ) FPGA ,
https://github.com/EttusResearc
eech
wrote:
> On 13/08/2024 08:39, Brajesh wrote:
>
> Hello all,
> I am Brajesh and working on Ettus Research N210 FPGA board modifications.
> While doing so, I am facing some issues which are listed below,
>
> i. How to implement Verilog code ( available at following GitHu
On Wed, Aug 14, 2024 at 12:14 AM Marcus D. Leech
wrote:
> On 13/08/2024 14:32, Brajesh wrote:
>
> Thanks Marcus for response.
>
> Yes, you are correct that I am beginner to UHD related issues. Maybe I
> should have pointed in my first posting. Sorry for that. But for design
&g
On Wed, Aug 14, 2024 at 7:31 AM Marcus D. Leech
wrote:
> On 13/08/2024 15:16, Brajesh wrote:
>
>
>
> On Wed, Aug 14, 2024 at 12:14 AM Marcus D. Leech
> wrote:
>
>> On 13/08/2024 14:32, Brajesh wrote:
>>
>> Thanks Marcus for response.
>>
>> Yes
On Thu, Aug 15, 2024 at 4:01 AM Marcus D. Leech
wrote:
> On 14/08/2024 03:52, Brajesh wrote:
>
>
>
> That's great.
> If possible, request your time for interactive session. This request is to
> understand codebase (
> https://github.
After building setup for N210R4, I am able to generate new image for
N210R4. I want to burn newly generated image on the N210R4 FPGA. Looking
for command to do the needful.
Thanks and regards.
___
USRP-users mailing list -- usrp-users@lists.ettus.com
To
