[USRP-users] Can not disable log info in usrp B210

Hi, I am trying to disable the log info in my usrp B210, because I want not to see this: [INFO] [CORES] Performing timer loopback test... [INFO] [CORES] Timer loopback test passed [INFO] [CORES] Performing timer loopback test... [INFO] [CORES] Timer loopback test passed [INFO] [B200] Asking for c

Re: [USRP-users] Can not disable log info in usrp B210

Hello Paula, Can please let us know the version of UHD on your PC and also on your laptop? Is it possible that you have an older version on the laptop, or multiple copies? Setting the log level to off or using the compile time disable should both work. Regards, Derek On Mon, May 21, 2018 at 9:46

Re: [USRP-users] Can not disable log info in usrp B210

Hello, Can you please share the complete output of running cmake on the laptop with -DUHD_LOG_CONSOLE_DISABLE=TRUE included? Also how are you calling set_logger_level? I think you may want to call set_console_level instead with severity_level off. Regards, Derek On Mon, May 21, 2018 at 10:15 AM,

[USRP-users] Question regarding the term "wrt A/D full scale" on OpenBTS

Hi everyone On the following OpenBTS parameter: OpenBTS> devconfig GSM.Radio.RSSITarget GSM.Radio.RSSITarget -50 [default] - description: Target uplink RSSI (Received Signal Strength Indication) for MS power control loop, in dB wrt to A/D full scale. The description indicates that the R

Re: [USRP-users] BRAM usage of the X300/X310 design

Hi guys, Thank you very much for your answers. I managed to build the FPGA image on a new laptop, and I'm looking through utilization reports. :) I have another problem now, concerning flashing image to X310, but I'll open a new thread for that. Kind regards, Nives sub, 19. svi 2018. u 18:24 Rei

[USRP-users] USRPD X310 device recovery problem

Hi everyone, I am trying to flash an image into X310 permanent memory and I'm getting an error like this: [image: device_X310_problem.png] I was following instructions from this link: https://kb.ettus.com/X300/X310_Device_Recovery Everything goes well until I have to use the uhd_image_loader.

[USRP-users] x310 cannot connect the the usrp with PCIe

Hi all, I am trying to work with the USRP X310 with the PCIe connection. I follow the instruction in the following website of Ettus, by it is still not working. (website link: https://files.ettus.com/manual/page_usrp_x3x0.html ) My problem that I don't use the MXI cable, and my card isn't NI Exp

Re: [USRP-users] BRAM usage of the X300/X310 design

Hey Nives, If it's of any help: on an X310, my utilization report for a design including a DMA_FIFO, both radio cores, two DDCs and two DUCs uses around 42% of the FPGA's Block RAM resources, and if I take out the DDCs and DUCs, the usage drops to around 34%. Regards, Lei On Mon, May 21, 2018 a

[USRP-users] bug in UHD I think

We have a python script that worked before I pulled down the latest UHD. A uhd_usrp_probe works fine, but when we run our command in our script using: usrp.get_usrp_info().vals()[0] We get an error of: LookupError: Path not found in tree: /mboards/0/xbar/Radio_0/eeprom partway through the Et

Re: [USRP-users] x310 cannot connect the the usrp with PCIe

Could you share with us any error messages you are receiving? Sent from my iPhone > On May 21, 2018, at 7:26 AM, Allouche Ishai via USRP-users > wrote: > > Hi all, > > I am trying to work with the USRP X310 with the PCIe connection. > I follow the instruction in the following website of Ettu

Re: [USRP-users] x310 cannot connect the the usrp with PCIe

Hello Ishai: Please note that the PCIe driver for the X300/X310 requires a kernel version of 4.2 or lower. So Ubuntu 16.04.3 or 18.04 will not work. We'll release an updated driver shortly, but it's not available at the moment. Which Linux distribution and kernel version are you using? Would you

Re: [USRP-users] N200 dropping samples in Vbox

Thanks Marcus, I have allocated 8 CPUs and 16 GB of RAM, which should be overkill. And I do understand that there could (and most likely will) be a hit for running inside a VM, but in this instance I am trying to understand where the throttle is and whether there is a fix. I have verified that th

Re: [USRP-users] RFNoC block reading from a file

Hello, i'm also working on the way to pass a series of values from the host to the FPGA, although I don't use RFNoC and just work in the radio domain of uhd-fpga's radio file. Is it possible to do that by just using a normal setting_reg but not an axi-supported register? Regards, Kei > Hey Jason

[USRP-users] FPGA Image problem E310

Hello, I'm trying to actualize my UHD_RFNOC_DEVEL (89427e8c) version to the last one at the Ettus repository (1f8463cc). I realize a manual crosscompilation and put into a fresh microSDimage. When I run the command uhd_usrp_probe I got this output *root@ettus-e3xx-sg1:~# uhd_usrp_probe * *[INFO]

Re: [USRP-users] FPGA Image problem E310

On 05/21/2018 02:12 PM, Juan Pablo Leal Licudis via USRP-users wrote: Hello, I'm trying to actualize my UHD_RFNOC_DEVEL (89427e8c) version to the last one at the Ettus repository (1f8463cc). I realize a manual crosscompilation and put into a fresh microSDimage. When I run the command uhd_usrp_p

Re: [USRP-users] FPGA Image problem E310

Hi, Marcus . Yes . 2018-05-21 15:24 GMT-03:00 Marcus D. Leech via USRP-users < usrp-users@lists.ettus.com>: > On 05/21/2018 02:12 PM, Juan Pablo Leal Licudis via USRP-users wrote: > > Hello, I'm trying to actualize my UHD_RFNOC_DEVEL (89427e8c) version to > the last one at the Ettus repository (

Re: [USRP-users] Minimize latency over PCIe on X310

Thanks Neel, We have tested a plain 10 GbE ‘loopback’ – i.e. send packet out, have external hardware turn it around and receive it. The latency is about 10 us with very tight variance. So, the UDP stack (yes I know we were talking about PCIe before) is not the limiting factor. PCIe should be

[USRP-users] API C,USRP X300

Hi, I'm new using USRP I have two USRP X300 devices and each one is connected to a PC. I currently have UHD and GnuRadio installed, and I can send and receive data through GnuRadio. What I want now is to send data using the APIs of C, for this I want to use the examples: https://github.com/EttusR

[USRP-users] FPGA or Computer?

Hi all, Just a quick question, everything done using the UHD C++ and GNU Radio Companion, is it done in the FPGA or computer itself? I am using USRP B210 and what is the FPGA used for, as I know Gnu Radio is a software-defined-radio framework, and all the blocks execute on the PC host. Thank y

Re: [USRP-users] FPGA or Computer?

Hi Alvin.All Ettus Research USRP SDRs ship with default FPGA bitstreams that have the same basic functionality: 1) a digital interface to the RF front end (ADCs/DACs), 2) digital up and down converters, 3) interpolation and decimation blocks to adjust the sample rate, and 4) digital logic for c