RFNoC FPGA image with OOT module
Hi Jose,
You've encountered a new feature of the uhd-fpga build process. If your OOT
repo has a Makefile.inc, the uhd_image_builder.py script will point to those
makefiles in the OOT repo. This is especially useful for synthesizing Xilinx IP
or HLS cores. (Se
Hi Jose,
You've encountered a new feature of the uhd-fpga build process. If your OOT
repo has a Makefile.inc, the uhd_image_builder.py script will point to
those makefiles in the OOT repo. This is especially useful for synthesizing
Xilinx IP or HLS cores. (See the Makefile.inc files here for a dum
Hello Jose,
please try running the following:
$ ./uhd_image_builder.py twochannelsiggen duc fft *-I
/home/joseavila/Documents/gnuradio_source/rfnoc-siggen2ch/* -d x310 -t
X310_RFNOC_HG -m 6 --fill-with-fifos
which means pointing to the top OOT directory instead to directly the
fpga-srcs dire