Re: [USRP-users] Reprogramming a "Bricked" N210

2017-11-14 Thread Mark Koenig via USRP-users
31 Oct 2017 14:12:58 -0700 > From: Robin Coxe > To: "Marcus D. Leech" > Cc: USRP-users > Subject: Re: [USRP-users] Reprogramming a "Bricked" N210 > Message-ID: > > Cont

Re: [USRP-users] Reprogramming a "Bricked" N210

2017-11-13 Thread Robin Coxe via USRP-users
ose connectors? >> I will acquire a DMM and measure the voltages. >> Does the LED at D203 on the motherboard light up? If you're holding >> the N210 such that the front panel is facing you, then D203 is located near >> the left connector for the daughterboard. &

Re: [USRP-users] Reprogramming a "Bricked" N210

2017-11-13 Thread Marcus D. Leech via USRP-users
12:58 -0700 From: Robin Coxe To: "Marcus D. Leech" Cc: USRP-users Subject: Re: [USRP-users] Reprogramming a "Bricked" N210 Message-ID: Content-Type: text/plain; charset="utf-8"

Re: [USRP-users] Reprogramming a "Bricked" N210

2017-11-13 Thread Mark Koenig via USRP-users
other LED is lit up (D202) Message: 13 Date: Tue, 31 Oct 2017 14:12:58 -0700 From: Robin Coxe To: "Marcus D. Leech" Cc: USRP-users Subject: Re: [USRP-users] Reprogramming a "Bricked" N210 Message-ID:

Re: [USRP-users] Reprogramming a "Bricked" N210

2017-11-09 Thread Mark Koenig via USRP-users
ocated near the left connector for the daughterboard. No, another LED is lit up (D202) Message: 13 Date: Tue, 31 Oct 2017 14:12:58 -0700 From: Robin Coxe To: "Marcus D. Leech" Cc: USRP-users Subject: Re: [USRP-users] Reprogramming a "Bricked" N210

Re: [USRP-users] Reprogramming a "Bricked" N210

2017-10-31 Thread Robin Coxe via USRP-users
Hi Mark. One thought-- Vivado does not support the Spartan-3A FPGA on the USRP N210.The JTAG protocol should in principal be the same, but Vivado definitely does not include Xilinx device files for older FPGAs. Have you tried to resurrect the device using Xilinx ISE 14.7 Labtools? https://www

Re: [USRP-users] Reprogramming a "Bricked" N210

2017-10-31 Thread Marcus D. Leech via USRP-users
On 10/31/2017 04:21 PM, Mark Koenig via USRP-users wrote: Again, Looking to see if anyone can help on this. One more detail is that I am unable to reboot the N210 into safe mode, thus no green lights come on. Thanks Mark OK, so you've followed the JTAG-based procedures here https://kb.e

Re: [USRP-users] Reprogramming a "Bricked" N210

2017-10-31 Thread Mark Koenig via USRP-users
Again, Looking to see if anyone can help on this. One more detail is that I am unable to reboot the N210 into safe mode, thus no green lights come on. Thanks Mark From: Mark Koenig Date: Thursday, October 26, 2017 at 1:25 PM To: "usrp-users@lists.ettus.com" Subject: Re: Reprogramming a "Bri

Re: [USRP-users] Reprogramming a "Bricked" N210

2017-10-26 Thread Marcus D. Leech via USRP-users
On 10/26/2017 01:25 PM, Mark Koenig via USRP-users wrote: Just bringing this back to the top. I've never had to do this myself, but folks who've had to use the "Impact" tool from the ISE package (since N2xx use ISE and not Vivado). Use the appropriate .bit file from the "bit" subdirectory of

Re: [USRP-users] Reprogramming a "Bricked" N210

2017-10-26 Thread Mark Koenig via USRP-users
Just bringing this back to the top. From: Mark Koenig Date: Monday, October 23, 2017 at 2:26 PM To: "usrp-users@lists.ettus.com" Subject: Reprogramming a "Bricked" N210 I have been trying to use Vivado lab to return my N210 to a useable state and am looking for some help. I see the green ligh

[USRP-users] Reprogramming a "Bricked" N210

2017-10-23 Thread Mark Koenig via USRP-users
I have been trying to use Vivado lab to return my N210 to a useable state and am looking for some help. I see the green light lit on the Xilinx USB to JTAG adaptor and the connection seems good, however, I keep getting errors during the programming of the EE_PROM. Below is what I constantly se