Hi,
i am reading N310 STM32 source code but i can not find any source code related
to the pins PWRSW-STAT, PWRSW-CTRL, AUXPWR_STAT. seems these pins are not used
but they do connect to some components in the schematic. if these pins are used
then where is the source code handle they?
___
Hi Marcus,
repo still not work for me. but i can clone from git. so if can i use git clone
for every repo instead of using repo auto fetch the repos?
From: Marcus D. Leech
Sent: Sunday, October 18, 2020 02:12
To: james Thomas ; usrp-users@lists.ettus.com
Subject
when I run repo init -u git://github.com/EttusResearch/oe-manifests.git -b
v3.14.1.1 it have error below:
how to fix this?
repo init -u git://github.com/EttusResearch/oe-manifests.git -b v3.14.1.1
repo: warning: Python 2 is no longer supported; Please upgrade to Python 3.6+.
... A new version of
On 09/29/2020 11:52 PM, james Thomas via USRP-users wrote:
Hi,
where is the source code of N310 file system image and how to build it?
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Hi,
where is the source code of N310 file system image and how to build it?
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Hi,
When attempting to stream different waveforms using both channels of the
replay block simultaneously to two radios on the same USRP (X310) there are
under-runs. Any ideas why this is happening? The replay block works as
expected when using either channel 0 or channel 1, but fails when
atte
Best Regards
Thomas Fabricius, M.Sc.EE., Ph.D.
Chief Technical Officer (CTO)
Chora A/S
Mindet 2, 3.sal
DK-8000 Aarhus C
Denmark
Phone: +45 86 18 99 55
Mobile: +45 22 93 70 59
Fax: +45 87 30 07 75
E-mail: t...@chora.dk
www.chora.dk
---
Hi
Ian: that was also partly what we figured out, so thanks for confirming.
But maybe someone can help clarify the start flow at a specific vita time from
fpga-source.
The "set_stb" generated in "radio_ctrl_proc.v", seems to depend on "vita_time"
equal "trigger_time" ie. "now" in case "HAS_TIM
Dear users
On a B200 board how do we via the C-api utilize a higher ADC-sample rate than
output sample rate. Assume we want 16MSPS out and a sample rate of 32MHz, ie.
utilizing the AD9364 HB3, HB2, HB1 and FIR to decimate by 2. Should we just
call
virtual void set_master_clock_rate(double
Dear users…
We have a question regarding the 1pps time stamping. We don’t know exactly
where it is best to ask this question, so please advise if needed.:
We use a B200 board.
When we do a “sample tick reset” relative to 1pps using
virtual void set_time_next_pps(const time_spec_t &time_s
Hi,
After synchronization to the GPS time, the USRP time does not match the real
GPS time (there is 1 second offset between the USRP time and the real GPS
time). I realized that 1 second offset by analyzing the signal content
produced by the USRP (which depends on the GPS time in my case).
Here t
Hi hope this is the the right place to ask.
I attempted an ip address change using the NI USRP utility tool and when
changed the n210 fpga stopped being recognised by the computer.
I am able to boot it in safe mode and the computer can contact the device
(ping's okay, and uhd_find_devices is ab
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