Re: [USRP-users] B210 Loopback Exponential Decay in Burst Messaging

2020-06-25 Thread Marcus D. Leech via USRP-users
On 06/25/2020 11:14 PM, Daniel Tajik wrote: Hey Marcus! Yep, my configuration has the recommended 30 dB attenuation. I haven't maxed out either gain stages to avoid risking anything, mostly sit around 50 dB on both Rx and Tx side, as its recommended to also use at least half the gain availabl

Re: [USRP-users] b205 RX -> TX loopback

2020-06-25 Thread Marcus D Leech via USRP-users
From what I recall of the architecture that’s the case. The AD9361 has built in DSP functions. Sent from my iPhone > On Jun 26, 2020, at 12:37 AM, David Carsenat wrote: > >  > OK thanks. So you confirm the link between UHD sample rate and AD93xx sample > rate ? > > David > >> Le ven. 26 j

Re: [USRP-users] b205 RX -> TX loopback

2020-06-25 Thread David Carsenat via USRP-users
OK thanks. So you confirm the link between UHD sample rate and AD93xx sample rate ? David Le ven. 26 juin 2020 à 00:23, Marcus D. Leech via USRP-users < usrp-users@lists.ettus.com> a écrit : > On 06/25/2020 03:04 PM, David Carsenat via USRP-users wrote: > > Hello. > > We are trying to make a sim

Re: [USRP-users] B210 Loopback Exponential Decay in Burst Messaging

2020-06-25 Thread Daniel Tajik via USRP-users
Hey Marcus! Yep, my configuration has the recommended 30 dB attenuation. I haven't maxed out either gain stages to avoid risking anything, mostly sit around 50 dB on both Rx and Tx side, as its recommended to also use at least half the gain available to achieve a suitable noise figure. No frequen

Re: [USRP-users] B210 Loopback Exponential Decay in Burst Messaging

2020-06-25 Thread Marcus D. Leech via USRP-users
On 06/24/2020 02:24 PM, Daniel Tajik via USRP-users wrote: Hey everyone! I have a question in regards to a loopback test I am running on a single USRP B210. I set up a simple GFSK modulator/demodulator and am trying to send a small packet (Ax.25 packet carrying message "") every 2

Re: [USRP-users] Fwd: Included headers in the installer:

2020-06-25 Thread Marcus D. Leech via USRP-users
On 06/24/2020 05:39 AM, Andreas Hagström via USRP-users wrote: -- Forwarded message - Från: *Andreas Hagström* > Date: ons 24 juni 2020 kl 09:36 Subject: Re: [USRP-users] Included headers in the installer: To: Marcus D Leech

Re: [USRP-users] 2021 IEEE Aerospace Conference

2020-06-25 Thread Alex Humberstone via USRP-users
Any update? Would like to see the program for past conferences... On Fri, 19 Jun 2020 at 22:44, Alex Humberstone wrote: > Eugene, the conference looks interesting. Where can we find the program > for past years to get a feel for the conference? I didn't see this on the > website. Thanks. > >

Re: [USRP-users] b205 RX -> TX loopback

2020-06-25 Thread Marcus D. Leech via USRP-users
On 06/25/2020 03:04 PM, David Carsenat via USRP-users wrote: Hello. We are trying to make a simple RX on TX loopback by changing the FPGA image. We get it by adding a wire between the DDC output and DUC input, but we are still limited by the sample rate we specify via UHD. We have specified th

[USRP-users] b205 RX -> TX loopback

2020-06-25 Thread David Carsenat via USRP-users
Hello. We are trying to make a simple RX on TX loopback by changing the FPGA image. We get it by adding a wire between the DDC output and DUC input, but we are still limited by the sample rate we specify via UHD. We have specified the analog bandwidth at 56 MHz, and the master clock rate at 60 MHz

Re: [USRP-users] TX Burst at 200Msps sample rate on two channel

2020-06-25 Thread Rob Kossler via USRP-users
Hi Damon, The X310 cannot handle 200 MS/s on both channels simultaneously through the DmaFIFO. The bandwidth of this RAM cannot handle that much data simultaneously entering & leaving. It *may* be possible to achieve this with a different FPGA image that has 2 FIFOs on the FPGA (noc_block_axi_fif