From: Yeo Jin Kuang Alvin (IA)
Sent: Friday, 6 April 2018 10:55 AM
To: 'Neel Pandeya'
Subject: RE: [USRP-users] USRP B210
Hi Neel,
I am trying to output a chirp signal by creating a DDS in the FPGA using Xilinx
ISE 14.7. The code is done from scratch and created a SPI module in the FPGA to
co
Hello Yeo Jin Kuang Alvin:
If you're modifying the FPGA, then there will likely be a corresponding
modification needed on the host-side, especially for something as
significant as starting a transmit stream and/or controlling the AD9361 in
some way. We'll need much more detail in order to be able
Hi Leo!
Just a few things to add:
> * I see the rfnoc-devel branch on the Github repository hasn't been
updated in the last 6 months, and grepping code I've seen you've included
"RFNoC stuff" in the maint branch, which is the one I'm currently using.
The thing is I don't see the Python scripts t
Hi everyone,
I have tried to program the Spartan 6 FPGA using Xilinx 14.7 to send out a
signal and to control the AD9361. However, I couldn't get an output out from
the transmitter. Can I just solely on FPGA or must I use the API for the USRP
B210? What are the steps and procedures I have to do
Hey Leo,
On Thu, Apr 5, 2018 at 3:01 PM, Leandro Echevarría via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hey everybody,
>
> I've begun working on an X310 board, and I need to make modifications to
> the Verilog code to include my own code. My strength is on HDL design, but
> I lack exper
Hey everybody,
I've begun working on an X310 board, and I need to make modifications to
the Verilog code to include my own code. My strength is on HDL design, but
I lack experience on the software part. I've got some questions (in order
from most urgent to more annecdotical) I'd very much apprecia
Hi Shane,
Your data scaling depends on the data type of the vector you’re sending to the
USRP transmitter object.
See
https://www.mathworks.com/help/supportpkg/usrpradio/ug/comm.sdrutransmitter.step.html
for the scaling needed for your data. On that page, find the Input Arguments
section, an
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On 04/05/2018 06:20 AM, ALEJANDRO BLANCO PIZARRO via USRP-users wrote:
Dear community,
I would like to add an external clock to two USRP in order to have the
same clock discarding possible synchronization issues. The desirable
frequency of the clock would be 184 MHz (compatible with LTE).
An
On 04/05/2018 04:55 AM, Matis Alun via USRP-users wrote:
Hi usrp users,
I experienced some problem using my X300 + TwinRx over 1 Gb/s link.
The following code example shows that after the iteration number 253,
the program stops
with the following traceback:
terminate called after throwing a
Dear community,
I would like to add an external clock to two USRP in order to have the same
clock discarding possible synchronization issues. The desirable frequency
of the clock would be 184 MHz (compatible with LTE).
And I was wondering about what will be the possible solutions:
--> It is poss
Hi usrp users,
I experienced some problem using my X300 + TwinRx over 1 Gb/s link.
The following code example shows that after the iteration number 253, the
program stops
with the following traceback:
terminate called after throwing an instance of 'uhd::io_error'
what(): EnvironmentError: IO
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