Provide a page describing the usage of U-Boot on the LicheeRV Nano and a
description of the board.
Signed-off-by: Thomas Bonnefille
---
doc/board/sophgo/licheerv_nano.rst | 72 ++
1 file changed, 72 insertions(+)
diff --git a/doc/board/sophgo
Import a slightly modified version of the LicheeRV Nano and SG2002
device trees from the Linux Kernel. The current supported IPs are UART,
MMC, Timer, PLIC and CLINT.
Signed-off-by: Thomas Bonnefille
---
arch/riscv/dts/Makefile | 1 +
arch/riscv/dts/sg2002-licheerv-nano-b.dts
The LicheeRV Nano is a small SBC using the Sophgo SG2002 RISCV SoC.
Signed-off-by: Thomas Bonnefille
---
arch/riscv/Kconfig | 4 +++
board/sophgo/licheerv_nano/Kconfig | 28
board/sophgo/licheerv_nano/MAINTAINERS | 4 +++
board/sophgo/licheerv_nano
This patch series adds support in U-Boot for the Sophgo SG2002 RISCV SoC
and one board using this SoC, the LicheeRV Nano.
Signed-off-by: Thomas Bonnefille
---
Thomas Bonnefille (3):
doc: add LicheeRV Nano and SG2002 SoC
riscv: dts: sophgo: add device tree for LicheeRV Nano
On Mon Nov 18, 2024 at 11:01 AM CET, Leo Liang wrote:
> On Tue, Nov 12, 2024 at 03:57:37PM +0100, Thomas Bonnefille wrote:
> > [EXTERNAL MAIL]
> >
> > Import a slightly modified version of the LicheeRV Nano and SG2002
> > device trees from the Linux Kernel. The cur
On Mon Nov 25, 2024 at 10:59 AM CET, Leo Liang wrote:
> On Tue, Nov 19, 2024 at 09:35:32PM +0100, Thomas Bonnefille wrote:
> > [EXTERNAL MAIL]
> >
> > On Mon Nov 18, 2024 at 11:01 AM CET, Leo Liang wrote:
> > > On Tue, Nov 12, 2024 at 03:57:37PM +0100, Thomas Bonne
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