The LicheeRV Nano is a small SBC using the Sophgo SG2002 RISCV SoC.
Signed-off-by: Thomas Bonnefille <thomas.bonnefi...@bootlin.com>
---
arch/riscv/Kconfig | 4 +++
board/sophgo/licheerv_nano/Kconfig | 28 ++++++++++++++++++++
board/sophgo/licheerv_nano/MAINTAINERS | 4 +++
board/sophgo/licheerv_nano/Makefile | 5 ++++
board/sophgo/licheerv_nano/board.c | 9 +++++++
configs/sipeed_licheerv_nano_defconfig | 47 ++++++++++++++++++++++++++++++++++
include/configs/licheerv_nano.h | 24 +++++++++++++++++
7 files changed, 121 insertions(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index
fa3b016c52728862019c426f031262c40901ee51..91d531a4e9eb8e915bf47a4be2ad3392f64fa352
100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -11,6 +11,9 @@ choice
config TARGET_ANDES_AE350
bool "Support Andes ae350"
+config TARGET_LICHEERV_NANO
+ bool "Support LicheeRV Nano Board"
+
config TARGET_MICROCHIP_ICICLE
bool "Support Microchip PolarFire-SoC Icicle Board"
@@ -88,6 +91,7 @@ source "board/sifive/unleashed/Kconfig"
source "board/sifive/unmatched/Kconfig"
source "board/sipeed/maix/Kconfig"
source "board/sophgo/milkv_duo/Kconfig"
+source "board/sophgo/licheerv_nano/Kconfig"
source "board/starfive/visionfive2/Kconfig"
source "board/thead/th1520_lpi4a/Kconfig"
source "board/xilinx/mbv/Kconfig"
diff --git a/board/sophgo/licheerv_nano/Kconfig
b/board/sophgo/licheerv_nano/Kconfig
new file mode 100644
index
0000000000000000000000000000000000000000..660d3c5d0958632cde45eeca58c2921881948452
--- /dev/null
+++ b/board/sophgo/licheerv_nano/Kconfig
@@ -0,0 +1,28 @@
+if TARGET_LICHEERV_NANO
+
+config SYS_BOARD
+ default "licheerv_nano"
+
+config SYS_VENDOR
+ default "sophgo"
+
+config SYS_CPU
+ default "cv1800b"
+
+config SYS_CONFIG_NAME
+ default "licheerv_nano"
+
+config TEXT_BASE
+ default 0x80200000
+
+config ENV_SIZE
+ default 0x20000
+
+config ENV_SECT_SIZE
+ default 0x40000
+
+config BOARD_SPECIFIC_OPTIONS
+ def_bool y
+ select SOPHGO_CV1800B
+
+endif
diff --git a/board/sophgo/licheerv_nano/MAINTAINERS
b/board/sophgo/licheerv_nano/MAINTAINERS
new file mode 100644
index
0000000000000000000000000000000000000000..88cab489c985925f736a9537ff797870bea38b9d
--- /dev/null
+++ b/board/sophgo/licheerv_nano/MAINTAINERS
@@ -0,0 +1,4 @@
+LicheeRV Nano
+M: Thomas Bonnefille <thomas.bonnefi...@bootlin.com>
+S: Maintained
+F: board/sophgo/licheerv_nano/
diff --git a/board/sophgo/licheerv_nano/Makefile
b/board/sophgo/licheerv_nano/Makefile
new file mode 100644
index
0000000000000000000000000000000000000000..59fcd5bfba91ceacb10f56692e9a1c82cc66d6cf
--- /dev/null
+++ b/board/sophgo/licheerv_nano/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2024, Kongyang Liu <seashell11234...@gmail.com>
+
+obj-y += board.o
diff --git a/board/sophgo/licheerv_nano/board.c
b/board/sophgo/licheerv_nano/board.c
new file mode 100644
index
0000000000000000000000000000000000000000..eaa47be17396915e74c141e09fef752c07719f73
--- /dev/null
+++ b/board/sophgo/licheerv_nano/board.c
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2024, Kongyang Liu <seashell11234...@gmail.com>
+ */
+
+int board_init(void)
+{
+ return 0;
+}
diff --git a/configs/sipeed_licheerv_nano_defconfig
b/configs/sipeed_licheerv_nano_defconfig
new file mode 100644
index
0000000000000000000000000000000000000000..14fefa968c677f3d56c42f8ad6bd38c02b17b017
--- /dev/null
+++ b/configs/sipeed_licheerv_nano_defconfig
@@ -0,0 +1,47 @@
+CONFIG_RISCV=y
+CONFIG_SYS_MALLOC_LEN=0x820000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x82300000
+CONFIG_DEFAULT_DEVICE_TREE="sg2002-licheerv-nano-b"
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_SYS_LOAD_ADDR=0x80080000
+CONFIG_IDENT_STRING="licheerv_nano"
+CONFIG_TARGET_LICHEERV_NANO=y
+CONFIG_ARCH_RV64I=y
+CONFIG_RISCV_SMODE=y
+CONFIG_FIT=y
+CONFIG_BOOTSTD_FULL=y
+# CONFIG_BOOTMETH_EFI_BOOTMGR is not set
+CONFIG_SD_BOOT=y
+CONFIG_BOOTCOMMAND="run distro_bootcmd"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=544
+CONFIG_SYS_PROMPT="licheerv_nano# "
+# CONFIG_CMD_BOOTDEV is not set
+CONFIG_CMD_MBR=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_POWEROFF=y
+# CONFIG_CMD_MII is not set
+CONFIG_CMD_SYSBOOT=y
+CONFIG_CMD_EXT4_WRITE=y
+# CONFIG_ISO_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+CONFIG_ENV_OVERWRITE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_CLK_SOPHGO_CV1800B=y
+CONFIG_MMC=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ADMA=y
+CONFIG_MMC_SDHCI_CV1800B=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SPI=y
+CONFIG_CV1800B_SPIF=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_CV1800B=y
diff --git a/include/configs/licheerv_nano.h b/include/configs/licheerv_nano.h
new file mode 100644
index
0000000000000000000000000000000000000000..2ea7943f66f46aa59f59d4aa7c2e8f7e4d84d301
--- /dev/null
+++ b/include/configs/licheerv_nano.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2024, Thomas Bonnefille <thomas.bonnefi...@bootlin.com>
+ *
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <config_distro_bootcmd.h>
+
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0)
+
+#define CFG_SYS_SDRAM_BASE 0x80000000
+
+#define CFG_EXTRA_ENV_SETTINGS "consoledev=ttyS0\0" \
+
"baudrate=115200\0" \
+
"fdt_addr_r=0x82000000\0" \
+
"kernel_addr_r=0x81000000\0" \
+
"scriptaddr=0x80c00000\0" \
+ BOOTENV
+
+#endif /* __CONFIG_H */
--
2.47.0
