Hi Simon,
On Sat, Dec 19, 2020 at 7:58 AM Simon Glass wrote:
> Hi Padmarao,
>
> On Mon, 14 Dec 2020 at 04:09, Padmarao Begari
> wrote:
> >
> > Add clock driver code for the Microchip PolarFire SoC. This driver
> > handles reset and clock control of the
dma_addr_t holds any valid DMA address. If the DMA API only uses 32/64-bit
addresses, dma_addr_t need only be 32/64 bits wide.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
---
arch/riscv/Kconfig | 4
arch/riscv/include/asm/types.h | 4
2
Update doc for the U-Boot logs are on UART0
- Move clock and reset index source into patch4
- Remove "dma_addr_r" type in the macb driver
- Add lower_32_bits() for 32-bit address in the macb driver
- Add set_rate() returns the new clock rate in the clock driver
Padmarao Begari (7):
ris
not 32-bit So 64-bit DMA is enabled for the Microchip PolarFire SoC GEM.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Tested-by: Bin Meng
---
drivers/net/macb.c | 131 +++--
drivers/net/macb.h | 6 +++
2 files changed, 120 insertions(+), 17
Add clock driver code for the Microchip PolarFire SoC. This driver
handles reset and clock control of the Microchip PolarFire SoC device.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Tested-by: Bin Meng
---
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile
Read phy address from device tree and use it to find the phy device
if not found then search in the range of 0 to 31.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
drivers/net/macb.c | 13 +
1 file changed, 13 insertions
+ OpenSBI.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
board/microchip/mpfs_icicle/Kconfig | 23 ++
board/microchip/mpfs_icicle/mpfs_icicle.c | 99 ++-
configs/microchip_mpfs_icicle_defconfig | 9 ++-
include
This doc describes the procedure to build, flash and
boot Linux using U-boot on Microchip MPFS Icicle Kit.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
---
doc/board/index.rst | 1 +
doc/board/microchip/index.rst | 9 +
doc/board
Add device tree for Microchip PolarFire SoC Icicle Kit.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
---
arch/riscv/dts/Makefile | 1 +
.../dts/microchip-mpfs-icicle-kit-u-boot.dtsi | 14 +
arch/riscv/dts/microchip-mpfs-icicle-kit.dts
Hi Rick,
On Mon, Jan 11, 2021 at 8:26 AM Rick Chen wrote:
> Hi Padmarao
>
> > From: Padmarao Begari [mailto:padmarao.beg...@microchip.com]
> > Sent: Tuesday, December 22, 2020 9:12 PM
> > To: u-boot@lists.denx.de; bmeng...@gmail.com; Rick Jian-Zhi Chen(陳建志);
>
Read phy address from device tree and use it to find the phy device
if not found then search in the range of 0 to 31.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
drivers/net/macb.c | 13 +
1 file changed, 13 insertions
not 32-bit So 64-bit DMA is enabled for the Microchip PolarFire SoC GEM.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Tested-by: Bin Meng
---
drivers/net/macb.c | 131 +++--
drivers/net/macb.h | 6 +++
2 files changed, 120 insertions(+), 17
dma_addr_t holds any valid DMA address. If the DMA API only uses 32/64-bit
addresses, dma_addr_t need only be 32/64 bits wide.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
---
arch/riscv/Kconfig | 4
arch/riscv/include
r
- Add lower_32_bits() for 32-bit address in the macb driver
- Add set_rate() returns the new clock rate in the clock driver
Padmarao Begari (7):
riscv: Add DMA 64-bit address support
net: macb: Add DMA 64-bit address support for macb
net: macb: Add phy address to read it from device tree
Add clock driver code for the Microchip PolarFire SoC. This driver
handles reset and clock control of the Microchip PolarFire SoC device.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Tested-by: Bin Meng
---
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile
Add device tree for Microchip PolarFire SoC Icicle Kit.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
---
arch/riscv/dts/Makefile | 1 +
.../dts/microchip-mpfs-icicle-kit-u-boot.dtsi | 14 +
arch/riscv/dts/microchip-mpfs-icicle-kit.dts
+ OpenSBI.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
board/microchip/mpfs_icicle/Kconfig | 23 ++
board/microchip/mpfs_icicle/mpfs_icicle.c | 99 ++-
configs/microchip_mpfs_icicle_defconfig | 9 ++-
include
This doc describes the procedure to build, flash and
boot Linux using U-boot on Microchip MPFS Icicle Kit.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
---
doc/board/index.rst | 1 +
doc/board/microchip/index.rst | 9 +
doc/board
Hi Tom,
On Thu, Jan 14, 2021 at 1:31 AM Tom Rini wrote:
> On Wed, Jan 13, 2021 at 01:34:55PM +0800, ub...@andestech.com wrote:
>
> > Hi Tom,
> >
> > Please pull some riscv updates:
> >
> > - Update qemu-riscv.rst build instructions.
> > - Add support for SPI on Kendryte K210.
> > - Add Microchip
Hi Eugen,
On Thu, Jan 14, 2021 at 4:50 PM wrote:
> On 17.12.2020 07:22, Padmarao Begari - I30397 wrote:
> > Hi Eugen,
> >
> > This series of patches break my side of work(patches) so you need to
> > create patches after my patches are going into master branch because
te doc for the U-Boot logs are on UART0
- Move clock and reset index source into patch4
- Remove "dma_addr_r" type in the macb driver
- Add lower_32_bits() for 32-bit address in the macb driver
- Add set_rate() returns the new clock rate in the clock driver
Padmarao Begari (7):
riscv:
Add device tree for Microchip PolarFire SoC Icicle Kit.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
---
arch/riscv/dts/Makefile | 1 +
.../dts/microchip-mpfs-icicle-kit-u-boot.dtsi | 14 +
arch/riscv/dts/microchip-mpfs-icicle-kit.dts
Read phy address from device tree and use it to find the phy device
if not found then search in the range of 0 to 31.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
drivers/net/macb.c | 13 +
1 file changed, 13 insertions
not 32-bit So 64-bit DMA is enabled for the Microchip PolarFire SoC GEM.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Tested-by: Bin Meng
---
drivers/net/macb.c | 131 +++--
drivers/net/macb.h | 6 +++
2 files changed, 120 insertions(+), 17
Add clock driver code for the Microchip PolarFire SoC. This driver
handles reset and clock control of the Microchip PolarFire SoC device.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Tested-by: Bin Meng
---
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile
dma_addr_t holds any valid DMA address. If the DMA API only uses 32/64-bit
addresses, dma_addr_t need only be 32/64 bits wide.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
---
arch/riscv/Kconfig | 4
arch/riscv/include
This doc describes the procedure to build, flash and
boot Linux using U-boot on Microchip MPFS Icicle Kit.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
---
doc/board/index.rst | 1 +
doc/board/microchip/index.rst | 9 +
doc/board
+ OpenSBI.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
board/microchip/mpfs_icicle/Kconfig | 23 ++
board/microchip/mpfs_icicle/mpfs_icicle.c | 99 ++-
configs/microchip_mpfs_icicle_defconfig | 9 ++-
include
Hi Eugen,
On Fri, Jan 15, 2021 at 1:34 PM wrote:
> On 15.01.2021 06:02, Padmarao Begari wrote:
> > Hi Eugen,
> >
> > On Thu, Jan 14, 2021 at 4:50 PM > <mailto:eugen.hris...@microchip.com>> wrote:
> >
> > On 17.12.2020 07:22, Padmar
Hi Sean,
On Thu, Mar 11, 2021 at 7:18 AM Sean Anderson wrote:
> The HSS source uses an "mpfs" prefix with the icicle board name. Change our
> documentation to match.
>
Signed-off-by: Sean Anderson
> ---
>
> doc/board/microchip/mpfs_icicle.rst | 6 +++---
> 1 file changed, 3 insertions(+), 3 de
Hi Sean,
On Tue, Mar 16, 2021 at 9:52 AM Sean Anderson wrote:
> On 3/16/21 12:05 AM, Padmarao Begari wrote:
> > Hi Sean,
> >
> > On Thu, Mar 11, 2021 at 7:18 AM Sean Anderson <mailto:sean...@gmail.com>> wrote:
> >
> > The HSS source uses a
+++ b/configs/microchip_mpfs_icicle_defconfig
> @@ -1,4 +1,5 @@
> CONFIG_RISCV=y
> +CONFIG_SYS_MALLOC_F_LEN=0x2000
> CONFIG_ENV_SIZE=0x2000
> CONFIG_DEFAULT_DEVICE_TREE="microchip-mpfs-icicle-kit"
> CONFIG_TARGET_MICROCHIP_ICICLE=y
> --
> 2.25.1
>
>
Reviewed-by: Padmarao Begari
Tested-by: Padmarao Begari
; .probe = mpfs_clk_probe,
> .priv_auto = sizeof(struct clk),
> + .flags = DM_FLAG_PRE_RELOC,
> };
> --
> 2.25.1
>
>
Reviewed-by: Padmarao Begari
Tested-by: Padmarao Begari
fg CLK_MMUART2>;
> status = "okay";
> };
> @@ -316,7 +313,6 @@
> reg-shift = <2>;
> interrupt-parent = <&plic>;
> interrupts = <93>;
> - clock-frequency = <15000>;
> clocks = <&clkcfg CLK_MMUART3>;
> status = "okay";
> };
> --
> 2.25.1
>
>
Reviewed-by: Padmarao Begari
Tested-by: Padmarao Begari
FPGA reference design and a small 4MB reservation is
made at the end of 32-bit DDR to provide some memory for the HSS
to use, add Microchip QSPI driver.
Padmarao Begari (4):
riscv: dts: update memory configuration
riscv: dts: Add QSPI NAND device node
riscv: Update Microchip MPFS Icicle Kit
context.
Signed-off-by: Padmarao Begari
Signed-off-by: Conor Dooley
---
arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 70
1 file changed, 14 insertions(+), 56 deletions(-)
diff --git a/arch/riscv/dts/microchip-mpfs-icicle-kit.dts
b/arch/riscv/dts/microchip-mpfs-icicle
Add QSPI NAND device node to the Microchip PolarFire SoC
Icicle kit device tree
Signed-off-by: Padmarao Begari
---
arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/riscv/dts/microchip-mpfs-icicle-kit.dts
b/arch/riscv/dts
This patch updates Microchip MPFS Icicle Kit support. For now,
add Microchip QSPI driver and a small 4MB reservation is
made at the end of 32-bit DDR to provide some memory for
the HSS to use.
Signed-off-by: Padmarao Begari
---
board/microchip/mpfs_icicle/Kconfig | 7 +++
configs
Add QSPI driver code for the Microchip PolarFire SoC.
This driver supports the qspi standard, dual and quad
mode interfaces.
Signed-off-by: Padmarao Begari
Signed-off-by: Naga Sureshkumar Relli
---
drivers/spi/Kconfig | 6 +
drivers/spi/Makefile | 1 +
drivers/spi
with microchip-coreqspi
- Add microchip,coreqspi-rtl-v2 to the compatible list
- Use MICROCHIP_COREQSPI instead of MICROCHIP_QSPI in kconfig
Padmarao Begari (4):
riscv: dts: Update memory configuration
riscv: dts: Add QSPI NAND device node
spi: Add Microchip PolarFire SoC QSPI driver
riscv
context.
Co-developed-by: Conor Dooley
Signed-off-by: Conor Dooley
Signed-off-by: Padmarao Begari
Reviewed-by: Conor Dooley
---
arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 70
1 file changed, 14 insertions(+), 56 deletions(-)
diff --git a/arch/riscv/dts/microchip-mpfs
Add QSPI NAND device node to the Microchip PolarFire SoC
Icicle kit device tree.
The Winbond NAND flash memory can be connected to the
Icicle Kit by using the Mikroe Flash 5 click board and
the Pi 3 Click shield.
Signed-off-by: Padmarao Begari
---
arch/riscv/dts/microchip-mpfs-icicle-kit.dts
Add QSPI driver code for the Microchip PolarFire SoC.
This driver supports the QSPI standard, dual and quad
mode interfaces.
Co-developed-by: Naga Sureshkumar Relli
Signed-off-by: Naga Sureshkumar Relli
Signed-off-by: Padmarao Begari
---
drivers/spi/Kconfig | 6 +
drivers/spi
This patch updates Microchip MPFS Icicle Kit support. For now,
add Microchip QSPI driver and a small 4MB reservation is
made at the end of 32-bit DDR to provide some memory for
the HSS to use.
Signed-off-by: Padmarao Begari
Reviewed-by: Conor Dooley
---
board/microchip/mpfs_icicle/Kconfig
:
- Add Co-developed-by with patch
- Replace spi-nand with flash in device node
- Add board details for QSPI NAND
- Rename QSPI driver file with microchip-coreqspi
- Add microchip,coreqspi-rtl-v2 to the compatible list
- Use MICROCHIP_COREQSPI instead of MICROCHIP_QSPI in kconfig
Padmarao Begari (4
.
Co-developed-by: Conor Dooley
Signed-off-by: Conor Dooley
Signed-off-by: Padmarao Begari
Reviewed-by: Conor Dooley
---
arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 75 +---
1 file changed, 17 insertions(+), 58 deletions(-)
diff --git a/arch/riscv/dts/microchip-mpfs-icicle
Add QSPI NAND device node to the Microchip PolarFire SoC
Icicle kit device tree.
The Winbond NAND flash memory can be connected to the
Icicle Kit by using the Mikroe Flash 5 click board and
the Pi 3 Click shield.
Signed-off-by: Padmarao Begari
Reviewed-by: Conor Dooley
---
arch/riscv/dts
Add QSPI driver code for the Microchip PolarFire SoC.
This driver supports the QSPI standard, dual and quad
mode interfaces.
Co-developed-by: Naga Sureshkumar Relli
Signed-off-by: Naga Sureshkumar Relli
Signed-off-by: Padmarao Begari
Reviewed-by: Conor Dooley
---
drivers/spi/Kconfig
This patch updates Microchip MPFS Icicle Kit support. For now,
add Microchip QSPI driver and a small 4MB reservation is
made at the end of 32-bit DDR to provide some memory for
the HSS to use.
Signed-off-by: Padmarao Begari
Reviewed-by: Conor Dooley
---
board/microchip/mpfs_icicle/Kconfig
> On 17-Nov-2020, at 7:46 AM, Bin Meng wrote:
>
> On Tue, Nov 10, 2020 at 6:46 PM Padmarao Begari
> wrote:
>>
>> Add device tree for Microchip PolarFire SoC Icicle Kit.
>>
>> Signed-off-by: Padmarao Begari
>> Reviewed-by: Anu
ONFIG_DMA_ADDR_T_64BIT.
Regards
Padmarao
On Sun, Nov 15, 2020 at 5:40 PM Anup Patel wrote:
> On Tue, Nov 10, 2020 at 4:16 PM Padmarao Begari
> wrote:
> >
> > Enable 32-bit or 64-bit DMA in the macb driver based on the design
> > config debug6 register of MACB hardware which sup
Hi Anup,
On Thu, Nov 26, 2020 at 11:08 AM Anup Patel wrote:
> On Thu, Nov 26, 2020 at 10:33 AM Padmarao Begari
> wrote:
> >
> > Hi Anup
> >
> > I have tested the MACB driver patch with the SiFive unleashed board and
> it's not working because of the GEM_D
ew clock rate in the clock driver
Padmarao Begari (7):
riscv: Add DMA 64-bit address support
net: macb: Add DMA 64-bit address support for macb
net: macb: Add phy address to read it from device tree
clk: Add Microchip PolarFire SoC clock driver
riscv: dts: Add device tree for Microchip Ici
dma_addr_t holds any valid DMA address. If the DMA API only uses 32/64-bit
addresses, dma_addr_t need only be 32/64 bits wide.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
arch/riscv/Kconfig | 4
arch/riscv/include/asm/types.h | 4
2 files changed, 8
Enable 32-bit or 64-bit DMA in the macb driver based on the macb
compatible string of the device tree node.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
drivers/net/macb.c | 131 +++--
drivers/net/macb.h | 6 +++
2 files changed, 120
Add clock driver code for the Microchip PolarFire SoC. This driver
handles reset and clock control of the Microchip PolarFire SoC device.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile
Add device tree for Microchip PolarFire SoC Icicle Kit.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
arch/riscv/dts/Makefile | 1 +
.../dts/microchip-mpfs-icicle-kit-u-boot.dtsi | 14 +
arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 421
Read phy address from device tree and use it to find the phy device
if not found then search in the range of 0 to 31.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
drivers/net/macb.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/net/macb.c b/drivers
+ OpenSBI.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
board/microchip/mpfs_icicle/Kconfig | 24 ++
board/microchip/mpfs_icicle/mpfs_icicle.c | 97 ++-
configs/microchip_mpfs_icicle_defconfig | 9 ++-
include/configs/microchip_mpfs_icicle.h | 60
This doc describes the procedure to build, flash and
boot Linux using U-boot on Microchip MPFS Icicle Kit.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
doc/board/index.rst | 1 +
doc/board/microchip/index.rst | 9 +
doc/board/microchip/mpfs_icicle.rst
Hi Bin,
On Fri, Nov 27, 2020 at 7:13 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Fri, Nov 27, 2020 at 8:18 PM Padmarao Begari
> wrote:
> >
> > Add device tree for Microchip PolarFire SoC Icicle Kit.
> >
> > Signed-off-by: Padmarao Begari
> > Reviewed-b
Hi Cyril,
On Fri, Nov 27, 2020 at 9:45 PM wrote:
> On 11/27/20 1:43 PM, Bin Meng wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know
> the content is safe
> >
> > Hi Padmarao,
> >
> > On Fri, Nov 27, 2020 at 8:18 PM Padmarao Beg
Hi Cyril,
On Fri, Nov 27, 2020 at 9:47 PM wrote:
> Hi Padmarao,
>
> On 11/27/20 12:04 PM, Padmarao Begari wrote:
> > This patch set adds Microchip PolarFire SoC Icicle Kit support
> > to RISC-V U-Boot.
> >
> > The patches are based upon latest U-Boot tree
>
Hi Cyril,
On Fri, Nov 27, 2020 at 10:05 PM wrote:
> Hi Padmarao,
>
> On 11/27/20 12:04 PM, Padmarao Begari wrote:
> > This doc describes the procedure to build, flash and
> > boot Linux using U-boot on Microchip MPFS Icicle Kit.
> >
> > Signed-off-by: Padma
address in the macb driver
- Add set_rate() returns the new clock rate in the clock driver
Padmarao Begari (7):
riscv: Add DMA 64-bit address support
net: macb: Add DMA 64-bit address support for macb
net: macb: Add phy address to read it from device tree
clk: Add Microchip PolarFire S
dma_addr_t holds any valid DMA address. If the DMA API only uses 32/64-bit
addresses, dma_addr_t need only be 32/64 bits wide.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
arch/riscv/Kconfig | 4
arch/riscv/include/asm/types.h | 4
2 files changed, 8
Add clock driver code for the Microchip PolarFire SoC. This driver
handles reset and clock control of the Microchip PolarFire SoC device.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile
Enable 32-bit or 64-bit DMA in the macb driver based on the macb
compatible string of the device tree node.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
drivers/net/macb.c | 131 +++--
drivers/net/macb.h | 6 +++
2 files changed, 120
Read phy address from device tree and use it to find the phy device
if not found then search in the range of 0 to 31.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
drivers/net/macb.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/net/macb.c b/drivers
+ OpenSBI.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
board/microchip/mpfs_icicle/Kconfig | 24 ++
board/microchip/mpfs_icicle/mpfs_icicle.c | 97 ++-
configs/microchip_mpfs_icicle_defconfig | 9 ++-
include/configs/microchip_mpfs_icicle.h | 60
Add device tree for Microchip PolarFire SoC Icicle Kit.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
arch/riscv/dts/Makefile | 1 +
.../dts/microchip-mpfs-icicle-kit-u-boot.dtsi | 14 +
arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 421
This doc describes the procedure to build, flash and
boot Linux using U-boot on Microchip MPFS Icicle Kit.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
doc/board/index.rst | 1 +
doc/board/microchip/index.rst | 9 +
doc/board/microchip/mpfs_icicle.rst
Hi Rick,
On Thu, Dec 10, 2020 at 8:33 AM Rick Chen wrote:
> Hi Padmarao
>
> > From: Padmarao Begari [mailto:padmarao.beg...@microchip.com]
> > Sent: Thursday, December 03, 2020 4:32 AM
> > To: u-boot@lists.denx.de; bmeng...@gmail.com; Rick Jian-Zhi Chen(陳建志);
>
Hi Bin,
On Thu, Dec 10, 2020 at 12:08 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Thu, Dec 3, 2020 at 4:44 AM Padmarao Begari
> wrote:
> >
> > This doc describes the procedure to build, flash and
> > boot Linux using U-boot on Microchip MPFS Icicle Kit.
> >
Hi Bin,
On Thu, Dec 10, 2020 at 6:48 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Thu, Dec 3, 2020 at 4:44 AM Padmarao Begari
> wrote:
> >
> > Add device tree for Microchip PolarFire SoC Icicle Kit.
> >
> > Signed-off-by: Padmarao Begari
> > Reviewed-b
Hi Bin,
On Thu, Dec 10, 2020 at 3:54 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Thu, Dec 3, 2020 at 4:44 AM Padmarao Begari
> wrote:
> >
> > This patch adds Microchip MPFS Icicle Kit support. For now, only
> > NS16550 Serial, Microchip clock, Cadence eMMC and MAC
Hi Bin,
On Thu, Dec 10, 2020 at 4:25 PM Bin Meng wrote:
> On Thu, Dec 10, 2020 at 6:04 PM Bin Meng wrote:
> >
> > On Thu, Dec 3, 2020 at 4:44 AM Padmarao Begari
> > wrote:
> > >
> > > Add clock driver code for the Microchip PolarFire SoC. This driver
&
Hi Bin,
On Thu, Dec 10, 2020 at 4:11 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Thu, Dec 3, 2020 at 4:43 AM Padmarao Begari
> wrote:
> >
> > dma_addr_t holds any valid DMA address. If the DMA API only uses
> 32/64-bit
> > addresses, dma_addr_t need only be 32/64
Hi Bin,
On Fri, Dec 11, 2020 at 1:22 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Fri, Dec 11, 2020 at 3:10 PM Padmarao Begari
> wrote:
> >
> > Hi Bin,
> >
> > On Thu, Dec 10, 2020 at 4:11 PM Bin Meng wrote:
> >>
> >> Hi Padmarao,
&g
Hi Bin,
On Fri, Dec 11, 2020 at 1:31 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Thu, Dec 3, 2020 at 4:44 AM Padmarao Begari
> wrote:
> >
> > Add device tree for Microchip PolarFire SoC Icicle Kit.
> >
> > Signed-off-by: Padmarao Begari
> > Reviewed
Hi Bin,
On Thu, Dec 10, 2020 at 4:08 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Thu, Dec 10, 2020 at 6:33 PM Bin Meng wrote:
> >
> > Hi Padmarao,
> >
> > On Thu, Dec 3, 2020 at 4:44 AM Padmarao Begari
> > wrote:
> > >
> > > Enable
Hi Bin,
On Thu, Dec 10, 2020 at 4:08 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Thu, Dec 10, 2020 at 6:33 PM Bin Meng wrote:
> >
> > Hi Padmarao,
> >
> > On Thu, Dec 3, 2020 at 4:44 AM Padmarao Begari
> > wrote:
> > >
> > > Enable
Hi Bin,
On Fri, Dec 11, 2020 at 2:55 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Fri, Dec 11, 2020 at 4:32 PM Padmarao Begari
> wrote:
> >
> > Hi Bin,
> >
> > On Fri, Dec 11, 2020 at 1:31 PM Bin Meng wrote:
> >>
> >> Hi Padmarao,
&g
Hi Bin,
On Fri, Dec 11, 2020 at 2:59 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Fri, Dec 11, 2020 at 4:49 PM Padmarao Begari
> wrote:
> >
> > Hi Bin,
> >
> > On Thu, Dec 10, 2020 at 4:08 PM Bin Meng wrote:
> >>
> >> Hi Padmarao,
>
Hi Bin,
On Fri, Dec 11, 2020 at 2:57 PM Bin Meng wrote:
> HI Padmarao,
>
> On Fri, Dec 11, 2020 at 4:23 PM Padmarao Begari
> wrote:
> >
> > Hi Bin,
> >
> > On Fri, Dec 11, 2020 at 1:22 PM Bin Meng wrote:
> >>
> >> Hi Padmarao,
> >>
dma_addr_t holds any valid DMA address. If the DMA API only uses 32/64-bit
addresses, dma_addr_t need only be 32/64 bits wide.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
arch/riscv/Kconfig | 4
arch/riscv/include/asm/types.h | 4
2 files changed, 8
d lower_32_bits() for 32-bit address in the macb driver
- Add set_rate() returns the new clock rate in the clock driver
Padmarao Begari (7):
riscv: Add DMA 64-bit address support
net: macb: Add DMA 64-bit address support for macb
net: macb: Add phy address to read it from device tree
clk: Add
not 32-bit So 64-bit DMA is enabled for the Microchip PolarFire SoC GEM.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
drivers/net/macb.c | 131 +++--
drivers/net/macb.h | 6 +++
2 files changed, 120 insertions(+), 17 deletions(-)
diff --git
Read phy address from device tree and use it to find the phy device
if not found then search in the range of 0 to 31.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
drivers/net/macb.c | 13 +
1 file changed, 13 insertions
Add clock driver code for the Microchip PolarFire SoC. This driver
handles reset and clock control of the Microchip PolarFire SoC device.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile
Add device tree for Microchip PolarFire SoC Icicle Kit.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
---
arch/riscv/dts/Makefile | 1 +
.../dts/microchip-mpfs-icicle-kit-u-boot.dtsi | 14 +
arch/riscv/dts/microchip-mpfs-icicle-kit.dts
+ OpenSBI.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
board/microchip/mpfs_icicle/Kconfig | 23 ++
board/microchip/mpfs_icicle/mpfs_icicle.c | 99 ++-
configs/microchip_mpfs_icicle_defconfig | 9 ++-
include/configs/microchip_mpfs_icicle.h | 60
This doc describes the procedure to build, flash and
boot Linux using U-boot on Microchip MPFS Icicle Kit.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
doc/board/index.rst | 1 +
doc/board/microchip/index.rst | 9 +
doc/board/microchip/mpfs_icicle.rst
This patch adds Microchip MPFS Icicle Board support.
For now, NS16550 serial driver is only enabled.
The Microchip MPFS Icicle defconfig by default builds
U-Boot for M-Mode with SMP support.
Signed-off-by: Padmarao Begari
---
arch/riscv/Kconfig| 4 ++
board/microchip
Hi Bin,
On Tue, Apr 23, 2019 at 6:42 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Thu, Apr 18, 2019 at 2:21 AM Padmarao Begari
> wrote:
> >
> > This patch adds Microchip MPFS Icicle Board support.
>
> nits: Board->board. Please fix the commit message too.
>
Ok
This patch adds Microchip MPFS Icicle board support.
For now, NS16550 serial driver is only enabled.
The Microchip MPFS Icicle defconfig by default builds
U-Boot for M-Mode with SMP support.
Signed-off-by: Padmarao Begari
Changes in v2
- Fix some typos
- Rename target board to
I think, the boot flow explained above is supported the sifive fu540 board
default boot mode.
if we want to select debug mode, then, does this patches work with the
u-boot to TFTP booting(dhcp, bootp) in debug mode?
Regards
Padmarao
On Fri, Mar 22, 2019 at 4:47 AM Atish Patra wrote:
> On 3/21/1
Hi Bin,
On Wed, May 8, 2019 at 7:20 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Thu, May 2, 2019 at 2:28 PM Padmarao Begari
> wrote:
> >
> > This patch adds Microchip MPFS Icicle board support.
> > For now, NS16550 serial driver is only enabled.
> > The Microc
This patch adds Microchip MPFS Icicle board support.
For now, NS16550 serial driver is only enabled.
The Microchip MPFS Icicle defconfig by default builds
U-Boot for M-Mode with SMP support.
Signed-off-by: Padmarao Begari
---
Changes in v3
- Fix some typos
- Remove CONFIG_DM, CONFIG_DM_SERIAL
Hi Lukas,
On Mon, May 20, 2019 at 5:33 PM Auer, Lukas
wrote:
> Hi Padmarao,
>
> On Mon, 2019-05-13 at 16:18 +0530, Padmarao Begari wrote:
> > This patch adds Microchip MPFS Icicle board support.
> > For now, NS16550 serial driver is only enabled.
> > The Microch
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