Add QSPI NAND device node to the Microchip PolarFire SoC Icicle kit device tree
Signed-off-by: Padmarao Begari <padmarao.beg...@microchip.com> --- arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/riscv/dts/microchip-mpfs-icicle-kit.dts b/arch/riscv/dts/microchip-mpfs-icicle-kit.dts index 876c475069..679221e13f 100644 --- a/arch/riscv/dts/microchip-mpfs-icicle-kit.dts +++ b/arch/riscv/dts/microchip-mpfs-icicle-kit.dts @@ -18,6 +18,7 @@ aliases { serial1 = &uart1; ethernet0 = &mac1; + spi0 = &qspi; }; chosen { @@ -113,3 +114,17 @@ ti,fifo-depth = <0x1>; }; }; + +&qspi { + status = "okay"; + num-cs = <1>; + flash0: spi-nand@0 { + compatible = "spi-nand"; + reg = <0x0>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <20000000>; + spi-cpol; + spi-cpha; + }; +}; -- 2.25.1