Hi Toni,
Do you know who will review and accept the other patches in the
"LPC32xx: enhancement and update" series that were not review?
For your convenience this is a list of links to patchwork:
* http://patchwork.ozlabs.org/patch/500510/
* http://patchwork.ozlabs.org/patch/500512/
* http://patch
Hi Vladimir,
> -Original Message-
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
> Sent: 11-Aug-15 12:57 PM
>
> A number of LPC32xx SLC NAND defines is dictated by controller
> hardware limits and OOB layout is defined by operating system, the
> definitions are common for all users. Si
Hi Vladimir,
> -Original Message-
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
> Sent: 11-Aug-15 6:10 PM
>
> Hi Sylvain,
>
> On 11.08.2015 23:16, LEMIEUX, SYLVAIN wrote:
> > Hi Vladimir,
> >
> >> -Original Message-
> >&
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert ARIBAUD
> Sent: 29-Jun-15 4:25 AM
>
> Bonjour Vladimir,
>
> Le Mon, 29 Jun 2015 03:35:12 +0300, Vladimir Zapolskiy a
> écrit :
>
> > The lpc32xx_eth_phylib_init() function is capable to connect L
Hi Vladimir,
> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: 12-Aug-15 3:42 PM
>
> On Wednesday, August 12, 2015 at 07:55:29 PM, Vladimir Zapolskiy wrote:
> > Hi Sylvain,
> >
> > On 10.08.2015 15:16, slemieux.t...@gmail.com wrote:
> > > From: Sylvain Lemieux
> > >
Hi Vladimir and Marek,
> -Original Message-
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
> Sent: 12-Aug-15 1:55 PM
>
> Hi Sylvain,
>
> On 10.08.2015 15:16, slemieux.t...@gmail.com wrote:
> > From: Sylvain Lemieux
> >
> > Incorporate USB driver from legacy LPCLinux NXP BSP.
> > The f
> -Original Message-
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
> Sent: 12-Aug-15 1:22 PM
>
> LPC32xx has 3 I2C bus controllers, 2 of them are used as generic ones
> and their parent clock is HCLK and CLK_HI/CLK_LO registers are 10 bit
> wide. This means that if HCLK is 104MHz, the
> -Original Message-
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
> Sent: 12-Aug-15 8:05 PM
>
> Hi Sylvain,
>
> On 12.08.2015 23:00, LEMIEUX, SYLVAIN wrote:
> > Hi Vladimir and Marek,
> >
> >> -Original Message-
> >> From: V
> -Original Message-
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
> Sent: 12-Aug-15 1:32 PM
>
> The change adds a number of macro definitions used by USB OHCI driver,
> if CONFIG_USB_OHCI_LPC32XX is selected from a board config file.
>
> Signed-off-by: Vladimir Zapolskiy
> ---
> Bas
Hi Tom,
I resynchronize the master branch this morning,
and only patch 7/7 of the series appear in u-boot/master;
Is it possible that patch 1/7 to 6/7 were not applied?
For your convenience this is a list of links to patchwork:
* http://patchwork.ozlabs.org/patch/500510/
* http://patchwork.ozlab
All,
As per the feedback from Vladimir I tested building the SPL for devkit3250
with the DMA option selected, the DMA driver is not compile.
Is there anything to do to ensure the DMA driver makefile is process
when building the SPL?
For testing purpose, I added the following line to the NAND mak
> -Original Message-
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
> Sent: 14-Aug-15 11:58 AM
> To: slemieux.t...@gmail.com; u-boot@lists.denx.de
> Cc: scottw...@freescale.com; ma...@denx.de; albert.u.b...@aribaud.net;
> LEMIEUX, SYLVAIN; Tom Rini
> Subject: Re
> -Original Message-
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
> Sent: 26-Aug-15 8:17 PM
>
> Because there is an originally defined CLK_DMA_ENABLE macro in clk.h,
> no reason to add another DMA_CLK_ENABLE macro with the same value.
>
> Remove DMA_CLK_ENABLE, since it does not follo
> >
> > On 18.07.2015 01:24, LEMIEUX, SYLVAIN wrote:
> > > Hi Albert,
> > >
> > > Thanks for the feedback.
> > >
> > >> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert
> > >> ARIBAUD
> > >> Se
Hi Vladimir,
See comment below.
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
> Sent: 27-Jul-15 8:22 PM
>
> Hi Sylvain,
>
> On 28.07.2015 00:45, LEMIEUX, SYLVAIN wrote:
> > Hi Vladimir and Albert,
> >
> > See comment, questions and test results
Hi Marek,
Thanks for the feedback;
I will look into it and submit an updated version once I get feedback
for the other patches.
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Marek Vasut
>
> On Wednesday, July 29, 2015 at 06:14:07 PM, slemieux.t...@gmail.com wrote:
> > From: S
Hi Vladimir, Marek,
Thanks for the feedback; see comments below.
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Vladimir
> Zapolskiy
>
> Hi Marek, Sylvain,
>
> On 29.07.2015 19:50, Marek Vasut wrote:
> > On Wednesday, July 29, 2015 at 06:14:08 PM, slemieux.t...@gmail.com wrote
> From: Scott Wood [mailto:scottw...@freescale.com]
> Sent: 27-Jul-15 9:24 PM
>
> On Sat, 2015-07-18 at 03:07 +0300, Vladimir Zapolskiy wrote:
> > The change adds support of LPC32xx SLC NAND controller.
> >
> > LPC32xx SoC has two different mutually exclusive NAND controllers to
> > communicate wit
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Vladimir
> Zapolskiy
> Sent: 6-Jul-15 12:22 AM
>
> LPC32xx MAC and clock control configuration requires some minor quirks
> to deal with a phy connected by RMII.
>
> It's worth to mention that the kernel and legacy BSP from NXP sets
Hi Marek,
Thanks for the feedback. I will do the change and submit a new revision of the
patch.
For your question regarding reference to UART 5 inside the USB driver;
* It is possible to also route the UART5 Tx/Rx pin to the USB D+ and D- pins;
the driver ensure this is not selected.
For
Hi Marek,
Is it OK to only submit the patch that need to be update as a new
version or I always have to resubmit the complete set of patches?
See comments and question below.
Sylvain
> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
>
> On Tuesday, August 04, 2015 at 11:0
Hi Marek,
See comment and question below.
> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: 4-Aug-15 5:32 PM
>
> On Tuesday, August 04, 2015 at 11:04:38 PM, slemieux.t...@gmail.com wrote:
> > From: Sylvain Lemieux
> >
> > Incorporate DMA driver from legacy LPCLinux
Hi Vladimir,
Thanks for the feedback;
Marek, Vladimir,
there is a question below; I will wait for feedback before sending an updated
version of the patch.
Sylvain
> -Original Message-
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
>
> Hi Sylvain,
>
> On 05.08.2015 21:31, slemieux
Hi Vladimir,
See comment below.
> -Original Message-
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
>
> Hi Sylvain,
>
> On 05.08.2015 21:31, slemieux.t...@gmail.com wrote:
> > From: Sylvain Lemieux
> >
> > Incorporate USB driver from legacy LPCLinux NXP BSP.
> > The files taken from
> -Original Message-
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
> Sent: 6-Aug-15 2:43 PM
>
> Hi Sylvain,
>
> On 06.08.2015 16:50, LEMIEUX, SYLVAIN wrote:
> > Hi Vladimir,
> >
> > Thanks for the feedback;
> >
> > Marek, Vladimir,
> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: 10-Aug-15 8:24 AM
> To: slemieux.t...@gmail.com
> Cc: u-boot@lists.denx.de; scottw...@freescale.com; v...@mleia.com;
> albert.u.b...@aribaud.net; LEMIEUX, SYLVAIN
> Subject: Re: [PATCH v6 5/5] u
> -Original Message-
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
>
> Hi Sylvain,
>
> On 10.08.2015 15:16, slemieux.t...@gmail.com wrote:
> > From: Sylvain Lemieux
> >
> > Incorporate NAND SLC hardware ECC support from legacy
> > LPCLinux NXP BSP.
> > The code taken from the legacy
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Mateusz
> Kulikowski
> Sent: 14-Dec-15 7:09 PM
> To: u-boot@lists.denx.de; Marek Vasut; Joe Hershberger
> Subject: [U-Boot] [PATCH 3/5] usb: ohci-lpc32xx: Use shared wait_for_bit
>
> Use existing library function to poll bit(s).
>
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Mateusz
> Kulikowski
> Sent: 14-Dec-15 7:09 PM
> To: u-boot@lists.denx.de; Marek Vasut; Joe Hershberger
> Subject: [U-Boot] [PATCH 0/5] Add wait_for_bit()
>
>
> This series add generic function to poll register waiting for
> one or
> From: Mateusz Kulikowski [mailto:mateusz.kulikow...@gmail.com]
> Sent: 16-Dec-15 4:59 PM
> To: u-boot@lists.denx.de; Marek Vasut; LEMIEUX, SYLVAIN; Joe Hershberger
> Cc: Mateusz Kulikowski
> Subject: [PATCH v2 0/5] Add wait_for_bit()
>
> Changes in V2:
> - wait_bit
Hi Vladimir,
I tested the patch and it is working.
However, in the legacy BSP from NXP, a 10ms delay was present after the soft
reset release (to let the MII talk to the PHY) in RMII phy mode.
In my tests, the download rate was 20% to 25% slower if the 10ms delay was not
present.
Sylvain Lem
KSZ8031RNL; I will be submitting a patch to add
the support for that phy in u-boot.
Sylvain Lemieux
Tyco
-Original Message-
From: Vladimir Zapolskiy [mailto:v...@mleia.com]
Sent: 6-Jul-15 4:45 PM
To: LEMIEUX, SYLVAIN
Cc: Albert ARIBAUD; Joe Hershberger; Tom Rini; u-boot@lists.denx.de
Subject: Re
This is a minor update to LPC32xx MAC driver patch that add support for the
RMII phy mode.
In the legacy BSP from NXP, in RMII phy mode, an extra 10ms delay was present
after the release of the soft reset.
In my tests (connected using RMII phy mode to a Micrel KSZ8031RNL), the
download rate wa
Zapolskiy [mailto:v...@mleia.com]
Sent: 8-Jul-15 1:06 AM
To: LEMIEUX, SYLVAIN
Cc: joe.hershber...@ni.com; albert.arib...@3adev.fr; u-boot@lists.denx.de
Subject: Re: [PATCH 1/1] net: lpc32xx: improve download rate in RMII phy mode
Hi Sylvain,
On 07.07.2015 22:13, LEMIEUX, SYLVAIN wrote:
> Th
Hi Vladimir & Albert,
As stated before, I tested this patch and the 3 patches listed below using a
Micrel KSZ8031RNL phy connected over RMII. Everything is working properly.
1) http://patchwork.ozlabs.org/patch/489100/
2) http://patchwork.ozlabs.org/patch/489190/
3) http://patchwork.ozlabs.org/pa
Hi Vladimir and Albert,
During this merge window (once our issues with our exchange server are
resolve), we were planning on submitting a few patches for the LPC32xx.
Some of the patches are the porting of the legacy NXP BSP (u-boot) drivers into
the latest version; the drivers are the DMA, the
Hi Vladimir,
Thanks for taking time to read my feedback.
You can see my comments and my answer below.
Sylvain
> -Original Message-
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
> Sent: 15-Jul-15 8:20 PM
> To: LEMIEUX, SYLVAIN; Albert ARIBAUD
> Cc: Scott Wood; u-boo
Hi Albert,
Thanks for the feedback.
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert ARIBAUD
> Sent: 17-Jul-15 5:20 PM
>
> Hello Sylvain,
>
> On Fri, 17 Jul 2015 16:48:52 -0400, slemieux.t...@gmail.com
> wrote:
>
> > 1) Fixed checkpatch script output in legacy code.
> >
Hi Mark,
Thanks for the feedback;
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Marek Vasut
> Sent: 17-Jul-15 6:09 PM
>
> On Friday, July 17, 2015 at 10:48:54 PM, slemieux.t...@gmail.com wrote:
> > From: Sylvain Lemieux
>
> Hi!
>
> > Incorporate DMA driver from legacy LPCLinu
Hi Vladimir,
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
> Sent: 17-Jul-15 7:10 PM
>
> Hi Sylvain, Albert,
>
> On 18.07.2015 01:24, LEMIEUX, SYLVAIN wrote:
> > Hi Albert,
> >
> > Thanks for the feedback.
> >
> >> From: U-Boot [mailt
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of
> amessier.t...@gmail.com
> Sent: 1-Feb-16 5:09 PM
>
> From: Alexandre Messier
>
> There is currently one config option (CONFIG_NET_RETRY_COUNT) that
> is available to tune the retries of the network s
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