onfigure();
-->8---
instead of
-->8---
ifdef CONFIG_ISA_ARCV2
ioc_configure();
endif
-->8---
Signed-off-by: Eugeniy Paltsev
---
arch/arc/include/asm/arcregs.h | 11 +++
1 file changed, 11 insertions(+)
diff
If L1 data cache is disabled SL$ is bypassed for data and all
load/store requests are sent directly to main memory.
If L1 instructiona cache is disabled SL$ is NOT bypassed for
instructions and all instruction requests are fetched through
SLC.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib
if we enable dcache in runtime.
As we need to check status before *each* function call and we
dcache entire/line functions from different places we add
this check directly into dcache entire/line functions instead of
their callers to avoid code duplication.
Signed-off-by: Eugeniy Paltsev
---
arc
Implement icache_enabled and dcache_enabled as separate functions
which can be used with inline attribute. This is preparation to
make them always_inline.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/cache.c | 38 +-
1 file changed, 21 insertions(+), 17
e can get wrong data if L1 D$
has some entries after enable which we modified when the L1 D$ was
disabled.
* Invalidate L1 I$ before disabling. Otherwise we can execute wrong
instructions after L1 I$ enable if we modified any code when
L1 I$ was disabled.
Signed-off-by: Eugeniy Pa
Move pae exists check into slc_upper_region_init function itself
instead of its caller as more appropriate place.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/cache.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib
eed a couple of CONFIG_ISA_ARCV2
ifdefs to make compiler happy...
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/cache.c | 59 ++--
1 file changed, 29 insertions(+), 30 deletions(-)
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index efba789
Move all checks before cache flush and IOC setup.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/cache.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index 99776066d3..8203fae145 100644
--- a/arch/arc/lib/cache.c
hat we may really start from ROM.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/include/asm/global_data.h | 6 ++
arch/arc/lib/cache.c | 19 +--
2 files changed, 15 insertions(+), 10 deletions(-)
diff --git a/arch/arc/include/asm/global_data.h
b/arch/arc/i
Signed-off-by: Eugeniy Paltsev
---
arch/arc/dts/hsdk.dts | 56 +++
board/synopsys/hsdk/MAINTAINERS | 6 +-
board/synopsys/hsdk/Makefile| 4 +-
board/synopsys/hsdk/clk-lib.c | 68 +++
board/synopsys/hsdk/clk-lib.h | 17 +
board/synopsys/hsdk/env-lib.c | 295
On Tue, 2017-10-24 at 15:22 +0530, Jagan Teki wrote:
> On Tue, Oct 24, 2017 at 11:38 AM, Marek Vasut wrote:
> > On 10/23/2017 01:43 PM, Eugeniy Paltsev wrote:
> > > On Thu, 2017-10-19 at 13:20 -0500, Dinh Nguyen wrote:
> > > >
> > > > On 10/19/2017 10:51
th targets which don't use
generic clock framework.
Signed-off-by: Eugeniy Paltsev
---
Marek, Jagan,
How about this implementation?
As both SOCFPGA_GEN5 and SOCFPGA_ARRIA10 don't use generic clock framework,
we can determine way of clock getting based on CONFIG_IS_ENABLED(CLK) macro.
So we
Implement dw_spi_get_clk function to override its weak
implementation in designware_spi.c driver.
We need this change to get rid of cm_get_spi_controller_clk_hz
function and clock_manager.h include in designware_spi.c driver.
Signed-off-by: Eugeniy Paltsev
---
arch/arm/mach-socfpga
r_arria10.c) instead.
Eugeniy Paltsev (2):
SOCFPGA: clock manager: implement dw_spi_get_clk function
DW SPI: Get clock value from Device Tree
arch/arm/mach-socfpga/clock_manager_arria10.c | 9 +
arch/arm/mach-socfpga/clock_manager_gen5.c| 9 +
drivers/spi/designware_spi.c
nager.
Get rid of clock_manager.h include as we don't use
cm_get_spi_controller_clk_hz function anymore. (we use redefined
dw_spi_get_clk in SOCFPGA clock managers instead)
Signed-off-by: Eugeniy Paltsev
---
drivers/spi/designware_spi.c | 46 ++--
r_arria10.c) instead.
Changes v4->v5:
* Get rid of usless ifdef in dw_spi_get_clk function
Eugeniy Paltsev (2):
SOCFPGA: clock manager: implement dw_spi_get_clk function
DW SPI: Get clock value from Device Tree
arch/arm/mach-socfpga/clock_manager_arria10.c | 9 +
arch/arm/mach-socfp
Implement dw_spi_get_clk function to override its weak
implementation in designware_spi.c driver.
We need this change to get rid of cm_get_spi_controller_clk_hz
function and clock_manager.h include in designware_spi.c driver.
Reviewed-by: Marek Vasut
Signed-off-by: Eugeniy Paltsev
---
arch
nager.
Get rid of clock_manager.h include as we don't use
cm_get_spi_controller_clk_hz function anymore. (we use redefined
dw_spi_get_clk in SOCFPGA clock managers instead)
Signed-off-by: Eugeniy Paltsev
---
drivers/spi/designware_spi.c | 42 --
ARCNUM [15:8] field in ARC_AUX_IDENTITY register allows you to
uniquely identify each core in a multi-core system.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/include/asm/arcregs.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm
Signed-off-by: Eugeniy Paltsev
---
arch/arc/include/asm/arcregs.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 2a1bfc7..ba1f7ba 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
macros in the
dt-bindings/clock/snps,hsdk-cgu.h headers and can be used in device
tree sources.
Signed-off-by: Eugeniy Paltsev
---
MAINTAINERS | 8 +
doc/device-tree-bindings/clock/snps,hsdk-cgu.txt | 35 ++
drivers/clk/Kconfig
-
int ioc_exists __section(".data");
if (/* condition */)
ioc_exists = 1;
-->>-
Also fix ther type to "bool" as more appropriate.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/cache.c | 16 +
that current transmit operation is finished before new one.
Signed-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* Use readl_poll_timeout macros instead of custom code.
drivers/spi/designware_spi.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/spi/designware_spi.
we return with error.
Fix that by using SPI_TMOD_TR instead of SPI_TMOD_TO which allows to use
RX FIFO.
Signed-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* None.
drivers/spi/designware_spi.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/designware_sp
Various fixes and improvements of designware spi driver.
Changes v1->v2:
* Use readl_poll_timeout macros instead of custom code.
Eugeniy Paltsev (5):
DW SPI: fix tx data loss on FIFO flush
DW SPI: fix transmit only mode
DW SPI: refactor poll_transfer functions
DW SPI: add option to
. After that we can get rid
of dw_reader return value check in poll_transfer function.
With these changes we're getting closer to Linux DW SPI driver.
Signed-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* None.
drivers/spi/designware_spi.c | 26 --
1 file changed, 4 in
these bits has no
effect; reading from these bits returns 0." [1]
[1] Section 6.1 of dw_apb_ssi.pdf (version 3.22a)
Signed-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* None.
drivers/spi/designware_spi.c | 40 +++-
1 file changed, 15 insertions(+), 25
gpio bindings.
Signed-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* None.
drivers/spi/designware_spi.c | 51 +++-
1 file changed, 50 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index b51242c
Eugeniy Paltsev (2):
ARC: bootm: refactor GO and PREP subcommands implementation.
ARC: HSDK: add platform-specific commands
arch/arc/dts/hsdk.dts | 56 +++
arch/arc/lib/bootm.c| 51 +-
board/synopsys/axs10x/axs10x.c | 12 +
board/synopsys/hsdk/MAINTAINERS |4
Refactor GO and PREP subcommands implementation for a simpler
override in the boards platform code.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/bootm.c | 51 --
board/synopsys/axs10x/axs10x.c | 12 ++
board/synopsys/hsdk/hsdk.c
Signed-off-by: Eugeniy Paltsev
---
arch/arc/dts/hsdk.dts | 56 +++
board/synopsys/hsdk/MAINTAINERS |4 +-
board/synopsys/hsdk/Makefile|2 +
board/synopsys/hsdk/clk-lib.c | 75 +++
board/synopsys/hsdk/clk-lib.h | 38 ++
board/synopsys/hsdk/env-lib.c | 302
spi_flash_ids list.
Changes v1->v2:
* Use generic defines from linux/sizes.h instead of custom ones.
Eugeniy Paltsev (2):
SPI Flash: add support of sst26wf* flash series
SF: add support for sst26wf016, sst26wf032, sst26wf064
drivers/mtd/spi/spi_flash.c |
This commit adds support for the SST sst26wf016, sst26wf032
and sst26wf064 flash IC.
Signed-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* None.
drivers/mtd/spi/spi_flash_ids.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/
sst26wf flash series block protection implementation differs
from other SST series, so add implementation for sst26wf
lock/unlock/is_locked functions.
Signed-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* Use generic defines from linux/sizes.h instead of custom ones.
drivers/mtd/
Add hsdk-specific commands.
Enable spi flash support for hsdk board.
Changes v1->v2:
* Mobe spi flash enable to separate patch.
Eugeniy Paltsev (2):
ARC: HSDK: add platform-specific commands
ARC: HSDK: enable spi flash support
arch/arc/dts/hsdk.dts | 56 +++
arch/arc/
- run baremetal application on hsdk configured
by hsdk_init command.
This patch changes default behaviour of 'bootm' command:
now we are able to set number of CPUs to be kicked by setting
'core_mask' environment variable before 'bootm' command run.
Signed-off-by: Euge
HSDK board has sst26wf016 spi flash IC which we want to support.
Add SPI controller, CS-gpio and SPI flash nodes to hsdk device tree.
Enable corresponding options in hsdk defconfig.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/dts/hsdk.dts | 26 ++
configs
On Mon, 2018-03-26 at 13:45 +, Alexey Brodkin wrote:
> Hi Eugeniy,
>
> On Mon, 2018-03-26 at 15:57 +0300, Eugeniy Paltsev wrote:
> > HSDK board has sst26wf016 spi flash IC which we want to support.
> >
> > Add SPI controller, CS-gpio and SPI flash nodes to h
On Wed, 2018-04-04 at 19:58 +0530, Jagan Teki wrote:
> On Mon, Mar 26, 2018 at 4:38 PM, Eugeniy Paltsev
> wrote:
> > sst26wf flash series block protection implementation differs
> > from other SST series, so add implementation for sst26wf
> > lock/unlock/is
* Use generic defines from linux/sizes.h instead of custom ones.
Eugeniy Paltsev (2):
SPI Flash: add support of sst26wf* flash ICs protection ops
SF: add support for sst26wf016, sst26wf032, sst26wf064
drivers/mtd/spi/sf_internal.h | 18 +
drivers/mtd/spi/spi_flash.c
This commit adds support for the SST sst26wf016, sst26wf032
and sst26wf064 flash IC.
Signed-off-by: Eugeniy Paltsev
---
Changes v2->v3:
* None.
Changes v1->v2:
* None.
drivers/mtd/spi/spi_flash_ids.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/spi/spi_flash_i
sst26wf flash series block protection implementation differs
from other SST series, so add specific implementation
flash_lock/flash_unlock/flash_is_locked functions for sst26wf
flash ICs.
Signed-off-by: Eugeniy Paltsev
---
Changes v2->v3:
* Move SST26 command defenition to sf_interna
LOCKED/SF_LOCKED instead of magic numbers in
sst26_lock_ctl()
Changes v1->v2:
* Use generic defines from linux/sizes.h instead of custom ones.
Eugeniy Paltsev (2):
SPI Flash: add support of sst26wf* flash ICs protection ops
SF: add support for sst26wf016, sst26wf032, sst26wf064
driver
sst26wf flash series block protection implementation differs
from other SST series, so add specific implementation
flash_lock/flash_unlock/flash_is_locked functions for sst26wf
flash ICs.
Signed-off-by: Eugeniy Paltsev
---
Changes v3->v4:
* Make sst26_process_bpr() and sst26_lock_
This commit adds support for the SST sst26wf016, sst26wf032
and sst26wf064 flash IC.
Signed-off-by: Eugeniy Paltsev
---
Changes v3->v4:
* None.
Changes v2->v3:
* None.
Changes v1->v2:
* None.
drivers/mtd/spi/spi_flash_ids.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
Hi Jagan,
On Mon, 2018-04-09 at 16:52 +0530, Jagan Teki wrote:
> On Mon, Apr 9, 2018 at 4:27 PM, Eugeniy Paltsev
> wrote:
> > sst26wf flash series block protection implementation differs
> > from other SST series, so add specific implementation
> > flash_lock/flas
Use generic defines from linux/sizes.h instead of custom ones.
Eugeniy Paltsev (2):
SPI Flash: add support of sst26wf* flash ICs protection ops
SF: add support for sst26wf016, sst26wf032, sst26wf064
drivers/mtd/spi/sf_internal.h | 18 +
drivers/mtd/spi/spi_flash
sst26wf flash series block protection implementation differs
from other SST series, so add specific implementation
flash_lock/flash_unlock/flash_is_locked functions for sst26wf
flash ICs.
Signed-off-by: Eugeniy Paltsev
---
Changes v4->v5:
* Return EACCES when flash is locked instead of cus
This commit adds support for the SST sst26wf016, sst26wf032
and sst26wf064 flash IC.
Signed-off-by: Eugeniy Paltsev
---
Changes v4->v5:
* None.
Changes v3->v4:
* None.
Changes v2->v3:
* None.
Changes v1->v2:
* None.
drivers/mtd/spi/spi_flash_ids.c | 3 +++
1 file changed,
Hi Jagan,
Maybe you have any comments or remarks about this patch? And if you don't could
you please apply it.
Thanks!
On Tue, 2018-04-10 at 14:40 +0300, Eugeniy Paltsev wrote:
> sst26wf flash series block protection implementation differs
> from other SST series, so add specific imp
Hi Jagan!
Any comments?
On Tue, 2018-04-10 at 14:40 +0300, Eugeniy Paltsev wrote:
> sst26wf flash series block protection implementation differs
> from other SST series, so add specific implementation
> flash_lock/flash_unlock/flash_is_locked functions for sst26wf
> flash ICs.
>
CPU on HSDK board runs at 500MHz after preloader so fix
wrong cpu orequency value in hsdk_defconfig in hsdk.
Signed-off-by: Eugeniy Paltsev
---
configs/hsdk_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig
index
Signed-off-by: Eugeniy Paltsev
---
configs/axs101_defconfig | 1 +
configs/axs103_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig
index 174b80aeed..25b10888ce 100644
--- a/configs/axs101_defconfig
+++ b/configs/axs101_defconfig
Update ARC architecture maintainers and add
uboot-snps-...@synopsys.com mailing list.
Signed-off-by: Eugeniy Paltsev
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 44eeefa635..9f653a0137 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -55,7
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/init_helpers.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arc/lib/init_helpers.c b/arch/arc/lib/init_helpers.c
index 435fe96ef4..822318ff43 100644
--- a/arch/arc/lib/init_helpers.c
+++ b/arch/arc/lib/init_helpers.c
@@ -7,8 +7,6
FIFO flush")
Signed-off-by: Eugeniy Paltsev
---
drivers/spi/designware_spi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 0e93b62eee..5e2d290ddc 100644
--- a/drivers/spi/designware_spi.c
+++ b/d
Add option to set spi controller clock frequency via device tree
using standard clock bindings.
Old way of setting spi controller clock frequency (via implementation
of 'cm_get_spi_controller_clk_hz' function in platform specific code)
remains supported.
Signed-off-by: Eugen
Hi,
Maybe you have any comments or remarks about this patch? And if you don't could
you please apply it.
Thanks!
On Tue, 2017-09-26 at 16:10 +0300, Eugeniy Paltsev wrote:
> Add option to set spi controller clock frequency via device tree
> using standard clock bindings.
> Old
Hi Jagan,
Thanks for respond, my comments are given inline.
On Wed, 2017-10-11 at 16:36 +0530, Jagan Teki wrote:
> On Tue, Sep 26, 2017 at 6:40 PM, Eugeniy Paltsev
> wrote:
> > Add option to set spi controller clock frequency via device tree
> > using standard clock bindin
The HSDK can manage some pins via CREG registers block.
Signed-off-by: Eugeniy Paltsev
---
MAINTAINERS | 6 +++
drivers/gpio/Kconfig | 7 +++
drivers/gpio/Makefile | 1 +
drivers/gpio/hsdk-creg-gpio.c | 109 ++
4
ned-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* disable clock if we can't get the rate.
* get rid of cm_get_spi_controller_clk_hz weak declaration.
drivers/spi/designware_spi.c | 65 +++-
1 file changed, 64 insertions(+), 1 deletion(-)
diff -
With CONFIG_CMD_GPIO compilation reports error.
common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory
#include
^
Signed-off-by: Eugeniy Paltsev
---
arch/arc/include/asm/gpio.h | 1 +
1 file changed, 1 insertion(+)
create mode 100644 arch/arc
The HSDK can manage some pins via CREG registers block.
Signed-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* Use linux debug function (debug -> pr_debug, errror -> pr_err)
as uboot "error" was removed.
MAINTAINERS | 6 +++
drivers/gpio/Kco
Hi Jagan,
On Mon, 2017-10-16 at 22:37 +0530, Jagan Teki wrote:
> On Fri, Oct 13, 2017 at 8:48 PM, Eugeniy Paltsev
> wrote:
> > Add option to set spi controller clock frequency via device tree
> > using standard clock bindings.
> > Old way of setting spi control
On Tue, 2017-10-17 at 20:32 +0530, Jagan Teki wrote:
> On Tue, Oct 17, 2017 at 8:27 PM, Alexey Brodkin
> wrote:
> > Hi Jagan,
> >
> > > -Original Message-
> > > From: Eugeniy Paltsev [mailto:palt...@synopsys.com]
> > > Sent: Tuesday, O
increase SDIO CIU frequency from actual 1250Hz to 5000Hz
by switching from the default divisor value (div-by-8) to the
minimum possible value of the divisor (div-by-2) in HSDK platform
code.
Signed-off-by: Eugeniy Paltsev
---
board/synopsys/hsdk/hsdk.c | 12 +++-
1 file changed, 11
On Thu, 2017-10-19 at 13:20 -0500, Dinh Nguyen wrote:
>
> On 10/19/2017 10:51 AM, Marek Vasut wrote:
> > On 10/19/2017 05:36 PM, Eugeniy Paltsev wrote:
> > > On Tue, 2017-10-17 at 20:32 +0530, Jagan Teki wrote:
> > > > On Tue, Oct 17, 2017 at 8:27 PM, Alexey Bro
On Wed, 2017-11-15 at 10:24 +0100, Marek Vasut wrote:
> On 11/14/2017 04:33 PM, Eugeniy Paltsev wrote:
> > Add option to set spi controller clock frequency via device tree
> > using standard clock bindings.
> >
> > Define dw_spi_get_clk function as 'weak' a
r_arria10.c) instead.
Changes v5->v6:
* Put the clock handle into the private data
Changes v4->v5:
* Get rid of usless ifdef in dw_spi_get_clk function
Eugeniy Paltsev (2):
SOCFPGA: clock manager: implement dw_spi_get_clk function
DW SPI: Get clock value from Device Tr
Implement dw_spi_get_clk function to override its weak
implementation in designware_spi.c driver.
We need this change to get rid of cm_get_spi_controller_clk_hz
function and clock_manager.h include in designware_spi.c driver.
Signed-off-by: Eugeniy Paltsev
---
arch/arm/mach-socfpga
nager.
Get rid of clock_manager.h include as we don't use
cm_get_spi_controller_clk_hz function anymore. (we use redefined
dw_spi_get_clk in SOCFPGA clock managers instead)
Signed-off-by: Eugeniy Paltsev
---
drivers/spi/designware_spi.c | 43 +--
On Mon, 2017-12-11 at 17:21 +0100, Marek Vasut wrote:
> On 12/11/2017 05:18 PM, Eugeniy Paltsev wrote:
> > Add option to set spi controller clock frequency via device tree
> > using standard clock bindings.
> >
> > Define dw_spi_get_clk function as 'weak' a
On Mon, 2017-12-11 at 17:41 +0100, Marek Vasut wrote:
> On 12/11/2017 05:37 PM, Eugeniy Paltsev wrote:
> > On Mon, 2017-12-11 at 17:21 +0100, Marek Vasut wrote:
> > > On 12/11/2017 05:18 PM, Eugeniy Paltsev wrote:
> > > > Add option to set spi controller c
r_arria10.c) instead.
Changes v6->v7:
* Cleanup error handling.
* Don't free clock after we successfully requeste it.
Changes v5->v6:
* Put the clock handle into the private data
Changes v4->v5:
* Get rid of usless ifdef in dw_spi_get_clk function
Eugeniy Paltsev (2):
Implement dw_spi_get_clk function to override its weak
implementation in designware_spi.c driver.
We need this change to get rid of cm_get_spi_controller_clk_hz
function and clock_manager.h include in designware_spi.c driver.
Reviewed-by: Marek Vasut
Signed-off-by: Eugeniy Paltsev
---
arch
nager.
Get rid of clock_manager.h include as we don't use
cm_get_spi_controller_clk_hz function anymore. (we use redefined
dw_spi_get_clk in SOCFPGA clock managers instead)
Signed-off-by: Eugeniy Paltsev
---
drivers/spi/designware_spi.c | 45 ++--
r_arria10.c) instead.
Changes v7->v8:
* Fix typo in comments.
Changes v6->v7:
* Cleanup error handling.
* Don't free clock after we successfully requeste it.
Changes v5->v6:
* Put the clock handle into the private data
Changes v4->v5:
* Get rid of usless ifdef in dw_spi
Implement dw_spi_get_clk function to override its weak
implementation in designware_spi.c driver.
We need this change to get rid of cm_get_spi_controller_clk_hz
function and clock_manager.h include in designware_spi.c driver.
Reviewed-by: Marek Vasut
Signed-off-by: Eugeniy Paltsev
---
arch
nager.
Get rid of clock_manager.h include as we don't use
cm_get_spi_controller_clk_hz function anymore. (we use redefined
dw_spi_get_clk in SOCFPGA clock managers instead)
Reviewed-by: Marek Vasut
Signed-off-by: Eugeniy Paltsev
---
drivers/spi/d
The debug UART is intended for use very early in U-Boot to debug
problems before serial drivers are up.
Call debug_uart_init right before board_init_f.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/start.S | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arc/lib/start.S b/arch
Eugeniy Paltsev (2):
ARC: init debug uart in early common arc code
ARC: enable debug uart for HSDK and AXS10x boards
arch/arc/lib/start.S | 5 +
configs/axs101_defconfig | 5 +
configs/axs103_defconfig | 5 +
configs/hsdk_defconfig | 5 +
4 files changed, 20 insertions
Signed-off-by: Eugeniy Paltsev
---
configs/axs101_defconfig | 5 +
configs/axs103_defconfig | 5 +
configs/hsdk_defconfig | 5 +
3 files changed, 15 insertions(+)
diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig
index 25b10888ced..559ed4734c1 100644
--- a/configs
-n-inv when OP_FLUSH is
used)
* Add SLC invalidation to invalidate_icache_all function.
* Add (start >= end) check to invalidate_dcache_range and
flush_dcache_range as some buggy drivers pass region start == end.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/include/asm/arcregs.h |
ARC_AUX_SLC_RGN_START1 and ARC_AUX_SLC_RGN_END1 register exist
only if PAE exists in current HW. So we had to check pae_exist bit
before using them.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/include/asm/arcregs.h | 3 +++
arch/arc/lib/cache.c | 28
2
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/cache.c | 18 --
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index d17948d..04f1d9d 100644
--- a/arch/arc/lib/cache.c
+++ b/arch/arc/lib/cache.c
@@ -13,12 +13,12
Disable IOC by default with option to enable it.
We don't want to enable IOC in u-boot by default as we want
keep IOC HW at same state as after reset when we launching linux.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/cache.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
As HSDK is development board it is better to hang on panic instead of
reset the board when panic occurs.
Signed-off-by: Eugeniy Paltsev
---
configs/hsdk_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig
index a04cfee..11cb7e0 100644
Update default AXI, TUN, ARC clock set options:
instead of changing only idiv divider settings adjust also domain PLL
settings.
Add support of TUN_ROM and TUN_PWM clocks (subclocks of TUNN_PLL)
Signed-off-by: Eugeniy Paltsev
---
drivers/clk/clk-hsdk-cgu.c| 169
Allocate hsdk_cgu_clk private data structure using priv_auto_alloc_size
instead of platdata_auto_alloc_size.
Signed-off-by: Eugeniy Paltsev
---
drivers/clk/clk-hsdk-cgu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c
Add 'Hz' when printing clock frequency in error messages.
Signed-off-by: Eugeniy Paltsev
---
drivers/clk/clk-hsdk-cgu.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c
index 64bb1db..4362d58 100644
---
Add cgu-clk (clock generation unit) node to hsdk device tree.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/dts/hsdk.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arc/dts/hsdk.dts b/arch/arc/dts/hsdk.dts
index a7b276c..67dfb93 100644
--- a/arch/arc/dts/hsdk.dts
+++ b/arch/arc
This is useful to make sure no stale data exists in caches after bootloaders.
The worst thing could be some lines of cache were locked in a bootloader
for example during DDR recalibration and never unlocked. This may lead
to really unpredictable issues later down the line.
Signed-off-by: Eugeniy
Hi Jagan,
Could you please pull these patches to your tree?
It would be really nice to see this patch in the nearest release.
Thanks.
On Thu, 2017-12-28 at 15:09 +0300, Eugeniy Paltsev wrote:
> Add option to set spi controller clock frequency via device tree
> using standard clock bi
---
Any ideas how to fix this?
Thanks.
--
Eugeniy Paltsev
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
On Tue, 2018-01-23 at 10:44 +0900, Jaehoon Chung wrote:
> On 01/23/2018 03:38 AM, Eugeniy Paltsev wrote:
> > Hi Jean-Jacques,
> >
> > after commit "mmc: disable UHS modes if Vcc cannot be switched on and off"
> > (04a2ea248f)
> > we got MMC brok
evice tree.
So remove unused interrupts properties to get rid of this warnings.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/dts/axs10x_mb.dtsi | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/arc/dts/axs10x_mb.dtsi b/arch/arc/dts/axs10x_mb.dtsi
index b74d3c8..17ef656 100644
--- a/ar
On Wed, 2018-01-24 at 17:28 +0900, Jaehoon Chung wrote:
> On 01/23/2018 09:03 PM, Eugeniy Paltsev wrote:
> > On Tue, 2018-01-23 at 10:44 +0900, Jaehoon Chung wrote:
> > > On 01/23/2018 03:38 AM, Eugeniy Paltsev wrote:
> > > > Hi Jean-Jacques,
> > > >
&g
rs implement .enable/.disable callbacks not for all
clock IDs and return -ENOSYS (or -ENOTSUPP) for others.
If we have such clock in 'clocks' list of designware ethernet controller
node we fail to probe designware ethernet.
Fix it.
Signed-off-by: Eugeniy Paltsev
---
drivers/net/designwa
spi_flash_ids list.
Eugeniy Paltsev (2):
SPI Flash: add support of sst26wf* flash series
SF: add support for sst26wf016, sst26wf032, sst26wf064
drivers/mtd/spi/spi_flash.c | 188
drivers/mtd/spi/spi_flash_ids.c | 3 +
2 files changed, 191 insertions
This commit adds support for the SST sst26wf016, sst26wf032
and sst26wf064 flash IC.
Signed-off-by: Eugeniy Paltsev
---
drivers/mtd/spi/spi_flash_ids.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 262d81e..dedc232
101 - 200 of 223 matches
Mail list logo