As discussed with Marek during the LINUX-PITER here is v4 patch: Add option to set spi controller clock frequency via device tree using standard clock bindings.
Define dw_spi_get_clk function as 'weak' as some targets (like SOCFPGA_GEN5 and SOCFPGA_ARRIA10) fon't use standard clock API and implement dw_spi_get_clk their own way in their clock manager. Get rid of clock_manager.h include in designware_spi.c as we don't use cm_get_spi_controller_clk_hz function anymore - we use redefined dw_spi_get_clk in SOCFPGA clock managers (clock_manager_gen5.c and clock_manager_arria10.c) instead. Changes v5->v6: * Put the clock handle into the private data Changes v4->v5: * Get rid of usless ifdef in dw_spi_get_clk function Eugeniy Paltsev (2): SOCFPGA: clock manager: implement dw_spi_get_clk function DW SPI: Get clock value from Device Tree arch/arm/mach-socfpga/clock_manager_arria10.c | 9 +++++ arch/arm/mach-socfpga/clock_manager_gen5.c | 9 +++++ drivers/spi/designware_spi.c | 47 +++++++++++++++++++++++++-- 3 files changed, 63 insertions(+), 2 deletions(-) -- 2.9.3 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
