Add clock handoff offset for Agilex. Remove S10 prefix to avoid confusion.
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v8:
- Fixed missing CONFIG_ prefix for TARGET_SOCFPGA_STRATIX10.
---
arch/arm/mach-socfpga/include/mach/handoff_s10.h | 9 +++--
arch/arm/mach-socfpga/w
Add socdk board support for Intel Agilex SoC
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
board/intel/agilex-socdk/MAINTAINERS | 7 +++
board/intel/agilex-socdk/Makefile| 7 +++
board/intel/agilex-socdk/socfpga.c | 7 +++
3 files changed, 21 insertions(+)
cr
Restructure Stratix 10 SDRAM driver. Move common code to separate
file, in preparation to support SDRAM driver for Agilex.
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v6:
- Remove compatible "intel,sdr-ctl-agilex" from this patch.
v3:
- Change sdram_common.* to sdram_soc64.*
Add system manager support for Agilex.
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v5:
- Remove system_manager_agilex.h and use system_manager_soc64.h directly.
v3:
- Change include filename to system_manager_soc64.h.
- Move to use defines instead of struct.
v2:
- Include s
Move Stratix10 and Agilex system manager common code to
system_manager_soc64.h. Changed macros to use SYSMGR_SOC64_*.
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v5:
- Remove system_manager_s10.h and use system_manager_soc64.h.
v4:
- Change prefix from SYSMGR_S10* to SYSMGR_
Add clock wrapper functions call to clock DM functions to get clock
frequency and used in cm_print_clock_quick_summary().
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v6:
- Use new macro names from agilex-clock.h.
v4:
- Change to use SYSMGR_SOC64* prefix.
v3:
- Improved comm
Add SPL support for Agilex SoC.
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v5:
- Probe CCU driver with DM method.
v4:
- Move spl_early_init() to entry of board_init_f
- Add socfpga_get_manager_addr().
- Remove SYSMGR_DMA and SYSMGR_DMA_PERIPH, already set in firewall_setup(
Add reset manager support for Agilex.
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v5:
- Remove reset_reset_manager_agilex.h and use reset_manager_soc64.h.
v3:
- Add reset_manager_soc64.h
- Convert to use defines instead of struct.
---
arch/arm/mach-socfpga/include/mach/rese
Add clock manager driver for Agilex. Provides clock initialization
and get_rate functions.
agilex-clock.h is from Linux commit ID cd2e1ad12247.
Signed-off-by: Chee Hong Ang
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v6:
- Use agilex-clock.h from Linux instead of using stra
Move Stratix10 and Agilex clock manager common code to new header file.
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v6:
- Move #include to top of header file.
v5:
- Revert CLKMGR_INTOSC_HZ to 460MHz.
---
.../include/mach/clock_manager_s10.h | 16 +++--
...
CLKMGR_INTOSC_HZ should be 400MHz, instead of 460MHz.
Removed also unused macros CLKMGR_EOSC1_HZ and CLKMGR_FPGA_CLK_HZ.
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v6:
- Remove unused macros CLKMGR_EOSC1_HZ and CLKMGR_FPGA_CLK_HZ.
---
arch/arm/mach-socfpga/include/mach/cloc
Add build support for Agilex SoC.
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v7:
- Move CONFIG_DW_WDT_CLOCK_KHZ to _soc64_common.h
- Use fdtimage filename from CONFIG_DEFAULT_DEVICE_TREE
v6:
- Include socfpga_soc64_common.h.
v5:
- Enable NCORE_CACHE
v3:
- Disable CONFIG_U
Add Cache Coherency Unit (CCU) driver.
CCU is to ensures consistency of shared data between multi masters
in the system.
Driver initializes CCU's directories and coherency agent
interfaces in CCU IP.
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v5:
- Move CCU driver to DM.
--
Move Stratix10 and Agilex common CONFIGs to socfpga_soc64_common.h.
Signed-off-by: Ley Foon Tan
---
...ratix10_socdk.h => socfpga_soc64_common.h} | 8 +-
include/configs/socfpga_stratix10_socdk.h | 193 +-
2 files changed, 7 insertions(+), 194 deletions(-)
copy include/con
Add device tree files for Agilex SoC platform.
socfpga_agilex-u-boot.dtsi and socfpga_agilex_socdk-u-boot.dts contains
Uboot specific DT properties.
socfpga_agilex.dtsi and socfpga_agilex_socdk.dts are from Linux
(kernel/git/dinguyen/linux.git, commit 6f0bf971bacacc)
Signed-off-by: Ley Foon Tan
Add SDRAM driver for Agilex SoC.
Signed-off-by: Tien Fong Chee
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v6:
- Add compatible "intel,sdr-ctl-agilex".
v4:
- Fixed checkpatch warnings
v3:
- Use sdmmc_soc64.*
- Change compatible string to use "intel" (intel,sdr-ctl-agilex).
Hi,
I have created GPT table start from 8MB for kernel, roots etc. something like
PartStart LBA End LBA Name
Attributes
Type GUID
Partition GUID
1 0x4000 0x00023fff "boota"
attrs: 0x0004
type: ebd0a0a2-b
Hi Heinrich
On 11/26/19 6:41 PM, Heinrich Schuchardt wrote:
> On 11/26/19 1:16 PM, Patrick DELAUNAY wrote:
>> Hi,
>>
>>> From: Patrice CHOTARD
>>> Sent: lundi 25 novembre 2019 14:48
>>>
>>> In reserve_bootstage(), in case size is odd, gd->new_bootstage is not
>>> aligned. In
>>> bootstage_reloca
In reserve_bootstage(), in case size is odd, gd->new_bootstage
is not aligned. In bootstage_relocate(), the platform hangs when
getting access to data->record[i].name.
To avoid this issue, make gd->new_bootstage 16 byte aligned.
To insure that new_bootstage is 16 byte aligned (at least needed for
On 11/26/19 7:41 PM, Vladimir Olovyannikov wrote:
Hi,
[...]
> +#define USBAXI_AWCACHE 0xF
> +#define USBAXI_ARCACHE 0xF
> +#define USBAXI_AWPROT0x8
> +#define USBAXI_ARPROT0x8
> +#define USBAXIWR_SA_VAL ((USBAXI_AWCACHE << 4
On Mon, Nov 25, 2019 at 12:12 PM Simon Glass wrote:
>
> Add support for Apollo Lake to the ICH driver. This involves adjusting the
> mmio address and skipping setting of the bbar.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v5: None
> Changes in v4:
> - apollolake -> Apollo Lake
>
> Chang
Hi Simon,
On Mon, Nov 25, 2019 at 12:12 PM Simon Glass wrote:
>
> If these phases are used we typically want to enable pinctrl in then, so
> that pad setup and GPIO access are possible.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v5:
> - Correct build error in chromebook_samus_tpl
>
> Ch
In reserve_bootstage(), in case size is odd, gd->new_bootstage
is not aligned. In bootstage_relocate(), the platform hangs when
getting access to data->record[i].name.
To avoid this issue, make gd->new_bootstage 16 byte aligned.
To insure that new_bootstage is 16 byte aligned (at least needed for
On 27/11/2019 05:52, AKASHI Takahiro wrote:
On Thu, Nov 21, 2019 at 02:32:47PM +, James Byrne wrote:
This commit tidies up a few things in the env code to make it safer and
easier to extend:
- The hsearch_r() function took a 'struct env_entry' as its first
parameter, but only used the 'key'
Hi Kever/YouMin,
On Fri, Nov 15, 2019 at 8:43 AM Kever Yang wrote:
>
> There are some function like os_reg setting, capacity detect functions,
> can be used as common code for different Rockchip SoCs, add a
> sdram_common.c for all these functions.
>
> Signed-off-by: YouMin Chen
> Signed-off-by:
On Wed, Nov 27, 2019 at 10:39 AM James Byrne
wrote:
>
> On 27/11/2019 05:52, AKASHI Takahiro wrote:
> > On Thu, Nov 21, 2019 at 02:32:47PM +, James Byrne wrote:
> >> This commit tidies up a few things in the env code to make it safer and
> >> easier to extend:
> >>
> >> - The hsearch_r() funct
This reverts commit 856b9cdb53f0e6c8d98f81cf71ef363c16b0aa0e.
Signed-off-by: Peng Ma
---
arch/powerpc/cpu/mpc85xx/Kconfig | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 8cc82f80b4..6fc6ea8fef 100644
The sata of our powerpc platform are updated. This changed is to
fit the driver init
Signed-off-by: Peng Ma
---
arch/powerpc/dts/t2080.dtsi | 15 ---
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/dts/t2080.dtsi b/arch/powerpc/dts/t2080.dtsi
index 999fa8c
This reverts commit 1ee494291880fd51ef0c5f7342e072bdb069d7ff.
Signed-off-by: Peng Ma
---
drivers/ata/Kconfig| 10 -
drivers/ata/Makefile |1 -
drivers/ata/fsl_ahci.c | 1030
drivers/ata/fsl_sata.h |1 -
4 files changed, 1042 deletions(-)
The variable(dma_flag) will be used by both fsl_ahci.c and fsl_sata.c,
Now we support the fsl_sata.c to DM mode and revert fsl_ahci.c(This
variable declare here). So we should Add this changed.
Signed-off-by: Peng Ma
---
drivers/ata/fsl_sata.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/
This reverts commit 02dc1599ba0b16eb21ba0c206e5b6f38fe7b67a7
Just reverts some configs about sata to fit fsl_sata.c
Signed-off-by: Peng Ma
---
configs/T2080QDS_NAND_defconfig | 4
configs/T2080QDS_SDCARD_defconfig | 4
configs/T2080QDS_SECURE_BOOT_defconfig| 4 ---
According to the PX30 TRM, the iomux registers come first, before the pull
and strength control registers.
Signed-off-by: Paul Kocialkowski
---
arch/arm/include/asm/arch-rockchip/grf_px30.h | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/include/asm/
Some generic PX30 SoMs found in the wild use UART3 as their debug output
instead of UART2 (used for MMC) and UART5.
Make it possible to use UART3 as early debug output, with the associated
clock and pinmux configuration. Two sets of output pins are supported (M0/M1)
so a Kconfig option to select b
On Tue, Nov 26, 2019 at 5:25 PM Marek Vasut wrote:
> >> diff --git a/drivers/mtd/nand/raw/denali_spl.c
> >> b/drivers/mtd/nand/raw/denali_spl.c
> >> index dbaba3cab2..b8b29812aa 100644
> >> --- a/drivers/mtd/nand/raw/denali_spl.c
> >> +++ b/drivers/mtd/nand/raw/denali_spl.c
> >> @@ -173,6 +173,13
On Wed, Nov 27, 2019 at 8:56 AM Ley Foon Tan wrote:
>
> Add device tree files for Agilex SoC platform.
>
> socfpga_agilex-u-boot.dtsi and socfpga_agilex_socdk-u-boot.dts contains
> Uboot specific DT properties.
>
> socfpga_agilex.dtsi and socfpga_agilex_socdk.dts are from Linux
> (kernel/git/dingu
Hi Peng,
On 27.11.19 11:02, Peng Ma wrote:
This reverts commit 1ee494291880fd51ef0c5f7342e072bdb069d7ff.
I'm missing an explanation for this revert (or even better for this
whole patch-set). Why are you doing this? Is the new DM driver
causing problems?
Thanks,
Stefan
Signed-off-by: Peng M
Hi Jagan,
> Hi,
>
> I have created GPT table start from 8MB for kernel, roots etc.
> something like
>
> PartStart LBA End LBA Name
> Attributes
> Type GUID
> Partition GUID
> 1 0x4000 0x00023fff "boota"
> attrs: 0x000
On 11/27/19 11:20 AM, Masahiro Yamada wrote:
> On Tue, Nov 26, 2019 at 5:25 PM Marek Vasut wrote:
diff --git a/drivers/mtd/nand/raw/denali_spl.c
b/drivers/mtd/nand/raw/denali_spl.c
index dbaba3cab2..b8b29812aa 100644
--- a/drivers/mtd/nand/raw/denali_spl.c
+++ b/drivers/m
From: Suniel Mahesh
Enable driver model for SPI and SPI_FLASH to remove the following
compile warning on CM-FX6 SOM:
= WARNING ==
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.
=
Hi Matthias,
Thank you very much for your help. Unfortunately I'm still a little stuck.
Matthias Brugger wrote
> 1) as you found out U-Boot is using an embedded device tree. The device
> tree it
> uses is specified in configs/rpi_*
> I suppose you are using rpi_3_defconfig, so your device-tree i
On Wed, 13 Nov 2019 19:43:41 +0200
Andy Shevchenko wrote:
> After the commit 1cc03c5c53c0 ("dfu: Provide means to find difference
> between dfu-util -e and -R") the dangling ptototype appeared. Remove
> it here.
>
> Fixes: 1cc03c5c53c0 ("dfu: Provide means to find difference between
> dfu-util -
On Wed, 13 Nov 2019 19:43:42 +0200
Andy Shevchenko wrote:
> In the future we may utilize optional argument in 'dfu' command line.
> As a preparation for this, refactor do_dfu().
>
> Signed-off-by: Andy Shevchenko
> ---
> cmd/dfu.c | 17 ++---
> 1 file changed, 10 insertions(+), 7 d
Hi Andy,
Thank you for your work on enhancing DFU. The patch series is generally
Ok.
Please find some minor comments/requests below.
> When the `dfu` command is called from the U-Boot environment,
> it now accepts an optional parameter that specifies a timeout (in
> seconds). If a DFU connection
Hi Andy,
> The stock U-Boot on Intel Edison has timeout parameter for DFU
> command. Enable it here to be compatible with the original U-Boot
> configuration.
>
> Signed-off-by: Andy Shevchenko
> ---
> configs/edison_defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/configs/ed
Hi,
On 27.11.2019 03:26, AKASHI Takahiro wrote:
> Thank you for the heads-up.
>
> On Tue, Nov 26, 2019 at 11:57:29AM -0500, Tom Rini wrote:
>> On Tue, Nov 26, 2019 at 09:15:07AM +0100, Marek Szyprowski wrote:
>>
>>> The code for handing file overwrite incorrectly assumed that the file on
>>> disk
The SAMA5D2 and SAMA5D4 series SoCs have a 64-bit Serial Number (unique
ID) burned in, which is displayed with 'print_cpuinfo()' now (in the
same format the SAM-BA applet prints it).
Example output:
CPU: SAMA5D27 1G bits DDR2 SDRAM
Serial number 0: 0x4630394b
1: 0x190d2750
Crystal f
Hi,
On 26/11/2019 22:12, Anand Moon wrote:
> Add missing config option CONFIG_MESON_GXBB and CONFIG_SYS_BOARD,
> for odroid-c2 and nanopi k2 board
>
> Signed-off-by: Anand Moon
> ---
> configs/nanopi-k2_defconfig | 2 ++
> configs/odroid-c2_defconfig | 2 ++
> 2 files changed, 4 insertions(+)
>
On Wed, Nov 27, 2019 at 02:03:03PM +0800, Bin Meng wrote:
> Hi Tom,
>
> On Wed, Nov 20, 2019 at 10:22 PM Tom Rini wrote:
> >
> > On Wed, Nov 20, 2019 at 10:11:00AM +0800, Bin Meng wrote:
> > > Hi Tom,
> > >
> > > On Fri, Nov 15, 2019 at 4:21 PM Bin Meng wrote:
> > > >
> > > > From: Lihua Zhao
>
On 26/11/2019 22:12, Anand Moon wrote:
> commit a10388dc6982 ("mmc: meson-gx: add support for mmc-pwrseq-emmc")
> introduce CONFIG_PWESEQ for power sequence for eMMC module on
> amlogic platform, so enable this to all amlogic boards.
>
> Signed-off-by: Anand Moon
> ---
> arch/arm/mach-meson/Kcon
On 26/11/2019 22:12, Anand Moon wrote:
> Enable GIC support for G12A/G12B platform.
>
> Signed-off-by: Anand Moon
> ---
> include/configs/meson64.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/configs/meson64.h b/include/configs/meson64.h
> index 736081277d..
Hello,
I'm working on a modular socfpga based system with several optional boards.
Each optional board contain a board ID that can be read through a SPI bus.
Since we want just read the board ID, we used manually the sspi command,
something like:
=> sspi 1:1.0 8 0
42
But it seems that the sspi
Hi,
On 26/11/2019 22:12, Anand Moon wrote:
> odroid n2 eMMC module would failed to boot up,
> because of TX phase clk failure, fix the typo in
> TX phase macro to help tune correct clk freqency.
>
> Before these changes.
> clock is enabled (380953Hz)
> clock is enabled (2500Hz)
> after th
Hi
On 27.11.2019 04:13, AKASHI Takahiro wrote:
> # I still need to understand the issues reported here.
>
> On Tue, Nov 26, 2019 at 11:57:34AM -0500, Tom Rini wrote:
>> On Tue, Nov 26, 2019 at 09:15:08AM +0100, Marek Szyprowski wrote:
>>
>>> Handling of the start file offset was broken in the curr
On 27.11.19 13:55, Tom Rini wrote:
> On Wed, Nov 27, 2019 at 02:03:03PM +0800, Bin Meng wrote:
>> Hi Tom,
>>
>> On Wed, Nov 20, 2019 at 10:22 PM Tom Rini wrote:
>>> On Wed, Nov 20, 2019 at 10:11:00AM +0800, Bin Meng wrote:
Hi Tom,
On Fri, Nov 15, 2019 at 4:21 PM Bin Meng wrote:
>>>
Hi
> From: Patrice CHOTARD
> Sent: vendredi 15 novembre 2019 11:57
>
> This patch allows to fix the following compilation warning:
>
> = WARNING == This board
> does not use CONFIG_DM_ETH (Driver Model for Ethernet drivers). Please
> update the board to u
Hi,
> From: Patrick DELAUNAY
> Sent: mercredi 6 novembre 2019 16:17
>
> Device tree and binding alignment with kernel v5.3 and converted to SPDX.
>
> Signed-off-by: Patrick Delaunay
> ---
Applied to u-boot-stm32/master, thanks!
--
Patrick
___
U-Bo
Hi,
> From: Patrick DELAUNAY
> Sent: mercredi 6 novembre 2019 16:17
>
> Device tree and binding alignment with kernel v5.4-rc4
>
> Signed-off-by: Patrick Delaunay
> ---
Applied to u-boot-stm32/master, thanks!
--
Patrick
___
U-Boot mailing list
U-B
Hi
> From: Patrick DELAUNAY
> Sent: mercredi 6 novembre 2019 16:17
>
> Update the sdmmc2 node for eMMC support on eval board stm32mp157c-ev1.
> - update slew-rate for pin configuration
> - update "vqmmc-supply"
> - remove "st,sig-dir"
> - add mandatory "pinctrl-names"
> - add "mmc-ddr-3_3v"
>
>
Hi,
> From: Patrick DELAUNAY
> Sent: lundi 14 octobre 2019 09:28
>
> Add support of DFU for MMC, MTD, RAM and MTD command.
>
> Signed-off-by: Patrick Delaunay
> ---
Applied to u-boot-stm32/master, thanks!
--
Patrick
___
U-Boot mailing list
U-Boot@
Hi,
> From: Patrick DELAUNAY
> Sent: lundi 14 octobre 2019 09:28
>
> Generate automatically dfu_alt_info for the supported device.
> The simple command "dfu 0" allows to start the dfu stack on usb 0 for the
> supported devices:
> - dfu mtd for nand0
> - dfu mtd for nor0
> - dfu mmc for SDCard
>
Hi,
> From: Patrick DELAUNAY
> Sent: lundi 14 octobre 2019 09:28
>
> Activate the support of SPI NAND in stm32mp1 U-Boot.
>
> Signed-off-by: Patrick Delaunay
> ---
Applied to u-boot-stm32/master, thanks!
--
Patrick
___
U-Boot mailing list
U-Boot@l
Hi,
> From: Patrick DELAUNAY
> Sent: lundi 14 octobre 2019 09:28
>
> This patch adds the support of the spi nand device in mtdparts command and in
> dfu_alt_info.
>
> Signed-off-by: Patrick Delaunay
> ---
Applied to u-boot-stm32/master, thanks!
--
Patrick
___
Hi,
> From: Patrick DELAUNAY
> Sent: lundi 14 octobre 2019 09:28
>
> Add read for OTP and PMIC NVM with alternates on virtual DFU device.
>
> Serie-cc: Boris Brezillon
> Signed-off-by: Patrick Delaunay
> ---
Applied to u-boot-stm32/master, thanks!
--
Patrick
___
Hi Tom
Please pull the STM32 related patches for u-boot-stm32-20191126
With the following changes:
- Solve warning for stih410-b2260
- Device tree alignment on v5.4-rc4 for all stm32 boards
- Correct the eMMC pin configuration on stm32mp157c-ev1
- Add DFU and SPI-NAND support for stm32mp1 board
Hardware comes out of reset with implicit values, but these are outside
the accepted range for Layerscape gen 3 chassis spec used on LS1028A.
Allocate different IDs and fix up Linux DT to use them.
Signed-off-by: Alex Marginean
---
arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 9 ++
.../asm/
On Wed, Nov 27, 2019 at 9:58 PM Alex Marginean
wrote:
>
> Hardware comes out of reset with implicit values, but these are outside
> the accepted range for Layerscape gen 3 chassis spec used on LS1028A.
> Allocate different IDs and fix up Linux DT to use them.
>
> Signed-off-by: Alex Marginean
> -
On Wed, Nov 27, 2019 at 02:34:14PM +0100, Soeren Moch wrote:
> On 27.11.19 13:55, Tom Rini wrote:
> > On Wed, Nov 27, 2019 at 02:03:03PM +0800, Bin Meng wrote:
> >> Hi Tom,
> >>
> >> On Wed, Nov 20, 2019 at 10:22 PM Tom Rini wrote:
> >>> On Wed, Nov 20, 2019 at 10:11:00AM +0800, Bin Meng wrote:
>
In case CONFIG_SYSRESET is set, do_reset from reset.c will not be available
anywere, even if SYSRESET is disabled for SPL in the board specific header
file like this:
#if defined(CONFIG_SPL_BUILD)
#undef CONFIG_WDT
#undef CONFIG_WATCHDOG
#undef CONFIG_SYSRESET
#define CONFIG_HW
There are currently no known users of this functionality on this
platform, disable it to prepare for additional VxWorks functionality
that would cause this platform to fail to link.
Cc: Soeren Moch
Signed-off-by: Tom Rini
---
configs/tbs2910_defconfig | 1 +
1 file changed, 1 insertion(+)
diff
On 27.11.19 15:23, Tom Rini wrote:
> There are currently no known users of this functionality on this
> platform, disable it to prepare for additional VxWorks functionality
> that would cause this platform to fail to link.
>
> Cc: Soeren Moch
> Signed-off-by: Tom Rini
Acked-by: Soeren Moch
Than
Hi Alex,
Am 2019-11-27 14:57, schrieb Alex Marginean:
Hardware comes out of reset with implicit values, but these are outside
the accepted range for Layerscape gen 3 chassis spec used on LS1028A.
Allocate different IDs and fix up Linux DT to use them.
Signed-off-by: Alex Marginean
---
arch/ar
On Wed, Nov 27, 2019 at 11:56:15AM +0100, Lukasz Majewski wrote:
> Thank you for your work on enhancing DFU. The patch series is generally
> Ok.
>
> Please find some minor comments/requests below.
Thank you for review, my answers below.
> > +#ifdef CONFIG_DFU_TIMEOUT
> > + dfu_set_timeout(val
Hi Neil,
On Wed, 27 Nov 2019 at 18:30, Neil Armstrong wrote:
>
> Hi,
>
> On 26/11/2019 22:12, Anand Moon wrote:
> > odroid n2 eMMC module would failed to boot up,
> > because of TX phase clk failure, fix the typo in
> > TX phase macro to help tune correct clk freqency.
> >
> > Before these change
Le lun. 25 nov. 2019 à 17:20, Igor Opaniuk a
écrit :
> + Alex Deymo
>
> Hi Zdenek
>
> On Mon, Nov 25, 2019 at 6:05 PM zdenek.bou...@siemens.com
> wrote:
> >
> > Hello,
> >
> > SPDX-License-Identifier: BSD-3-Clause might be wrong in the following 4
> files from Android Open Source Project (AOSP):
Hi Neil,
On Wed, 27 Nov 2019 at 18:25, Neil Armstrong wrote:
>
> Hi,
>
> On 26/11/2019 22:12, Anand Moon wrote:
> > Add missing config option CONFIG_MESON_GXBB and CONFIG_SYS_BOARD,
> > for odroid-c2 and nanopi k2 board
> >
> > Signed-off-by: Anand Moon
> > ---
> > configs/nanopi-k2_defconfig |
Hi Michael,
On 11/27/2019 3:33 PM, Michael Walle wrote:
Hi Alex,
Am 2019-11-27 14:57, schrieb Alex Marginean:
Hardware comes out of reset with implicit values, but these are outside
the accepted range for Layerscape gen 3 chassis spec used on LS1028A.
Allocate different IDs and fix up Linux DT
On 11/27/19 3:20 PM, Claudius Heine wrote:
> In case CONFIG_SYSRESET is set, do_reset from reset.c will not be available
> anywere, even if SYSRESET is disabled for SPL in the board specific header
> file like this:
>
> #if defined(CONFIG_SPL_BUILD)
> #undef CONFIG_WDT
> #undef CONFIG_
Hi Andy,
> On Wed, Nov 27, 2019 at 11:56:15AM +0100, Lukasz Majewski wrote:
>
> > Thank you for your work on enhancing DFU. The patch series is
> > generally Ok.
> >
> > Please find some minor comments/requests below.
>
> Thank you for review, my answers below.
>
> > > +#ifdef CONFIG_DFU_TIM
Hi Marek,
On 27/11/2019 15.47, Marek Vasut wrote:
> On 11/27/19 3:20 PM, Claudius Heine wrote:
>> In case CONFIG_SYSRESET is set, do_reset from reset.c will not be available
>> anywere, even if SYSRESET is disabled for SPL in the board specific header
>> file like this:
>>
>> #if defined(CONFI
On 11/27/19 4:09 PM, Claudius Heine wrote:
> Hi Marek,
>
> On 27/11/2019 15.47, Marek Vasut wrote:
>> On 11/27/19 3:20 PM, Claudius Heine wrote:
>>> In case CONFIG_SYSRESET is set, do_reset from reset.c will not be available
>>> anywere, even if SYSRESET is disabled for SPL in the board specific h
On 27/11/2019 16.12, Marek Vasut wrote:
> On 11/27/19 4:09 PM, Claudius Heine wrote:
>> Hi Marek,
>>
>> On 27/11/2019 15.47, Marek Vasut wrote:
>>> On 11/27/19 3:20 PM, Claudius Heine wrote:
In case CONFIG_SYSRESET is set, do_reset from reset.c will not be available
anywere, even if SYSRE
Hardware comes out of reset with implicit values, but these are outside
the accepted range for Layerscape gen 3 chassis spec used on LS1028A.
Allocate different IDs and fix up Linux DT to use them.
Signed-off-by: Alex Marginean
Reviewed-by: Bin Meng
---
Changes in v2:
- moved code under arm/cp
On Wed, Nov 27, 2019 at 11:57:53AM +0100, Lukasz Majewski wrote:
> Hi Andy,
>
> > The stock U-Boot on Intel Edison has timeout parameter for DFU
> > command. Enable it here to be compatible with the original U-Boot
> > configuration.
> >
> > Signed-off-by: Andy Shevchenko
> > ---
> > configs/ed
On 11/27/19 4:17 PM, Claudius Heine wrote:
> On 27/11/2019 16.12, Marek Vasut wrote:
>> On 11/27/19 4:09 PM, Claudius Heine wrote:
>>> Hi Marek,
>>>
>>> On 27/11/2019 15.47, Marek Vasut wrote:
On 11/27/19 3:20 PM, Claudius Heine wrote:
> In case CONFIG_SYSRESET is set, do_reset from reset.
On Wed, Nov 27, 2019 at 05:21:32PM +0200, Andy Shevchenko wrote:
> On Wed, Nov 27, 2019 at 11:57:53AM +0100, Lukasz Majewski wrote:
> > Hi Andy,
> >
> > > The stock U-Boot on Intel Edison has timeout parameter for DFU
> > > command. Enable it here to be compatible with the original U-Boot
> > > co
On 27/11/2019 16.21, Marek Vasut wrote:
> On 11/27/19 4:17 PM, Claudius Heine wrote:
>> On 27/11/2019 16.12, Marek Vasut wrote:
>>> On 11/27/19 4:09 PM, Claudius Heine wrote:
Hi Marek,
On 27/11/2019 15.47, Marek Vasut wrote:
> On 11/27/19 3:20 PM, Claudius Heine wrote:
>> In
Hi Lukasz,
On Wed, Nov 27, 2019 at 4:15 PM Lukasz Majewski wrote:
>
> Hi Jagan,
>
> > Hi,
> >
> > I have created GPT table start from 8MB for kernel, roots etc.
> > something like
> >
> > PartStart LBA End LBA Name
> > Attributes
> > Type GUID
> > Partiti
On 11/27/19 4:40 PM, Claudius Heine wrote:
> On 27/11/2019 16.21, Marek Vasut wrote:
>> On 11/27/19 4:17 PM, Claudius Heine wrote:
>>> On 27/11/2019 16.12, Marek Vasut wrote:
On 11/27/19 4:09 PM, Claudius Heine wrote:
> Hi Marek,
>
> On 27/11/2019 15.47, Marek Vasut wrote:
>> O
Dear Peng Ma,
In message <20191127100145.44346-1-peng...@nxp.com> you wrote:
> This reverts commit 856b9cdb53f0e6c8d98f81cf71ef363c16b0aa0e.
>
> Signed-off-by: Peng Ma
Why?
A commit message should always explain why such an action is taking
place.
Best regards,
Wolfgang Denk
--
DENX Softwar
Hi Andy,
> On Wed, Nov 27, 2019 at 11:57:53AM +0100, Lukasz Majewski wrote:
> > Hi Andy,
> >
> > > The stock U-Boot on Intel Edison has timeout parameter for DFU
> > > command. Enable it here to be compatible with the original U-Boot
> > > configuration.
> > >
> > > Signed-off-by: Andy Shevche
In the future we may utilize optional argument in 'dfu' command line.
As a preparation for this, refactor do_dfu().
Signed-off-by: Andy Shevchenko
Acked-by: Lukasz Majewski
---
cmd/dfu.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/cmd/dfu.c b/cmd/dfu.c
When the `dfu` command is called from the U-Boot environment,
it now accepts an optional parameter that specifies a timeout (in seconds).
If a DFU connection is not made within that time the `dfu` command exits
(as it would if Ctrl+C was pressed). If the timeout is left empty or being
zero the `dfu
After the commit 1cc03c5c53c0 ("dfu: Provide means to find difference between
dfu-util -e and -R") the dangling ptototype appeared. Remove it here.
Fixes: 1cc03c5c53c0 ("dfu: Provide means to find difference between dfu-util -e
and -R")
Cc: Lukasz Majewski
Cc: Stephen Warren
Signed-off-by: Andy
The stock U-Boot on Intel Edison has timeout parameter for DFU command.
Enable it here to be compatible with the original U-Boot configuration.
Signed-off-by: Andy Shevchenko
---
v2:
- rebase on top of origin/master as of today (Lukasz)
configs/edison_defconfig | 1 +
1 file changed, 1 insertion
Hi Jagan,
> Hi Lukasz,
>
> On Wed, Nov 27, 2019 at 4:15 PM Lukasz Majewski wrote:
> >
> > Hi Jagan,
> >
> > > Hi,
> > >
> > > I have created GPT table start from 8MB for kernel, roots etc.
> > > something like
> > >
> > > PartStart LBA End LBA Name
> > > Attributes
>
From: Matthias Brugger
The bcm283x has grown in files, which was not reflected in the
MAINTAINERS file. Fix this by adding the missing entries.
Signed-off-by: Matthias Brugger
---
MAINTAINERS | 3 +++
1 file changed, 3 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 332fd9d74c..8
On Wed, Nov 27, 2019 at 05:10:22PM +0100, Lukasz Majewski wrote:
> > On Wed, Nov 27, 2019 at 11:57:53AM +0100, Lukasz Majewski wrote:
> > I base my patches on official releases / release candidates. It
> > applies very well on top of 2020.01-rc3 as of today. Does DFU has a
> > separate repository
On Wed, 27 Nov 2019 18:45:43 +0200
Andy Shevchenko wrote:
> On Wed, Nov 27, 2019 at 05:10:22PM +0100, Lukasz Majewski wrote:
> > > On Wed, Nov 27, 2019 at 11:57:53AM +0100, Lukasz Majewski wrote:
>
> > > I base my patches on official releases / release candidates. It
> > > applies very well on
On Mon, Nov 25, 2019 at 9:25 AM Vasily Khoruzhick wrote:
>
> Hey guys,
>
> Looks like reboot is broken on RockPro64 (RK3399-based) with mainline
> u-boot and ATF (ATF already has a fix [1]).
Added Philipp and Simon to CC.
Can anyone please help me with this issue?
> When I type 'reboot' in linu
Hi,
On Mon, Nov 25, 2019 at 10:56 PM Vasily Khoruzhick wrote:
>
> Hey guys,
>
> Looks like reboot is broken on RockPro64 (RK3399-based) with mainline
> u-boot and ATF (ATF already has a fix [1]).
>
> When I type 'reboot' in linux I get back to u-boot, but subsequent
> linux boot hangs in most cas
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