Hi, On 26/11/2019 22:12, Anand Moon wrote: > odroid n2 eMMC module would failed to boot up, > because of TX phase clk failure, fix the typo in > TX phase macro to help tune correct clk freqency. > > Before these changes. > clock is enabled (380953Hz) > clock is enabled (25000000Hz) > after these changes > clock is enabled (380953Hz) > clock is enabled (25000000Hz) > clock is enabled (52000000Hz) > clock is enabled (52000000Hz) > clock is enabled (52000000Hz) > > Signed-off-by: Anand Moon <linux.am...@gmail.com> > --- > Tested on > new orange - eMMC AJNB4R 14.6 GiB MMC 5.1 > old back - eMMC CGND3R 58.2 GiB MMC 5.0 > --- > drivers/mmc/meson_gx_mmc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c > index 031cc79ccb..87bea2888b 100644 > --- a/drivers/mmc/meson_gx_mmc.c > +++ b/drivers/mmc/meson_gx_mmc.c > @@ -53,7 +53,7 @@ static void meson_mmc_config_clock(struct mmc *mmc) > meson_mmc_clk |= CLK_CO_PHASE_180; > > /* 180 phase tx clock */ > - meson_mmc_clk |= CLK_TX_PHASE_000; > + meson_mmc_clk |= CLK_TX_PHASE_180; > > /* clock settings */ > meson_mmc_clk |= clk_src; >
I don't understand what this change helps, the linux driver sets the TX phase to 0, why 180 would help here ? Neil _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
