On 11/27/19 11:20 AM, Masahiro Yamada wrote: > On Tue, Nov 26, 2019 at 5:25 PM Marek Vasut <ma...@denx.de> wrote: >>>> diff --git a/drivers/mtd/nand/raw/denali_spl.c >>>> b/drivers/mtd/nand/raw/denali_spl.c >>>> index dbaba3cab2..b8b29812aa 100644 >>>> --- a/drivers/mtd/nand/raw/denali_spl.c >>>> +++ b/drivers/mtd/nand/raw/denali_spl.c >>>> @@ -173,6 +173,13 @@ void nand_init(void) >>>> page_size = readl(denali_flash_reg + DEVICE_MAIN_AREA_SIZE); >>>> oob_size = readl(denali_flash_reg + DEVICE_SPARE_AREA_SIZE); >>>> pages_per_block = readl(denali_flash_reg + PAGES_PER_BLOCK); >>>> + >>>> + /* Do as denali_hw_init() does. */ >>>> + writel(CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES, >>>> + denali_flash_reg + SPARE_AREA_SKIP_BYTES); >>> >>> I guess you tested this for SOCFPGA. >>> >>> Please tell me the value of CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES. >> 2 > > > CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=2 is the only value > that works with the Boot ROM, right? > > How did you find the correct value is 2 ? > > Is it documented in the SOCFPGA datasheet or somewhere? > Or, did you repeat try-and-error?
I took it from the old vendoruboot port. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
