It was recently discovered that the USB PHY control register offset on
the A83T is 0x410 like on the A33, not 0x404. Fix it.
Fixes: 0c935acb9e5d ("sunxi: usb_phy: Add support for A83T USB PHYs")
Signed-off-by: Chen-Yu Tsai
---
arch/arm/mach-sunxi/usb_phy.c | 2 +-
1 file changed, 1 insertion(+),
The upstream (Linux) device tree file for the Bananapi M3 follows the
convention of using the well known brand name, instead of the vendor
name, for naming. The file was recently added to upstream in commit
359b5a1e1c2d ("ARM: sun8i: a83t: Add device tree for Sinovoip Bananapi
BPI-M3")
Rename the
Hi,
This series is a bunch of improvements for A83T boards, the Bananapi M3
and Cubietruck Plus in particular:
- eMMC is enabled if it wasn't enabled already
- EMAC is enabled for Ethernet support
- MUSB switched to gadget mode
EMAC is not fully tested. The MII and auto-negotiation part lo
Set CONFIG_MMC_SUNXI_SLOT_EXTRA=2 to enable the eMMC controller to
access eMMC on the board.
Signed-off-by: Chen-Yu Tsai
---
configs/Cubietruck_plus_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/Cubietruck_plus_defconfig
b/configs/Cubietruck_plus_defconfig
index 3ec0
The EMAC syscon has configurable RX/TX delay chains for use with RGMII
PHYs.
This adds support for configuring them via device tree properties. The
property names and format were defined in Linux's dwmac-sun8i binding
that was merged at one point.
Signed-off-by: Chen-Yu Tsai
---
drivers/net/sun
The Cubietruck Plus has an RTL8211E PHY connected to the EMAC using
RGMII. The PHY is powered by DLDO4 @ 3.3V, while the I/O pins are
powered by DLDO3 @ 2.5V.
This patch adds a U-boot specific dtsi file for the board adding
an enabled EMAC node, and enables the EMAC driver in the defconfig.
The bi
Only the H3/H5 SoCs have an internal PHY and its related clock and
reset controls.
Use an #ifdef to guard the internal PHY control code block so it
can be built for other SoCs, such as the A83T or A64.
Signed-off-by: Chen-Yu Tsai
---
drivers/net/sun8i_emac.c | 3 +++
1 file changed, 3 insertion
The Bananapi M3 has an RTL8211E PHY connected to the EMAC using
RGMII. The PHY is powered by DCDC1 through SW @ 3.3V.
This patch adds a U-boot specific dtsi file for the board adding
an enabled EMAC node, and enables the EMAC driver in the defconfig.
The binding used here is the old revision curre
The Cubietruck Plus has a micro-USB OTG port. It supports both host and
gadget mode. Having the OTG port operate in gadget mode is more useful,
as we can use it for fastboot or Ethernet over USB.
The board has 2 other USB host ports that are supported. These can be
used for connecting peripherals.
The Bananapi M3 has a micro-USB OTG port. It supports both host and
gadget mode. Having the OTG port operate in gadget mode is more useful,
as we can use it for fastboot or Ethernet over USB.
The board has 2 other USB host ports that are supported. These can be
used for connecting peripherals.
Si
Hi Antony,
On Thu, Sep 21, 2017 at 03:22:17PM +, Antony Antony wrote:
> Add initial DT for NanoPi NEO Plus2 by FriendlyARM
> - Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
> - 1 GB DDR3 RAM
> - 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
> - micro SD card slot
> - Gigabit Ethernet
Hello. I have a clearfog base board with PCI-E video card based on
SIlicon Motion s750 (InnoDisk EMPV-1201), and i have trouble with
u-boot and accessing to this card.
I use last u-boot from git, and when i try to read memory from Base
address 0 of PCI-E, board resetted. log from board:
High spee
Hello. I have a clearfog base board with PCI-E video card based on
SIlicon Motion s750 (InnoDisk EMPV-1201), and i have trouble with
u-boot and accessing to this card.
I use last u-boot from git, and when i try to read memory from Base
address 0 of PCI-E, board resetted. log from board:
High spee
From: zijun_hu
the new GD address is calculated via board data BD currently
it require the new GD area locates below BD tightly, so a strict
constraint is imposed on memory layout which maybe make special
platform unpleasant.
fix it by getting new GD address from gd->new_gd directly.
Signed-off
Rx Compliance tests may fail intermittently at high
jitter frequencies using default register values.
Program register USB_PHY_RX_OVRD_IN_HI in certain sequence
to make the Rx compliance test pass.
Signed-off-by: Ran Wang
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 +
arch/arm/cpu/armv8/f
Hi Vasily,
On 22/09/17 05:45, Vasily Khoruzhick wrote:
> On Thu, Sep 21, 2017 at 12:27 AM, Maxime Ripard
> wrote:
>> On Thu, Sep 21, 2017 at 06:07:04AM +, Vasily Khoruzhick wrote:
>>> Add PWM definition to sun50i-a64.dtsi - it's compatible with PWM found on H3
>>>
>>> Signed-off-by: Vasily Kh
Hi,
On Fri, Sep 22, 2017 at 03:20:33AM +, Chen-Yu Tsai wrote:
> On Wed, Sep 13, 2017 at 3:01 AM, Maxime Ripard
> wrote:
> > A good number of our boards have USB_GADGET enabled. Imply it so that all
> > the boards can benefit from it, and remove some boilerplate from our
> > defconfigs.
> >
>
On Fri, Sep 22, 2017 at 07:26:28AM +, Chen-Yu Tsai wrote:
> Set CONFIG_MMC_SUNXI_SLOT_EXTRA=2 to enable the eMMC controller to
> access eMMC on the board.
>
> Signed-off-by: Chen-Yu Tsai
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://f
On Fri, Sep 22, 2017 at 07:26:27AM +, Chen-Yu Tsai wrote:
> The upstream (Linux) device tree file for the Bananapi M3 follows the
> convention of using the well known brand name, instead of the vendor
> name, for naming. The file was recently added to upstream in commit
> 359b5a1e1c2d ("ARM: su
On 21/09/2017 18:58, Max Krummenacher wrote:
> The functionality is not needed in the SPL. It allows to remove
> code conditionally in the spl case in some drivers.
>
> Signed-off-by: Max Krummenacher
> ---
>
> include/configs/colibri_imx6.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff -
Hi Diego,
On 21/09/2017 20:10, Diego Dorta wrote:
> When compiling with W=1 the following warning is observed:
>
> board/freescale/mx6sabresd/mx6sabresd.c:266:5: warning:
> no previous prototype for ‘board_mmc_get_env_dev’
> [-Wmissing-prototypes] int board_mmc_get_env_dev(int devno)
>
> Remove
On 21/09/2017 04:19, Peng Fan wrote:
> For the patchset, Ping..
>
I know, this is in my TODO list. I will review them soon.
Thanks for patience.
Regards,
Stefano
> Thanks,
> Peng.
> On Wed, Aug 30, 2017 at 02:14:42PM +0800, Peng Fan wrote:
>> Typo fix: CONIFG->CONFIG
>>
>> Signed-off-by: Peng
Hi
10 days ago one of first https://www.crowdsupply.com/gnubee/personal-cloud-1
systems arrived at my home and is now running happily my preferred Linux
distribution Debian. I put on a small web page for it under http://gnubee.org/
index.html.
I am however not satisfied with the situation on ho
On Fri, Sep 22, 2017 at 07:26:33AM +, Chen-Yu Tsai wrote:
> Only the H3/H5 SoCs have an internal PHY and its related clock and
> reset controls.
>
> Use an #ifdef to guard the internal PHY control code block so it
> can be built for other SoCs, such as the A83T or A64.
>
> Signed-off-by: Chen
Hi
On Fri, Sep 22, 2017 at 07:26:29AM +, Chen-Yu Tsai wrote:
> It was recently discovered that the USB PHY control register offset on
> the A83T is 0x410 like on the A33, not 0x404. Fix it.
>
> Fixes: 0c935acb9e5d ("sunxi: usb_phy: Add support for A83T USB PHYs")
> Signed-off-by: Chen-Yu Tsai
On Fri, Sep 22, 2017 at 07:26:32AM +, Chen-Yu Tsai wrote:
> The EMAC syscon has configurable RX/TX delay chains for use with RGMII
> PHYs.
>
> This adds support for configuring them via device tree properties. The
> property names and format were defined in Linux's dwmac-sun8i binding
> that w
On Fri, Sep 22, 2017 at 07:26:30AM +, Chen-Yu Tsai wrote:
> The Bananapi M3 has a micro-USB OTG port. It supports both host and
> gadget mode. Having the OTG port operate in gadget mode is more useful,
> as we can use it for fastboot or Ethernet over USB.
>
> The board has 2 other USB host por
On Fri, Sep 22, 2017 at 4:14 PM, Maxime Ripard
wrote:
> On Fri, Sep 22, 2017 at 07:26:30AM +, Chen-Yu Tsai wrote:
>> The Bananapi M3 has a micro-USB OTG port. It supports both host and
>> gadget mode. Having the OTG port operate in gadget mode is more useful,
>> as we can use it for fastboot o
On 22.09.2017 08:32, Влад Мао wrote:
> Hello. I have a clearfog base board with PCI-E video card based on
> SIlicon Motion s750 (InnoDisk EMPV-1201), and i have trouble with
> u-boot and accessing to this card.
>
> I use last u-boot from git, and when i try to read memory from Base
> address 0 of
On Fri, Sep 22, 2017 at 06:41:40AM +, icen...@aosc.io wrote:
> 在 2017-09-22 03:18，Maxime Ripard 写道：
> > On Thu, Sep 21, 2017 at 07:48:20AM +, Icenowy Zheng wrote:
> > >
> > >
> > > 于 2017年9月21日 GMT+08:00 下午3:40:23, Maxime Ripard
> > > 写到:
> > > >Hi,
> > > >
> > > >On Wed, Sep 20, 2017 at
Hi,
I got also somme issue with my QSPI on CycmoneV and u-boot 2017.07
I cherry-picked commits from Jason Rush :
b90ce1c29023abe730d2b4174294bdc09acef3e0
836a0278476be94c95ff084f81c2302fc5c0265c
b0eac7e0d1e4817388543b58d30b322d0bac49a8
Also i forgot to put the
"u-boot,dm-pre-reloc;" in my device
Sorry these are my local commits you can find them here :
https://patchwork.ozlabs.org/patch/765992/
https://patchwork.ozlabs.org/patch/765996/
https://patchwork.ozlabs.org/patch/765997/
https://patchwork.ozlabs.org/patch/765998/
2017-09-22 14:12 GMT+02:00 Clément Péron :
> Hi,
>
> I got also som
The regulator bindings state that regulator prefixes are allowd to be
in upper or lower case. However pmic_bind_children from pmic_uclass uses
strncmp to compare DT node name against prefix. This comparison is case
sensitive hence the regulator driver prefix case matters.
Signed-off-by: Felix Brac
On 22.09.2017 14:13, Владислав wrote:
I try to port sm750fb driver to uboot. I need to access bar0 because its
framebuffer memory of video card.
After little research i find out pciauto_region_allocate failed for
allocation region for bar0:
PCI Autoconfig: BAR 0, Mem, size=0x400, No room
We have limited stack in SPL builds. Drop itrblock and move to
malloc/free of itr to move this off of the stack. As part of this fix a
double-free issue in fat_size().
Signed-off-by: Tom Rini
---
Rework to use malloc/free as moving this to a global overflows some SH
targets.
fs/fat/fat.c | 14
Add initial DT for NanoPi NEO Plus2 by FriendlyARM
- Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
- 1 GB DDR3 RAM
- 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
- micro SD card slot
- Gigabit Ethernet (external RTL8211E-VB-CG chip)
- 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A modul
Hi Ran,
On Thu, Sep 21, 2017 at 1:34 PM, Ran Wang wrote:
> From: Ashish Kumar
>
> Signed-off-by: Ashish Kumar
> Signed-off-by: Amrita Kumari
> Signed-off-by: Ran Wang
> ---
> Change in v2:
> 1.Adjust USB nodes position in dts to keep them sorted in
> unit-address.
>
Hi,
On Fri, Sep 22, 2017 at 8:32 PM, Stefan Roese wrote:
> On 22.09.2017 14:13, Владислав wrote:
>>
>> I try to port sm750fb driver to uboot. I need to access bar0 because its
>> framebuffer memory of video card.
>>
>> After little research i find out pciauto_region_allocate failed for
>> allocat
Hi Simon,
On Thu, Sep 21, 2017 at 12:58 PM, Simon Glass wrote:
> Hi Bin,
>
> On 20 September 2017 at 08:41, Bin Meng wrote:
>>
>> Hi Simon,
>>
>> On Wed, Sep 20, 2017 at 9:50 PM, Simon Glass wrote:
>> > Hi Bin,
>> >
>> > On 17 September 2017 at 21:45, Bin Meng wrote:
>> >> Hi Simon,
>> >>
>> >
On 08/21/2017 12:11 AM, Marek Vasut wrote:
> This patch prepares the driver to support controller(s) with registers
> at locations shifted by constant. Pull out the readl()/writel() from
> the driver into separate functions, where the adjustment of the register
> offset can be easily contained.
So
Hi,
On 09/21/2017 11:29 PM, Jean-Jacques Hiblot wrote:
> This adds a simple helper function to display information (bus width and
> mode) based on a capability mask. Useful for debug.
I agreed this is useful.. but there is no usage in your patch.
How did you use this? and Where does call this fun
On 09/21/2017 11:30 PM, Jean-Jacques Hiblot wrote:
> From: Kishon Vijay Abraham I
>
> Add a new function *mmc_set_signal_voltage* in mmc core
> which can be used during mmc initialization to select the
> signal voltage. Platform driver should use the set_ios
> callback function to select the sign
On 09/21/2017 11:30 PM, Jean-Jacques Hiblot wrote:
> From: Kishon Vijay Abraham I
>
> With certain SD cards like Kingston 8GB/16GB UHS card, it is seen that
> MMC_CMD_ALL_SEND_CID cmd fails on first attempt, but succeeds
> subsequently. Therefore, retry MMC_CMD_ALL_SEND_CID cmd a few time
> as do
On 09/21/2017 11:30 PM, Jean-Jacques Hiblot wrote:
> From: Kishon Vijay Abraham I
>
> Add a new function to parse host controller dt node and
> set mmc_config. This function can be used by mmc controller
> drivers to set the generic mmc_config.
> This function can be extended to set other UHS mod
On 09/21/2017 11:30 PM, Jean-Jacques Hiblot wrote:
> HS200 only supports 1.2v and 1.8v signal voltages. DDR52 supports 3.3v/1.8v
> or 1.2v signal voltages.
> Select the lowest voltage available when using those modes.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
> drivers/mmc/mmc.c | 68
> +
Hello
Does the code below really work?
On my custom MX6Q board, the code hangs on the read of the
"PCIE_PL_PFLR". Please note that this code sequence is not entered the
first time after a power up; I have to execute a U-Boot reset to
actually trigger the hang. Any ideas what is going wrong?
Whi
On 09/22/2017 12:03 AM, Jean-Jacques Hiblot wrote:
> In the TI SOCs a PBIAS cell exists to provide a bias voltage to the MMC1
> IO cells. Without this bias voltage these I/O cells can not function
> properly. This bias voltage is either 1.8v or 3.0v.
>
> The first patch adds 2 functions to the DM
On Fri, Sep 01, 2017 at 05:25:58PM +0300, Tuomas Tynkkynen wrote:
> These take the 'struct udevice *' as an argument, not the
> 'struct xilinx_pcie *` which is a local variable. Fix the comments to
> match the code.
>
> Signed-off-by: Tuomas Tynkkynen
> Reviewed-by: Bin Meng
Applied to u-boot/
On Thu, Sep 21, 2017 at 10:45:08AM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull the following patch from u-boot-nds32 into your tree.
> Thanks!
>
> The following changes since commit e884656c2c0b2406b9bf99ea76f5a8c75128a331:
>
> Merge git://www.denx.de/git/u-boot-imx (2017-0
On Fri, Sep 01, 2017 at 05:26:02PM +0300, Tuomas Tynkkynen wrote:
> 'default n' is the default anyway so it doesn't need to be specified
> explicitly, and the rest of the file doesn't specify it either anywhere.
> Drop it.
>
> Signed-off-by: Tuomas Tynkkynen
> Reviewed-by: Bin Meng
Applied to
On Tue, Sep 05, 2017 at 11:04:19AM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> reset-names property is needed to use the reset
> API for STi sdhci driver.
>
> Signed-off-by: Patrice Chotard
> Reviewed-by: Jaehoon Chung
> Reviewed-by: Simon Glass
Applied to u-boot/master
On Tue, Sep 05, 2017 at 11:04:18AM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> Use struct udevice* as input parameter. Previous
> parameters are retrieved through plat and priv data.
>
> This to prepare to use the reset framework.
>
> Signed-off-by: Patrice Chotard
> Revi
On Fri, Sep 01, 2017 at 05:25:59PM +0300, Tuomas Tynkkynen wrote:
> This field has never been used as the driver has been DM-based since the
> beginning. Drop it.
>
> Signed-off-by: Tuomas Tynkkynen
> Reviewed-by: Bin Meng
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description:
On Fri, Sep 01, 2017 at 05:26:00PM +0300, Tuomas Tynkkynen wrote:
> This field is no longer used since the DM conversion. Drop it.
>
> Signed-off-by: Tuomas Tynkkynen
> Reviewed-by: Bin Meng
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
_
On Wed, Sep 13, 2017 at 06:00:08PM +0200, patrice.chot...@st.com wrote:
> From: Christophe Kerello
>
> This patch adds the support of reset and clock control
> block (rcc) found on STM32 SoCs.
> This driver is similar to a MFD linux driver.
>
> This driver supports currently STM32H7 only.
> STM
On Thu, Sep 14, 2017 at 02:37:08PM +0200, Felix Brack wrote:
> This patch provides default implementations of the two functions
> set_uart_mux_conf and set_mux_conf_regs. Hence boards not using
> them do not need to provide their distinct empty definitions.
>
> Signed-off-by: Felix Brack
> Revie
On Tue, Sep 05, 2017 at 11:04:20AM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> Signed-off-by: Patrice Chotard
> Reviewed-by: Jaehoon Chung
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
___
On Tue, Sep 05, 2017 at 11:04:22AM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> Enable USB Host Networking support by enabling Ethernet/USB
> adaptors support and by enabling some BOOTP flags
>
> Signed-off-by: Patrice Chotard
> Reviewed-by: Simon Glass
Applied to u-boot/
On Tue, Sep 05, 2017 at 11:04:23AM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> Signed-off-by: Patrice Chotard
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
_
On Fri, Sep 01, 2017 at 05:26:01PM +0300, Tuomas Tynkkynen wrote:
> This field is no longer used since the DM conversion. Drop it.
>
> Signed-off-by: Tuomas Tynkkynen
> Reviewed-by: Bin Meng
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
_
On Wed, Sep 13, 2017 at 06:00:09PM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> All these files are imported from linux kernel v4.13
>
> Add device tree support for STM32H743 SoC and discovery
> board. This board offers :
> _ STM32H743XIH6 microcontroller with 2 Mbytes of
On Tue, Sep 05, 2017 at 11:04:27AM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> Add usb_gadget_handle_interrupts(), board_usb_init(),
> board_usb_cleanup() and g_dnl_board_usb_cable_connected()
> callbacks needed for FASTBOOT support
>
> Signed-off-by: Patrice Chotard
> Rev
On Tue, Sep 05, 2017 at 11:04:25AM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> On STi 96boards, configure by default the micro USB connector
> (managed by DWC3 hardware block) in peripheral mode.
> This will allow to use fastboot feature.
>
> Signed-off-by: Patrice Chotard
On Tue, Sep 05, 2017 at 11:04:24AM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> This patch adds the ST glue logic to manage the DWC3 HC
> on STiH407 SoC family. It configures the internal glue
> logic and syscfg registers.
>
> Part of this code been extracted from kernel.org
On Tue, Sep 05, 2017 at 11:04:21AM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> This is the generic phy driver for the picoPHY ports
> used by USB2/1.1 controllers. It is found on STiH407 SoC
> family from STMicroelectronics.
>
> Signed-off-by: Patrice Chotard
> Reviewed-by
On Fri, Sep 15, 2017 at 12:19:38PM -0600, Stephen Warren wrote:
> From: Stephen Warren
>
> Make various changes to the GPT test:
>
> 1) Reference the disk image using an absolute path in all cases. This
> allows test/py to operate correctly if it's run from a directory other
> than the root of
On Wed, Sep 13, 2017 at 06:00:05PM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> STM32F7 and STM32H7 shares the same UART block, add
> STM32H7 compatible string.
>
> Signed-off-by: Patrice Chotard
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
sign
On Wed, Sep 13, 2017 at 06:00:04PM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> STM32H7 SoCs uses the same pinctrl block as found into
> STM32F7 SoCs
>
> Signed-off-by: Patrice Chotard
> Reviewed-by: Simon Glass
> Reviewed-by: Vikas Manocha
Applied to u-boot/master, than
On Tue, Sep 05, 2017 at 11:04:26AM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> Update ehci and ohci node's compatible string in order to
> use ehci-generic and ohci-generic drivers.
>
> Signed-off-by: Patrice Chotard
> Reviewed-by: Simon Glass
Applied to u-boot/master, t
On Fri, Sep 15, 2017 at 03:12:28PM +0200, Anatolij Gustschin wrote:
> Hi Tom,
>
> please pull some new video patches. The full build passed:
>
> https://travis-ci.org/vdsao/u-boot-video/builds/275799369
>
> The following changes since commit c98ac3487e413c71e5d36322ef3324b21c6f60f9:
>
> Pr
On Wed, Sep 13, 2017 at 06:00:06PM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> This driver implements basic clock setup, only clock gating
> is implemented.
>
> This driver doesn't implement .of_match as it's binded
> by MFD RCC driver.
>
> Files include/dt-bindings/clock/
On Wed, Sep 13, 2017 at 06:00:12PM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> This patch adds support for stm32h7 soc family, stm32h743
> discovery and evaluation boards.
>
> For more information about STM32H7 series, please visit:
> http://www.st.com/en/microcontrollers/s
On Fri, Sep 15, 2017 at 01:15:25PM -0400, Tom Rini wrote:
> With support for overlays and calling the -@ flag to dtc we need to have
> at least 1.4.3 available now.
>
> Cc: Simon Glass
> Reported-by: Stephen Warren
> Signed-off-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
signatu
On Fri, Sep 15, 2017 at 10:16:48PM +0200, Jörg Krause wrote:
> Fixes:
> net/tftp.c:811: undefined reference to `efi_set_bootdev'
>
> Signed-off-by: Jörg Krause
> Reviewed-by: Bin Meng
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
On Wed, Sep 13, 2017 at 06:24:24PM +0800, Kever Yang wrote:
> Since we may jump to next stage like ATF/OP-TEE instead of U-Boot,
> we need to stash the bootstage info before it.
>
> Signed-off-by: Kever Yang
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
On Wed, Sep 13, 2017 at 06:00:07PM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> This driver is adapted from linux drivers/reset/reset-stm32.c
> It's compatible with STM32 F4/F7/H7 SoCs.
>
> This driver doesn't implement .of_match as it's binded
> by MFD RCC driver.
>
> To a
On Wed, Sep 13, 2017 at 06:00:10PM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> This file is imported from linux kernel v4.13
>
> Add device tree support for STM32H743 evaluation board.
> This board offers :
> _ STM32H743XIH6 microcontroller with 2 Mbytes of
> Flash me
On Fri, Sep 22, 2017 at 09:02:09AM -0400, Tom Rini wrote:
> We have limited stack in SPL builds. Drop itrblock and move to
> malloc/free of itr to move this off of the stack. As part of this fix a
> double-free issue in fat_size().
>
> Signed-off-by: Tom Rini
Applied to u-boot/master, thanks!
On Sun, Sep 17, 2017 at 09:42:25AM -0400, Tom Rini wrote:
> Our minimum DTC version is 1.4.3, so check that out.
>
> Signed-off-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
___
U-Boot mailing l
在 2017-09-22 19:57，Maxime Ripard 写道：
On Fri, Sep 22, 2017 at 06:41:40AM +, icen...@aosc.io wrote:
在 2017-09-22 03:18，Maxime Ripard 写道：
> On Thu, Sep 21, 2017 at 07:48:20AM +, Icenowy Zheng wrote:
> >
> >
> > 于 2017年9月21日 GMT+08:00 下午3:40:23, Maxime Ripard
> > 写到:
> > >Hi,
> > >
> > >On
On 09/21/2017 11:51 PM, Jean-Jacques Hiblot wrote:
> This series enables the ADMA present in some OMAP SOCs.
> On a DRA7 the performances when reading from the eMMC go from 18MB/s
> to 43MB/s.
> Also while were at it, fix some incorrect bit operations
>
> This series applies on top of the series
On Fri, Sep 15, 2017 at 08:21:13AM -0700, York Sun wrote:
> common/spl/spl_fit.c:201:12: warning: passing argument 4 of ‘gunzip’
> from incompatible pointer type [-Wincompatible-pointer-types]
>src, &length))
>
> Signed-off-by: York Sun
> Reported-by: Heinrich Schuchardt
> CC: Jean-Jacq
On Wed, Sep 13, 2017 at 06:00:11PM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> This patch adapts stm32h743 disco and eval dts files to match
> with U-boot requirements or add features wich are not yet
> upstreamed on kernel side :
>
> _ Add RCC clock driver node and update
On Fri, Sep 22, 2017 at 11:20:10AM +, Chen-Yu Tsai wrote:
> On Fri, Sep 22, 2017 at 4:14 PM, Maxime Ripard
> wrote:
> > On Fri, Sep 22, 2017 at 07:26:30AM +, Chen-Yu Tsai wrote:
> >> The Bananapi M3 has a micro-USB OTG port. It supports both host and
> >> gadget mode. Having the OTG port o
Dear JJ,
On 09/21/2017 11:29 PM, Jean-Jacques Hiblot wrote:
> This series brings support for HS200 and UHS modes to the mmc core.
> It has been tested with the hsmmc driver on several platforms (DRA7,
> AM57x, AM437x, beaglebone black, Atmel SAMA5D3 xplained). Some modifications
> are required in
On Fri, Sep 22, 2017 at 04:42:24AM +, Vasily Khoruzhick wrote:
> >> >>> + lcdc_init(lcdc);
> >> >>> + sunxi_lcdc_config_pinmux();
> >> >>
> >> >> This is already handled in sunxi_lcdc_tcon0_mode_set, why duplicate
> >> >> it?
> >> >
> >> > Because the one that sunxi_lcdc_tcon0_mode_set(
Hello,
I'm working on a DM and DT compatible driver for the TI TPS65910 PMIC.
The regulators for this PMIC are defined in arch/arm/dts/tps65910.dtsi
and named 'regulator@0' through 'regulator@13'.
Using for example the prefix 'regulator@1' in pmic_child_info[] will
match to 'regualtor@1' and 'regu
When building with W=1 errors like the one below is seen:
board/freescale/mx6sabresd/mx6sabresd.c:546:5: warning:
no previous prototype for ‘overwrite_console’
[-Wmissing-prototypes] int overwrite_console(void)
Fix the build warnings by including .
Signed-off-by: Diego Dorta
---
board/advantec
Hi Bin,
On 22.09.2017 15:33, Bin Meng wrote:
On Fri, Sep 22, 2017 at 8:32 PM, Stefan Roese wrote:
On 22.09.2017 14:13, Владислав wrote:
I try to port sm750fb driver to uboot. I need to access bar0 because its
framebuffer memory of video card.
After little research i find out pciauto_region_
Hi Antony,
On Fri, Sep 22, 2017 at 01:09:05PM +, Antony Antony wrote:
> +&mmc0 {
> + compatible = "allwinner,sun50i-h5-mmc",
> + "allwinner,sun50i-a64-mmc";
Sorry for missing that out earlier, but why do you need to override
the compatible here?
Is there something missin
From: Patrice Chotard
Update the CONFIG_EXTRA_ENV_SETTINGS, BOOT_TARGET_DEVICES and CONFIG_BOOTARGS
Fix SDRAM size
v2: rebase on v2017.09
Lee Jones (1):
board: STiH410-B2260: set ramdisk_addr_r to 0x4800
Nicolas Le Bayon (1):
board: STiH410-B2260: fix sdram size
Patrice Chotard (1):
From: Patrice Chotard
Update environment variable by updating:
_ BOOT_TARGET_DEVICE
_ CONFIGS_BOOTARGS
_ kernel_addr_r, fdtfile, fdt_addr_r, scriptaddr, fdt_high, intird_high
Signed-off-by: Patrice Chotard
---
v2: rebase on v2017.09
configs/stih410-b2260_defconfig | 2 +-
include/configs
From: Nicolas Le Bayon
32MB are reserved for Trusted Zone purpose
Signed-off-by: Nicolas Le Bayon
---
v2: rebase on v2017.09
include/configs/stih410-b2260.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
i
From: Lee Jones
Add missing ramdisk_addr_r param and set it to 0x4800
Signed-off-by: Lee Jones
---
v2: rebase on v2017.09
include/configs/stih410-b2260.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
index fc11f3c..9
After discussing it with Maxime in IRC I decided to wait till pinctrl
driver for sunxi is ready.
Please kindly disregard this series.
Regards,
Vasily
On Fri, Sep 22, 2017 at 7:44 AM, Maxime Ripard
wrote:
> On Fri, Sep 22, 2017 at 04:42:24AM +, Vasily Khoruzhick wrote:
>> >> >>> + lcdc_i
---
drivers/pci/pci_mvebu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index da0aa29865..076a63f210 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -82,11 +82,11 @@ struct mvebu_pcie {
/*
* MV
Hi Philipp,
On 09/21/2017 10:57 AM, Dr. Philipp Tomsich wrote:
Simon & Alexander,
It appears our setjmp/longjmp prototypes and implementations are
in non-compliance with current C-standards (I checked against
both C99 and C2011).
U-Boot defines setjmp as:
int setjmp(struct jmp_buf_data *j
dram_ecc_scrubbing() had code to skip unused DRAM banks but it would not
work because mvebu_sdram_bs() returns 0 and the code was subtracting 1
before checking the size. Remove the -1 from the bank size and the +1
from the total which will skip unused banks and still calculate the
correct size. Put
On 09/22/2017 04:18 PM, Tom Rini wrote:
> On Tue, Sep 05, 2017 at 11:04:21AM +0200, patrice.chot...@st.com wrote:
>
>> From: Patrice Chotard
>>
>> This is the generic phy driver for the picoPHY ports
>> used by USB2/1.1 controllers. It is found on STiH407 SoC
>> family from STMicroelectronics.
>>
On 09/22/2017 04:00 PM, David Müller (ELSOFT AG) wrote:
> Hello
>
> Does the code below really work?
>
> On my custom MX6Q board, the code hangs on the read of the
> "PCIE_PL_PFLR". Please note that this code sequence is not entered the
> first time after a power up; I have to execute a U-Boot re
1 - 100 of 124 matches
Mail list logo
