For CLK uclass add post binding support to recursively bind its
children as clk devices.
Add the clock driver for AT91's SoCs.
Changes in v2:
- Remove the redundant log print.
Wenyou Yang (2):
clk: clk-uclass: Add post binding for CLK uclass
clk: at91: Add new clock driver
arch/arm/mach-a
The patch is referred to at91 clock driver of Linux, to make
the clock node descriptions in dt are aligned with the Linux.
Signed-off-by: Wenyou Yang
---
Changes in v2:
- Remove the redundant log print.
arch/arm/mach-at91/include/mach/at91_pmc.h | 11 ++-
drivers/clk/Kconfig
Add post binding support for CLK uclass to recursively bind
its children as clk devices.
Signed-off-by: Wenyou Yang
---
Changes in v2: None
drivers/clk/clk-uclass.c | 51
1 file changed, 51 insertions(+)
diff --git a/drivers/clk/clk-uclass.c b/
AT91 PIO4 controller is a combined gpio-controller, pin-mux and
pin-config module.
This patch is to add the pinctrl driver, and rework the atmel-pio4
gpio driver to support driver model and device tree.
Changes in v4:
- Remove the redundant log print.
Changes in v3:
- Add bind callback to supp
AT91 PIO4 controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.
The pin configuration is performed on specific registers which
are shared along with the gpio controller. So regard the pinctrl
device as a chil
In order to make these PIO4 definitions shared with AT91 PIO4
pinctrl driver, move them from the existing gpio driver to the
head file, and rephrase them.
Signed-off-by: Wenyou Yang
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/mach-at91/include/mach/atmel_pio4.h | 3
Bring in required device tree file and bindings from Linux.
Signed-off-by: Wenyou Yang
Reviewed-by: Andreas Bießmann
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- add detailed example to show how to configure pinctrl for device.
- remove interrupt and gpio property description.
Rework the driver to support driver model and device tree, and
support to regard the pio4 pinctrl device as a child of
atmel_pio4 device.
Signed-off-by: Wenyou Yang
---
Changes in v4:
- Remove the redundant log print.
Changes in v3:
- Add bind callback to support the pinctl device regarding a
Since CONFIG_ATMEL_PIO4 options is added to Kconfig, to avoid
compilation warnings when the option is enabled,
add #ifndef CONFIG_DM_GPIO before #define CONFIG_ATMEL_PIO4
to avoid compilation warnings.
Signed-off-by: Wenyou Yang
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- integ
Add driver model support while retaining the existing legacy code.
This allows the driver to support boards that have converted to
driver model as well as those that have not.
Signed-off-by: Wenyou Yang
---
Changes in v3:
- Remove redundant log print.
Changes in v2:
- Add clock support.
dri
Convert the driver to the driver model while retaining the existing
legacy code. This allows the driver to support boards that have
converted to driver model as well as those that have not.
Signed-off-by: Wenyou Yang
---
Changes in v3:
- Remove the redundant log print.
Changes in v2:
- Add cl
Add support for loading splash image from NAND Flash formatted with a (UBI)
filesystem.
Signed-off-by: Eran Matityahu
Cc: Heiko Schocher
Cc: Igor Grinberg
Cc: Tom Rini
Cc: Nikita Kiryanov
Cc: Stefano Babic
---
Changes for v3:
Removed unrelated cleanup changes (the license identifier
On 6 June 2016 at 23:21, Ladislav Michl wrote:
> On Mon, Jun 06, 2016 at 08:50:55PM +0200, Michal Suchanek wrote:
>> On 6 June 2016 at 09:48, Ladislav Michl wrote:
> [snip]
>> > Okay, specifing size in therms of eraseblock would solve my problem
>> > and I have to admit I'm not aware such a thing
From: Yuan Yao
QSPI module output SCLK divisor value is configured through SCFG.
Signed-off-by: Yuan Yao
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 +
board/freescale/ls2080aqds/ls2080aqds.c| 5 +
2 files changed, 6 insertions(+)
diff --git a/arch/arm/i
From: Yuan Yao
This patch adds QSPI boot support for LS2080AQDS board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then we can switch to booting from QSPI memory space.
Yuan Yao (10):
drivers: i2c: mxc: Add early init
armv8: ls2080aqds: Select QSPI CLK div via SCFG
From: Yuan Yao
Add early i2c init function with conservative divider when the exact
clock rate is not available.
Signed-off-by: Yuan Yao
---
drivers/i2c/i2c_core.c | 5 +
drivers/i2c/mxc_i2c.c | 27 +++
include/i2c.h | 3 +++
3 files changed, 35 insertio
From: Yuan Yao
The NOR flash related configure options also appear in ls2080aqds.h and
ls2080ardb.h, and the two files all have included ls2080a_common.h.
This patch remove the duplicated options in ls2080a_common.h.
Signed-off-by: Yuan Yao
---
include/configs/ls2080a_common.h | 7 ---
inc
From: Yuan Yao
Enable QSPI flash related configure options.
Signed-off-by: Yuan Yao
---
include/configs/ls2080aqds.h | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index a14b465..c0c2a97 100644
---
From: Yuan Yao
When QSPI is enabled, NOR flash and QIXIS can't be accessed through IFC
due to pin mux.
Signed-off-by: Yuan Yao
---
include/configs/ls2080aqds.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 4b27
From: Yuan Yao
Add QSPI controller and slave dts node for LS2080AQDS board.
Signed-off-by: Yuan Yao
---
arch/arm/dts/fsl-ls2080a-qds.dts | 14 ++
arch/arm/dts/fsl-ls2080a.dtsi| 10 ++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/dts/fsl-ls2080a-qds.dts b/arc
From: Yuan Yao
The Freescale QSPI driver has been converted to Driver Model.
This patch enable FSL_QSPI and its dependence options, DM, DM_SPI,
OF_CONTROL and so on.
Signed-off-by: Yuan Yao
---
configs/ls2080aqds_nand_defconfig | 8
1 file changed, 8 insertions(+)
diff --git a/config
From: Yuan Yao
In order to access QSPI flash we must asserted ISO allowing
the DUT to access the full IFC domain.
But deasserted the unused ISO will allowing maximum performance.
Signed-off-by: Yuan Yao
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 2 ++
board/freescale/ls2080aq
From: Yuan Yao
Freescale QSPI and DSPI driver have been converted to Driver Mode.
This converting bring dtb file for u-boot and this increase the size
of u-boot image.
LS2080A nand boot use SPL framework.
This patch increase the size of image load from NAND to RAM in SPL.
Signed-off-by: Yuan Yao
On 31/05/16 17:55, Andrew Shadura wrote:
> On 31/05/16 17:35, Stefano Babic wrote:
>> > But this generates a warning:
>> >
>> > w+board/ge/bx50v3/bx50v3.c:324:12: warning: 'detect_baseboard' defined
>> > but not used [-Wunused-function]
>> >
>> > Why do you export it if you do not need it ? It is
From: Yuan Yao
This patch adds QSPI boot support for LS2080AQDS board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then we can switch to booting from QSPI memory space.
Signed-off-by: Yuan Yao
---
Changed in v3:
1, Rebase to lastest code.
2, Give up to c
On 07/06/2016 10:27, Andrew Shadura wrote:
> On 31/05/16 17:55, Andrew Shadura wrote:
>> On 31/05/16 17:35, Stefano Babic wrote:
But this generates a warning:
w+board/ge/bx50v3/bx50v3.c:324:12: warning: 'detect_baseboard' defined
but not used [-Wunused-function]
Why do
Implements the logic to calculate the optimal usb maximum trasfer blocks
instead of sending USB_MAX_XFER_BLK blocks which is 65535 and 20 in case
of EHCI and other USB protocols respectively.
It defines USB_MIN_XFER_BLK/USB_MAX_XFER_BLK trasfer blocks that should
be checked for success starting fr
Hi,
On Tue, Jun 7, 2016 at 2:09 PM, vinoth eswaran wrote:
> Hello Mr.Bin,
>
Please keep the ML in the loop, also avoid top-posting, and always use
plain text.
> I have attached the start up logs for your reference, I have added some
> debug messages also and I have disabled the SDIO (0f15) by
Hi York,
Thanks for your suggestions, and I moved the code into timer_init() and sent v4
.
Best Regards,
Yunhui
> -Original Message-
> From: York Sun [mailto:york@nxp.com]
> Sent: Tuesday, May 17, 2016 11:44 PM
> To: Yunhui Cui; Yunhui Cui
> Cc: u-boot@lists.denx.de; Prabhakar Kushw
On Tue, 7 Jun 2016 10:54:23 +0800
Chen-Yu Tsai wrote:
Hi Chen-Yu,
> Hi everyone,
>
> This series rewrites the Allwinner/sunxi PSCI implementation in C, to make
> it easier to maintain and extend for the currently unsupported multi-cluster
> SoCs. The SMP code in the BSP kernels are in C. Having
Hi,
On 07-06-16 11:49, Marc Zyngier wrote:
On Tue, 7 Jun 2016 10:54:23 +0800
Chen-Yu Tsai wrote:
Hi Chen-Yu,
Hi everyone,
This series rewrites the Allwinner/sunxi PSCI implementation in C, to make
it easier to maintain and extend for the currently unsupported multi-cluster
SoCs. The SMP cod
Hai
In arch/powerpc/cpu/ppc4xx/start.s
Actually in start.s file not calling Board_early_init_f()(ocotea.c) file we
are not calling only we are calling Board_init_f(),how it will pass the
control to ocotea.c file, i am not understanding sir
--
Thanks & Regards,
RamaChandra PC
+918892147159.
__
This adds support for IS1 board. Pretty usual socfpga board,
256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two
additional ethernet ports connected to the FPGA.
Signed-off-by: Pavel Machek
---
v2: add diffstat
v3: fixes from review, add empty socfpga.c to make build system
Hi Benoît,
Thank you for your review.
I wanted to wait for Scott's patchseries to make it into master to
allow for potential needed
changes.
2016-05-31 22:21 GMT+02:00 Benoît Thébaudeau :
...
>> Extend this by allowing for a second parameter specifying the byte offset
>> to the last block to be
Allwinner devices support SPI flash as one of the possible
bootable media type. The SPI flash chip needs to be connected
to SPI0 pins (port C) to make this work. More information is
available at:
https://linux-sunxi.org/Bootable_SPI_flash
This patch adds the initial support for booting from S
follow parameter name change (nand to mtd) to fix compiler error.
Signed-off-by: Max Krummenacher
---
Changes in v2:
- Patch v1 1/1 went into master, but Scott's patch series syncing
with kernel v4.6 introduced an additional compile time error.
drivers/mtd/nand/nand_util.c | 2 +-
1 file ch
nand torture currently works on exactly one nand block which is specified
by giving the byteoffset to the beginning of the block.
Extend this by allowing for a second parameter specifying the byte size
to be tested.
e.g.
==> nand torture 100
NAND torture: device 0 offset 0x100 size 0x200
This code auto-detects the best-match FDT file name, but it should
respect the user's choice if "fdt_file" environment is found in a
saved set of environments.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/board_late_init.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch
Because setenv() may fail, it is better to check its return code.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/board_late_init.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/mach-uniphier/board_late_init.c
b/arch/arm/mach-uniphier/board_late_init
I noticed secondary CPUs sometimes fail to wake up, and the root
cause seems that the "sev" instruction is sent before the preceding
register write access is observed by the secondary CPUs.
The read-back of the accessed register cannot guarantee the order.
This commit uses "dsb sy" barrier to ensu
Unlike NAND, eMMC can be re-written without erasing.
Signed-off-by: Masahiro Yamada
---
include/configs/uniphier.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 10fd8c2..7d8a206 100644
--- a/include/configs/uniphier.h
+++ b/incl
Masahiro Yamada (5):
ARM: uniphier: check return code of setenv()
ARM: uniphier: do not overwrite fdt_file environment
ARM: uniphier: do not overwrite bootmode environment
ARM: uniphier: do not erase when updating U-Boot image in eMMC device
ARM: uniphier: insert dsb barrier to ensure
This code auto-detects the boot mode, but it should respect the
user's choice if "bootmode" environment is found in a saved set
of environments.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/board_late_init.c | 23 ++-
1 file changed, 18 insertions(+), 5 deletion
On Tue, Jun 07, 2016 at 09:43:20AM +0200, Michal Suchanek wrote:
> On 6 June 2016 at 23:21, Ladislav Michl wrote:
> > On Mon, Jun 06, 2016 at 08:50:55PM +0200, Michal Suchanek wrote:
> > Linux already depends on U-Boot as U-Boot feeds Linux with MTD partitions.
>
> No. It depends on getting the p
Remove Soc specific defines and use generic chasis specific defines
for USB controller base address mapping.
Signed-off-by: Rajesh Bhagat
---
Changes in v2:
- Rebased patch for latest u-boot
.../include/asm/arch-fsl-layerscape/immap_lsch2.h |6 +++---
.../include/asm/arch-fsl-layerscape/i
Hello Siarhei!
Am 06.06.2016 um 11:20 schrieb Siarhei Siamashka:
On Sun, 5 Jun 2016 15:01:30 +0200
Bernhard Nortmann wrote:
Hi Siarhei!
[...]
No, you're right and not missing anything. Setting ${filesize} alone
doesn't achieve much, and would require further customization to do the
actual i
On Mon, Jun 6, 2016 at 4:17 AM, Stefano Babic wrote:
> Sometimes the MII is not used at all - for example,
> when the controller is connected to a switch with
> a fixed speed, and the MDC/MDIO signal are used
> for something else.
>
> Allow to set a fixed speed in the FEC driver
> without relying
On Mon, Jun 6, 2016 at 8:11 AM, Guillaume GARDET
wrote:
> Signed-off-by: Guillaume GARDET
> Cc: joe.hershber...@ni.com
Acked-by: Joe Hershberger
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Define CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8 to allow the
physical interface to be 8-bit (rather than 16-bit).
Signed-off-by: Steve Rae
---
from [1] (line ~124)
/* The Kona PHY supports an 8-bit wide UTMI interface */
[...snip...]
module_platform_driver(bcm_kona_usb2_driver);
The Kona PHY supports an 8-bit wide UTMI interface,
therefore, choose this Kconfig setting.
Signed-off-by: Steve Rae
---
from [1] (line ~124)
/* The Kona PHY supports an 8-bit wide UTMI interface */
[...snip...]
module_platform_driver(bcm_kona_usb2_driver);
MODULE_ALIAS("platfo
On 06/07/2016 02:28 AM, Yunhui Cui wrote:
> From: Yunhui Cui
>
> The SP805-WDT module on LS2080A and LS2085A, requires configuration
> of PMU's PCTBENR register to enable watchdog counter decrement and
> reset signal generation. In order not to affect the sp805wdt driver
> frame, we enable the wa
On 06/06/2016 14:26, Michael Heimpold wrote:
> Both comments look like being copy & paste errors.
>
> Signed-off-by: Michael Heimpold
> Cc: Peng Fan
> Cc: Stefano Babic
> ---
> arch/arm/cpu/arm926ejs/mxs/mxs.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/a
Hi Tom,
please pull from u-boot-imx, thanks !
The following changes since commit d7d000311285e4b8d11e089ca13ea456a01be3b8:
Merge branch 'master' of git://git.denx.de/u-boot-mips (2016-05-23
11:51:37 -0400)
are available in the git repository at:
git://www.denx.de/git/u-boot-imx.git master
Hello,
On Tue, 7 Jun 2016 16:09:58 +0200
Bernhard Nortmann wrote:
> Hello Siarhei!
>
> Am 06.06.2016 um 11:20 schrieb Siarhei Siamashka:
> > On Sun, 5 Jun 2016 15:01:30 +0200
> > Bernhard Nortmann wrote:
> >
> >> Hi Siarhei!
> >>
> >> [...]
> >>
> >> No, you're right and not missing anything
On 06/07/2016 01:26 AM, Yuan Yao wrote:
> From: Yuan Yao
>
> When QSPI is enabled, NOR flash and QIXIS can't be accessed through IFC
> due to pin mux.
>
> Signed-off-by: Yuan Yao
> ---
> include/configs/ls2080aqds.h | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/include/
While retaining the storage abstraction feature implemented in U-Boot,
this series updates the fastboot sparse image handling by
(1) fixing broken code,
(2) resync'ing with the upstream code, and
(3) improving performance when writing CHUNK_TYPE_FILL
Changes in v2:
- series rebased onto v2016.07-r
This "session-id" alogrithm is not required, and currently corrupts
the stored image whenever more the one "session" is required.
Signed-off-by: Steve Rae
---
for more information, see the thread starting at [1]
[1] http://lists.denx.de/pipermail/u-boot/2016-April/251889.html
Changes in v2:
- se
This file originally came from upstream code.
While retaining the storage abstraction feature, this is the first
set of the changes required to resync with the
cmd_flash_mmc_sparse_img()
in the file
aboot.c
from
https://us.codeaurora.org/cgit/quic/la/kernel/lk/plain/app/aboot/aboot.c?h=LE.B
- update fastboot_okay() and fastboot_fail()
This file originally came from upstream code.
While retaining the storage abstraction feature, this is the second
set of the changes required to resync with the
cmd_flash_mmc_sparse_img()
in the file
aboot.c
from
https://us.codeaurora.org/cgit/q
In order to process the CHUNK_TYPE_DONT_CARE properly, there is
a requirement to be able to 'reserve' a specified number of blocks
in the storage media. Because of the special handling of "bad blocks"
in NAND devices, this is implemented in a storage abstraction function.
Signed-off-by: Steve Rae
- increase the size of the fill buffer
- testing has shown a 10x improvement when the sparse image
has large CHUNK_TYPE_FILL chunks
Signed-off-by: Steve Rae
---
Changes in v2: None
common/image-sparse.c | 37 +++--
1 file changed, 27 insertions(+), 10 deletion
On Tue, 7 Jun 2016, Steve Rae wrote:
Quick question before diving in -- does anybody work on making
fastboot able to flash multiple devices?
There are some braindead designs (e.g. Variscite SOMs) that have both
eMMC and NAND on board and only able to boot off of NAND. Android
FS layout uses insa
On Tue, Jun 7, 2016 at 11:36 AM, Sergey Kubushyn wrote:
> On Tue, 7 Jun 2016, Steve Rae wrote:
>
> Quick question before diving in -- does anybody work on making
> fastboot able to flash multiple devices?
>
> There are some braindead designs (e.g. Variscite SOMs) that have both
> eMMC and NAND on
An accumulated length was incorrectly added to current each pass
through the loop. On system with more than 2 cores this caused a
corrupt MADT to be generated.
Signed-off-by: George McCollister
---
arch/x86/lib/acpi_table.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff
Short help (description) in bootefi command has a trailing "\n" that
breaks the "help" command output (empty line after "bootefi").
Nothing important, doesn't affect anything but better be fixed in the
upcoming release.
Still working on i.MX6 and their siblings NAND U-Boot update -- it
works he
Tom,
On Tue, Jun 7, 2016 at 11:19 AM, Steve Rae wrote:
> While retaining the storage abstraction feature implemented in U-Boot,
> this series updates the fastboot sparse image handling by
> (1) fixing broken code,
> (2) resync'ing with the upstream code, and
> (3) improving performance when writi
Carlos, Tom,
On Sat, 4 Jun 2016 14:39:22 -0300 (BRT), Carlos Santos wrote:
> > So, why? I don't like the idea of making FIT support in mkimage
> > conditional.
>
> If FIT is not to be conditional then what's the purpose of the
> CONFIG_FIT_SIGNATURE configuration option? Looks like it exists
Somehow this got overlooked when getting rid of nand_info.
Small patch, won't affect anything else, no reason to wait for the
next cycle.
Signed-off-by: Sergey Kubushyn
---
diff --git a/common/fb_nand.c b/common/fb_nand.c
index e55ea38..ae34f48 100644
--- a/common/fb_nand.c
+++ b/common/fb_nand
On 06/07/2016 05:57 PM, Steve Rae wrote:
> The Kona PHY supports an 8-bit wide UTMI interface,
> therefore, choose this Kconfig setting.
>
> Signed-off-by: Steve Rae
Shouldn't the tags in this patch be ARM: bcm: ? They certainly shouldn't
be USB: DWC2 as this affects the BCM platforms.
Otherwis
On Tue, Jun 7, 2016 at 3:24 PM, Marek Vasut wrote:
> On 06/07/2016 05:57 PM, Steve Rae wrote:
>> The Kona PHY supports an 8-bit wide UTMI interface,
>> therefore, choose this Kconfig setting.
>>
>> Signed-off-by: Steve Rae
>
> Shouldn't the tags in this patch be ARM: bcm: ? They certainly shouldn
Define CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8 to allow the
physical interface to be 8-bit (rather than 16-bit).
Signed-off-by: Steve Rae
---
from [1] (line ~124)
/* The Kona PHY supports an 8-bit wide UTMI interface */
[...snip...]
module_platform_driver(bcm_kona_usb2_driver);
The Kona PHY supports an 8-bit wide UTMI interface,
therefore, choose this Kconfig setting.
Signed-off-by: Steve Rae
---
from [1] (line ~124)
/* The Kona PHY supports an 8-bit wide UTMI interface */
[...snip...]
module_platform_driver(bcm_kona_usb2_driver);
MODULE_ALIAS("platfo
On 06/08/2016 12:35 AM, Steve Rae wrote:
> Define CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8 to allow the
> physical interface to be 8-bit (rather than 16-bit).
>
> Signed-off-by: Steve Rae
Applied both, thanks.
> ---
> from [1] (line ~124)
>
> /* The Kona PHY supports an 8-bit wide UTMI i
> From: "Thomas Petazzoni"
> To: "Carlos Santos"
> Cc: "Tom Rini" , u-boot@lists.denx.de
> Sent: Tuesday, June 7, 2016 5:37:46 PM
> Subject: Re: [U-Boot] [PATCH v2] Make FIT support really optional
> Carlos, Tom,
>
> On Sat, 4 Jun 2016 14:39:22 -0300 (BRT), Carlos Santos wrote:
>
>> > So, why?
On 06/04/2016 11:40 PM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang
>
> The FSL Primary Protected Application (PPA) is a software component
> loaded during boot which runs in TrustZone and remains resident
> after boot.
>
> Signed-off-by: Hou Zhiqiang
> ---
> V5:
> - Added API sec_firmware_init()
On 06/04/2016 11:40 PM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang
>
> If the PSCI and PPA is ready, skip the fixup for spin-table and
> waking secondary cores. If not, change SMP method to spin-table,
> and the device node of PSCI will be removed.
>
> Signed-off-by: Hou Zhiqiang
> ---
> V5:
> -
On 06/04/2016 11:40 PM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang
>
> If the PSCI and PPA is ready, skip the fixup for spin-table and
> waking secondary cores. If not, change SMP method to spin-table,
> and the device node of PSCI will be removed.
>
> Signed-off-by: Hou Zhiqiang
> ---
> V5:
> -
I wonder is there any clarity wrt CONFIG_HUSH_PARSER vs
CONFIG_SYS_HUSH_PARSER?
That stupid definition seems to be constantly oscillating between those
two definitions from release to release so one is left with missing
scripting every time new version is released...
I'm putting both definition
On 06/07/2016 12:37 PM, Pavel Machek wrote:
>
> This adds support for IS1 board. Pretty usual socfpga board,
> 256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two
> additional ethernet ports connected to the FPGA.
>
> Signed-off-by: Pavel Machek
>
[...]
Applied, thanks.
--
Hi Stefano,
On Mon, Jun 6, 2016 at 6:49 AM, Stefano Babic wrote:
> diff --git a/board/phytec/pcm058/README b/board/phytec/pcm058/README
> new file mode 100644
> index 000..90e2818
> --- /dev/null
> +++ b/board/phytec/pcm058/README
> @@ -0,0 +1,9 @@
> +Building U-Boot for phytec-mira
> +-
On Tue, Jun 7, 2016 at 10:11 PM, Sergey Kubushyn wrote:
> I wonder is there any clarity wrt CONFIG_HUSH_PARSER vs
> CONFIG_SYS_HUSH_PARSER?
>
> That stupid definition seems to be constantly oscillating between those
> two definitions from release to release so one is left with missing
> scripting
On 06/07/2016 11:57 PM, York Sun wrote:
> On 06/07/2016 02:28 AM, Yunhui Cui wrote:
> > From: Yunhui Cui
> >
> > The SP805-WDT module on LS2080A and LS2085A, requires configuration of
> > PMU's PCTBENR register to enable watchdog counter decrement and reset
> > signal generation. In order not to a
On 7 June 2016 at 12:40, George McCollister
wrote:
>
> An accumulated length was incorrectly added to current each pass
> through the loop. On system with more than 2 cores this caused a
> corrupt MADT to be generated.
>
> Signed-off-by: George McCollister
> ---
> arch/x86/lib/acpi_table.c | 12
Hi Stephen,
On 23 May 2016 at 10:47, Stephen Warren wrote:
> From: Stephen Warren
>
> The following changes are made to the clock API:
> * The concept of "clocks" and "peripheral clocks" are unified; each clock
> provider now implements a single set of clocks. This provides a simpler
> conce
Hi Marek,
On 25 May 2016 at 05:26, Marek Vasut wrote:
> On 05/25/2016 05:29 AM, Simon Glass wrote:
>> Hi Marek,
>>
>> On 24 May 2016 at 18:15, Marek Vasut wrote:
>>> Both SYS_MALLOC_F and SPL_SYS_MALLOC_SIMPLE are generic config options,
>>> drop them from the rockchip-specific Kconfig file.
>>>
On 21 May 2016 at 03:05, Angelo Dureghello wrote:
> Some architectures as m68k still need to use CONFIG_NEEDS_MANUAL_RELOC,
> and are not still using the device tree.
>
> Signed-off-by: Angelo Dureghello
> ---
> drivers/core/root.c | 15 +++
> 1 file changed, 15 insertions(+)
Acked-
On 17 May 2016 at 14:56, Simon Glass wrote:
> Hi Stephen,
>
> On 17 May 2016 at 10:46, Stephen Warren wrote:
>> From: Stephen Warren
>>
>> This adds a sandbox reset implementation (provider), a test client
>> device, instantiates them both from Sandbox's DT, and adds a DM test
>> that excercises
Hi Stephen,
On 2 June 2016 at 09:59, Stephen Warren wrote:
> On 05/18/2016 10:54 AM, Stephen Warren wrote:
>>
>> On 05/17/2016 03:56 PM, Simon Glass wrote:
>>>
>>> Hi Stephen,
>>>
>>> On 17 May 2016 at 10:46, Stephen Warren wrote:
From: Stephen Warren
A reset controller is a
Hi Robert,
On 23 May 2016 at 02:40, Robert P. J. Day wrote:
> A number of style fixes across the files in this directory, including:
>
> * Correct invalid kernel-doc content.
> * Tidy up massive comment in fdt_region.c.
> * Use correct spelling of "U-Boot".
> * Replace tests of "! " with "!".
On 23 May 2016 at 02:15, Peng Fan wrote:
> Hi Mario,
>
> On Mon, May 23, 2016 at 09:54:56AM +0200, Mario Six wrote:
>>A bug in the pca953x driver prevents correct reading of GPIO input
>>values beyond the 8th GPIO; all values are reported as zero. Setting of
>>GPIO output values is not affected.
>
The Slot.poll() method is already complicated and a new feature
we are going to add will make it more difficult to understand
the execution flow.
Refactor it with helper methods, .handle_error(), .do_defconfig(),
.do_autoconf(), .do_savedefconfig, and .update_defconfig().
Signed-off-by: Masahiro
Hi Joe.
2016-06-02 12:30 GMT+09:00 Joe Hershberger :
> Make the processing of a slot more linear code compared to how it
> executes.
>
> Signed-off-by: Joe Hershberger
>
This patch moves "make defconfig"
from the .add() method to the .poll() method,
but it did not update the comment block.
So,
On Wed, Jun 8, 2016 at 2:40 AM, George McCollister
wrote:
> An accumulated length was incorrectly added to current each pass
> through the loop. On system with more than 2 cores this caused a
> corrupt MADT to be generated.
>
> Signed-off-by: George McCollister
> ---
> arch/x86/lib/acpi_table.c
SPL is expected to load and run U-Boot. This needs to work with sandbox also.
Provide a function to locate the U-Boot image, and another to start it. This
allows SPL to function on sandbox as it does on other archs.
Signed-off-by: Simon Glass
---
arch/sandbox/cpu/os.c | 51 +
Sandbox includes this code to provide build coverage. While we retain this
feature we should have sandbox build it. Sandbox does not in fact use the
I2C compatibility mode. Showing a warning for sandbox is just confusing,
since no conversion is expected.
Drop the warning for sandbox.
Signed-off-b
This file does not appear to use I2C, so drop this include.
Signed-off-by: Simon Glass
---
common/spl/spl.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/common/spl/spl.c b/common/spl/spl.c
index c8dfc14..e931edd 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -13,7 +13,6 @@
#incl
Overriding the final link rule is possible with U-Boot proper. It us used to
create a sandbox image links with host libraries. To build a sandbox SPL
image we need the same feature for SPL.
To support this, update the SPL link rule so sandbox can override it.
Signed-off-by: Simon Glass
---
scr
This option is now widely available, so remove the comment that it is only
available on ARM and sandbox.
Signed-off-by: Simon Glass
---
README | 3 ---
1 file changed, 3 deletions(-)
diff --git a/README b/README
index 1d0b946..c3dcfbd 100644
--- a/README
+++ b/README
@@ -3852,9 +3852,6 @@ Conf
SPL does not have a command interface so we should not include the main loop
code.
Signed-off-by: Simon Glass
---
arch/sandbox/cpu/start.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c
index 969618e..6e4ec01 100644
--- a/arch/sandbox/c
When building an SPL image, override the link flags so that it uses the
system libraries. This is similar to the way the non-SPL image is built.
Signed-off-by: Simon Glass
---
arch/sandbox/config.mk | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/sandbox/config.mk b/arch/sandbox/c
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