On Sat, 31 Jan 2015 22:49:39 +0100, Albert ARIBAUD
wrote:
> Signed-off-by: Albert ARIBAUD
> ---
> arch/arm/include/asm/arch-orion5x/cpu.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/include/asm/arch-orion5x/cpu.h
> b/arch/arm/include/asm/arch-orion5x/cpu.
On Sat, 31 Jan 2015 11:52:38 +0100, Albert ARIBAUD
wrote:
> Signed-off-by: Albert ARIBAUD
> ---
> board/LaCie/edminiv2/config.mk | 12
> include/configs/edminiv2.h | 4
> 2 files changed, 4 insertions(+), 12 deletions(-)
> delete mode 100644 board/LaCie/edminiv2/config.m
On Sat, 31 Jan 2015 22:55:38 +0100, Albert ARIBAUD
wrote:
> ED Mini V2 is based on Orion 5x which boots at fixed
> address 0x in NOR Flash. Place SPL there, and
> switch U-Boot from .bin to .img format, stored in
> NOR Flash at 0xFFF9.
>
> Note: this patch was tested on HW and works,
On Sun, 1 Feb 2015 12:08:06 +0100, Albert ARIBAUD
wrote:
> Nowadays generic CFI code properly detects the ED Mini V2's
> Macronix MX29LV400CB flash chip, therefore we can drop the
> CONFIG_FLASH_CFI_LEGACY option and associated settings and code.
>
> Signed-off-by: Albert ARIBAUD
> ---
>
> Ch
>On 13:27-20150220, Akshay Saraswat wrote:
>> This patch adds workaround for ARM errata 798870 which says
>> "If back-to-back speculative cache line fills (fill A and fill B) are
>> issued from the L1 data cache of a CPU to the L2 cache, the second
>> request (fill B) is then cancelled, and the sec
Hi Marek,
> On Tuesday, February 24, 2015 at 02:21:40 PM, Kishon Vijay Abraham I
> wrote:
> > Hi,
> >
> > On Monday 23 February 2015 08:29 PM, Marek Vasut wrote:
> > > On Monday, February 23, 2015 at 07:19:03 AM, Kishon Vijay Abraham
> > > I wrote:
> > >> Hi,
> > >>
> > >> On Monday 16 February
Hi Simon,
On Thu, Feb 19, 2015 at 5:10 AM, Simon Glass wrote:
> These are missing a size value. Add one in each case.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/sandbox/dts/sandbox.dts | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/sandbox/dts/sandbox.dts b
Hi Nishanth,
>On 17:13-20150224, Nishanth Menon wrote:
>> On 13:27-20150220, Akshay Saraswat wrote:
>> > This patch adds workaround for ARM errata 798870 which says
>> > "If back-to-back speculative cache line fills (fill A and fill B) are
>> > issued from the L1 data cache of a CPU to the L2 cach
On Thu, Feb 19, 2015 at 5:10 AM, Simon Glass wrote:
> These functions currently use a generic name, but they are for x86 only.
> This may introduce confusion and prevents U-Boot from using these names
> more widely.
>
> In fact it should be possible to remove these at some point and use
> generic
Hi Simon,
On Thu, Feb 19, 2015 at 5:10 AM, Simon Glass wrote:
> At present we do more in this function than we should. Create a new
> x86_post_cpu_init() which can be called from the board file when needed
> (e.g. in board_early_init_f(). This allows us to use driver model for
> our x86_post_cpu_
Secure Boot Target is added for NAND for P5020 and P5040.
The Secure boot target has already been added for P3041 by
enabling CONFIG_SYS_RAMBOOT and configuring CPC as SRAM.
The targets for P5020 and P5040 are added in the same manner.
Signed-off-by: Ruchika Gupta
Signed-off-by: Aneesh Bansal
-
Secure Boot Target is added for NAND for P3041.
Changes:
In PowerPC, the core begins execution from address 0xFFFC.
In case of secure boot, this default address maps to Boot ROM.
The Boot ROM code requires that the bootloader(U-boot) must lie
in 0 to 3.5G address space i.e. 0x0 - 0xDFFF.
I
Hi Marek,
> On Tuesday, February 24, 2015 at 05:05:29 PM, Lukasz Majewski wrote:
> > Hi Lukasz,
>
> Hi Lukasz,
>
> is your other self doing good too ? ;-)
>
> > > Hi Marek
> > >
> > > > This patch implement _weak function for board_usb_cleanup.
> > > > This function (usb_board_cleanup) impleme
Hi Simon,
On Thu, Feb 19, 2015 at 5:10 AM, Simon Glass wrote:
> This function returns -ENOENT when the property is missing (which the caller
> might forgive) and also when the property is present but incorrectly
forgive? forget?
> formatted (which many callers would like to report).
>
> Update
Hi, Matt.
You're right, it's wrong masking.
Acked-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
On 02/24/2015 06:52 AM, Matt Reimer wrote:
> Properly mask SELBASECLK by using an actual mask rather than the
> number of bits to shift in order to create the mask.
>
> Signed-off-by: Matt Reimer
Hi, Rob,
On Tue, 24 Feb 2015 10:20:13 -0600
Rob Herring wrote:
> On Mon, Jan 19, 2015 at 1:07 AM, Inha Song wrote:
> > This patch invoke board-specific USB cleanup (board_usb_cleanup)
> > interface.
> >
> > Signed-off-by: Inha Song
> > ---
> > common/cmd_dfu.c | 1 +
> > common/
GD_RELOCADDR, GD_RELOC_OFF & GD_START_ADDR_SP are generic members of
global data structure so why don't we allow architectures other than ARM
to use it.
Signed-off-by: Alexey Brodkin
Cc: Simon Glass
Cc: Tom Rini
---
lib/asm-offsets.c | 4
1 file changed, 4 deletions(-)
diff --git a/lib/a
Le mardi 24 février 2015 à 16:57 -0600, Nishanth Menon a écrit :
> This is in preperation of using generic cross OMAP code.
I found it a bit confusing at first, since as far as I could see, this
series does not introduce any cross-omap header (omap_smc1's prototype
is being defined and duplicated
Hi Simon,
I'm currently reworking start-up code for ARC with intention to leave as
little of assembly code as possible. On that way I decided to use the
same approach as x86 does.
In particular I mean:
* Use of sequence "copy_uboot_to_ram", "clear_bss" &
"do_elf_reloc_fixups".
* Use of "board
Le mardi 24 février 2015 à 16:57 -0600, Nishanth Menon a écrit :
> omap_smc1 is now generic enough to remove duplicate
> omap3_gp_romcode_call logic that omap3 introduced.
As far as I could see, this did not introduce any regression on my
omap3630 device (omap_smc1 is used from omap3_invalidate_l2
Le mardi 24 février 2015 à 16:57 -0600, Nishanth Menon a écrit :
> 430973: Stale prediction on replaced inter working branch causes
> Cortex-A8 to execute in the wrong ARM/Thumb state
> Impacts: Everything lower than r2p1
> Work around: Set IBE to 1
According to the Linux kernel source, this
Le mardi 24 février 2015 à 16:57 -0600, Nishanth Menon a écrit :
> Enable the OMAP3 specific errata code for 454179, 430973, 621766
> and while at it, remove legacy non-revision checked errata logic.
>
> Signed-off-by: Nishanth Menon
> ---
> arch/arm/cpu/armv7/omap3/board.c | 16 -
Freescale sfp has been used for mpc8xxx. It will be used
for ARM-based SoC as well. This patch moves the CCSR defintion of
sfp_regs to common include.
This patch also defines ccsr_sfp_regs definition for newer
versions of SFP.
Signed-off-by: Ruchika Gupta
Signed-off-by: Gaurav
The Security Monitor is the SOC’s central reporting point for
security-relevant events such as the success or failure of boot
software validation and the detection of potential security compromises.
The API's for transition of Security states have been added
which will be used in case of SECURE BO
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 02/25/15 13:19, Paul Kocialkowski wrote:
> Le mardi 24 février 2015 à 16:57 -0600, Nishanth Menon a écrit :
>> Enable the OMAP3 specific errata code for 454179, 430973, 621766
>> and while at it, remove legacy non-revision checked errata logic.
>>
>
esbc_validate command uses various IP Blocks: Security Monitor, CAAM block
and SFP registers. Hence the respective CONFIG's are enabled.
Apart from these CONFIG_SHA_PROG_HW_ACCEL and CONFIG_RSA are also enabled.
Signed-off-by: Gaurav Rana
---
Changes in v2:
Merge patches of enablement for powerp
1. esbc_validate command is meant for validating header and
signature of images (Boot Script and ESBC uboot client).
SHA-256 and RSA operations are performed using SEC block in HW.
This command works on both PBL based and Non PBL based Freescale
platforms.
Comm
Hi,
as explained here http://community.arm.com/message/25127, it is possible to
boot the raspberry 2 in secure mode, by adding the kernel_old=1 option in
config.txt. The main effects of this option are:
- all 4 cores start executing in secure SVC mode instead of non-secure SVC
mode
- all 4 cores st
Hi Scott,
On Tue, 24 Feb 2015 18:17:59 -0600
Scott Wood wrote:
> On Tue, 2015-02-24 at 16:20 +0900, Masahiro Yamada wrote:
> > Hi Scott,
> >
> >
> > On Mon, 23 Feb 2015 19:22:51 -0600
> > Scott Wood wrote:
> >
> > > On Fri, 2015-02-20 at 14:24 +0900, Masahiro Yamada wrote:
> > > > When Kcon
Le mercredi 25 février 2015 à 13:31 +0200, Igor Grinberg a écrit :
> On 02/25/15 13:19, Paul Kocialkowski wrote:
> > Le mardi 24 février 2015 à 16:57 -0600, Nishanth Menon a écrit :
> >> Enable the OMAP3 specific errata code for 454179, 430973, 621766
> >> and while at it, remove legacy non-revisio
On Wednesday, February 25, 2015 at 12:10:33 AM, Eric Nelson wrote:
> Hi Fabio,
>
> On 02/24/2015 03:25 PM, Fabio Estevam wrote:
> > On Tue, Feb 24, 2015 at 7:22 PM, Fabio Estevam wrote:
> >> Hi,
> >>
> >> I am trying to get USB Mass Storage to work on mx6slevk, but I am
> >> getting the followin
Add EXT2/EXT4 and BOUNCE_BUFFER support.
Signed-off-by: Fabio Estevam
---
include/configs/warp.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/configs/warp.h b/include/configs/warp.h
index cfc2323..8379cec 100644
--- a/include/configs/warp.h
+++ b/include/configs/warp.h
@@ -46,
On Wednesday, February 25, 2015 at 09:17:53 AM, Lukasz Majewski wrote:
> Hi Marek,
>
> > On Tuesday, February 24, 2015 at 02:21:40 PM, Kishon Vijay Abraham I
> >
> > wrote:
> > > Hi,
> > >
> > > On Monday 23 February 2015 08:29 PM, Marek Vasut wrote:
> > > > On Monday, February 23, 2015 at 07:19
On Tuesday, February 24, 2015 at 11:29:39 PM, Lukasz Majewski wrote:
> On Tue, 24 Feb 2015 18:56:59 +0100
>
> Marek Vasut wrote:
> > On Monday, February 23, 2015 at 10:06:08 AM, Lukasz Majewski wrote:
> > > Dear Marek,
> >
> > Hi!
> >
> > > The following changes since commit
> > >
> > > d3d087
On Wednesday, February 25, 2015 at 03:23:13 AM, Fabio Estevam wrote:
> On Tue, Feb 24, 2015 at 8:19 PM, Fabio Estevam wrote:
> > Hi Eric,
> >
> > On Tue, Feb 24, 2015 at 8:10 PM, Eric Nelson
> >
> > wrote:
> >> You might want to check this value:
> >>
> >> #define CONFIG_SYS_USB_EVENT_POLL_VIA
Hi Marek,
> On Wednesday, February 25, 2015 at 09:17:53 AM, Lukasz Majewski wrote:
> > Hi Marek,
> >
> > > On Tuesday, February 24, 2015 at 02:21:40 PM, Kishon Vijay
> > > Abraham I
> > >
> > > wrote:
> > > > Hi,
> > > >
> > > > On Monday 23 February 2015 08:29 PM, Marek Vasut wrote:
> > > > >
Hi Marek,
> On Tuesday, February 24, 2015 at 11:29:39 PM, Lukasz Majewski wrote:
> > On Tue, 24 Feb 2015 18:56:59 +0100
> >
> > Marek Vasut wrote:
> > > On Monday, February 23, 2015 at 10:06:08 AM, Lukasz Majewski
> > > wrote:
> > > > Dear Marek,
> > >
> > > Hi!
> > >
> > > > The following cha
With UMS support we are able to flash the eMMC from U-boot, which is very
convenient.
Add UMS support to make the eMMC flashing process easier.
Signed-off-by: Fabio Estevam
---
board/warp/warp.c | 6 ++
include/configs/warp.h | 26 ++
2 files changed, 32 inser
On Wed, Feb 25, 2015 at 06:58:03PM +0900, Inha Song wrote:
> Hi, Rob,
>
>
> On Tue, 24 Feb 2015 10:20:13 -0600
> Rob Herring wrote:
>
> > On Mon, Jan 19, 2015 at 1:07 AM, Inha Song wrote:
> > > This patch invoke board-specific USB cleanup (board_usb_cleanup)
> > > interface.
> > >
> > > Signed
Hi,
I read somewhere tha we can generate signed boot sd file for imx28. I
found target in makefile. But how can we configure uboot to generate
this target ?
Best regards,
--
Jérôme Dusautois
___
U-Boot mailing list
U-Boot@lists.denx.de
http
Hi Albert,
On 24 February 2015 at 23:28, Albert ARIBAUD wrote:
> Hello Simon,
>
> I'm a bit (read: almost completely) lost re all the gdata removal stuff;
> seems like there is/was this series, and there is the 9-patch series
> too, and possibly others... Right now, what patch( seri)es should be
On Tue, Feb 24, 2015 at 12:10 PM, Alexey Firago
wrote:
> The "fastboot reboot-bootloader" command is defined to
> re-enter into fastboot mode after rebooting into
> bootloader. This command is usually used after updating
> bootloader via fastboot.
>
> This commit implements only a generic side of
Hi Albert,
On 25 February 2015 at 06:27, Simon Glass wrote:
> Hi Albert,
>
> On 24 February 2015 at 23:28, Albert ARIBAUD
> wrote:
>> Hello Simon,
>>
>> I'm a bit (read: almost completely) lost re all the gdata removal stuff;
>> seems like there is/was this series, and there is the 9-patch seri
Hi Simon,
On Sat, Jan 31, 2015 at 12:34 AM, Simon Glass wrote:
> This series adds basic driver model support to USB. The intent is to permit
> the various subsystems (OHCI, EHCI, XHCI) to co-exist and allow any number
> of USB ports of different types. So far the absolute limit on the number
> o
On Sat, Jan 31, 2015 at 12:34 AM, Simon Glass wrote:
> While we currently don't have driver model support for block devices and
> Ethernet, we can still allow this to work when driver model is used for
> USB.
>
> Signed-off-by: Simon Glass
> ---
>
> common/cmd_usb.c| 74
The "fastboot reboot-bootloader" command is defined to
re-enter into fastboot mode after rebooting into
bootloader. This command is usually used after updating
bootloader via fastboot.
This commit implements only a generic side of the
command - setting of the reset flag and then resetting.
Setting
On Wed, Feb 25, 2015 at 6:27 AM, Paul Kocialkowski wrote:
> Le mercredi 25 février 2015 à 13:31 +0200, Igor Grinberg a écrit :
>> On 02/25/15 13:19, Paul Kocialkowski wrote:
>> > Le mardi 24 février 2015 à 16:57 -0600, Nishanth Menon a écrit :
>> >> Enable the OMAP3 specific errata code for 454179
On Wed, Feb 25, 2015 at 2:27 AM, Akshay Saraswat wrote:
> Hi Nishanth,
>
>>On 17:13-20150224, Nishanth Menon wrote:
>>> On 13:27-20150220, Akshay Saraswat wrote:
>>> > This patch adds workaround for ARM errata 798870 which says
>>> > "If back-to-back speculative cache line fills (fill A and fill B
In case of global data structure defined as "register volatile" compiler
throws an warning about incorrect type used:
--->8---
common/board_f.c: In function "board_init_f_r":
common/board_f.c:1073:2: warning: passing argument 1 of "&board_init_r
+(sizetype)gd->reloc_off" discards "volatile" qua
Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup
soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec
keyboard working again on Samsung Chromebook (snow).
Signed-off-by: Guillaume GARDET
Cc: Akshay Saraswat
Cc: Minkyu Kang
Cc: Joonyoung Shim
-
So I can't debug with the BDI3000 because the target keeps on resetting...
This happens over and over...
- TARGET: processing power-up delay
- TARGET: processing reset request
- TARGET: BDI executes scan chain init string
- TARGET: Bypass check 0x0001 => 0x0004
- TARGET: JTAG exists check
Hi Marek,
On Wed, Feb 25, 2015 at 9:11 AM, Marek Vasut wrote:
> On Wednesday, February 25, 2015 at 03:23:13 AM, Fabio Estevam wrote:
>> Ok, I managed to fix it. Will send a patch tomorrow, thanks
>
> Cool, thanks :)
Just to let you know that this original problem was caused by an error
in the m
Currently the usage text for the 'ums' command looks like this:
Usage:
ums ums [] e.g. ums 0 mmc 0
,so remove the extr
Hi Simon,
With a little bit of delay here are the responses ... :)
On 02/17/2015 08:04 PM, Simon Glass wrote:
Hi Gabriel,
On 15 February 2015 at 14:55, Gabriel Huau wrote:
Configure the pinctrl as it required to make some IO controllers
working (USB/UART/I2C/...).
The idea would be in the ne
Hi Simon,
With a little bit of delay here are the responses ... :)
On 02/17/2015 08:04 PM, Simon Glass wrote:
> Hi Gabriel,
>
> On 15 February 2015 at 14:55, Gabriel Huau wrote:
>> Configure the pinctrl as it required to make some IO controllers
>> working (USB/UART/I2C/...).
>> The idea would b
Hi Bin,
On 02/24/2015 11:52 PM, Bin Meng wrote:
Hi Gabriel,
On Mon, Feb 16, 2015 at 5:55 AM, Gabriel Huau wrote:
Configure the pinctrl as it required to make some IO controllers
working (USB/UART/I2C/...).
The idea would be in the next version to modify the pch GPIO driver and
configure these
On Wed, Feb 25, 2015 at 9:55 AM, Fabio Estevam
wrote:
> Add EXT2/EXT4 and BOUNCE_BUFFER support.
>
> Signed-off-by: Fabio Estevam
Acked-by: Otavio Salvador
--
Otavio Salvador O.S. Systems
http://www.ossystems.com.brhttp://code.ossystems.com.br
Mobile: +55
On Wed, Feb 25, 2015 at 9:55 AM, Fabio Estevam
wrote:
> With UMS support we are able to flash the eMMC from U-boot, which is very
> convenient.
>
> Add UMS support to make the eMMC flashing process easier.
>
> Signed-off-by: Fabio Estevam
Acked-by: Otavio Salvador
--
Otavio Salvador
On Wed, Feb 25, 2015 at 1:03 PM, Fabio Estevam
wrote:
> Currently the usage text for the 'ums' command looks like this:
>
> Usage:
> ums ums [] e.g. ums 0 mmc 0
>
> ,so remove the extra 'ums' in the text.
>
> Signed-off-by: Fabio Estevam
Acked-by: Otavio Salvador
--
Otavio Salvador
Hi Bin,
On 02/24/2015 11:52 PM, Bin Meng wrote:
> Hi Gabriel,
>
> On Mon, Feb 16, 2015 at 5:55 AM, Gabriel Huau wrote:
>> Configure the pinctrl as it required to make some IO controllers
>> working (USB/UART/I2C/...).
>> The idea would be in the next version to modify the pch GPIO driver and
>> c
On Wednesday, February 25, 2015 at 05:07:00 PM, Fabio Estevam wrote:
> Hi Marek,
>
> On Wed, Feb 25, 2015 at 9:11 AM, Marek Vasut wrote:
> > On Wednesday, February 25, 2015 at 03:23:13 AM, Fabio Estevam wrote:
> >> Ok, I managed to fix it. Will send a patch tomorrow, thanks
> >
> > Cool, thanks
On Wednesday, February 25, 2015 at 10:15:24 AM, Lukasz Majewski wrote:
> Hi Marek,
Hi!
> > On Tuesday, February 24, 2015 at 05:05:29 PM, Lukasz Majewski wrote:
> > > Hi Lukasz,
> >
[...]
> > I'll stick with your recommendation, though I'd like to -- somehow --
> > work in Inha's credit into th
On Wednesday, February 25, 2015 at 02:09:45 PM, Lukasz Majewski wrote:
> Hi Marek,
Hi!
> > On Tuesday, February 24, 2015 at 11:29:39 PM, Lukasz Majewski wrote:
> > > On Tue, 24 Feb 2015 18:56:59 +0100
> > >
> > > Marek Vasut wrote:
> > > > On Monday, February 23, 2015 at 10:06:08 AM, Lukasz Maj
On Wednesday, February 25, 2015 at 05:03:19 PM, Fabio Estevam wrote:
> Currently the usage text for the 'ums' command looks like this:
>
> Usage:
> ums ums [] e.g. ums 0 mmc 0
>
> ,so remove the extra 'ums' in the text.
>
> Signed-off-by: Fabio Estevam
Acked-by: Marek Vasut
Best regards,
On Wed, Feb 25, 2015 at 5:02 AM, Paul Kocialkowski wrote:
> Le mardi 24 février 2015 à 16:57 -0600, Nishanth Menon a écrit :
>> This is in preperation of using generic cross OMAP code.
>
> I found it a bit confusing at first, since as far as I could see, this
> series does not introduce any cross-
With limit of 16 symbols very simple device names derived drom device
tree description could not be displayed correctly.
For example "serial0@0xc0fc1000" will be truncated to sensless
"serial0@0xc0fc10" - note dropped tariling zeros.
Signed-off-by: Alexey Brodkin
Cc: Simon Glass
Cc: Tom Rini
-
On 02/25/2015 02:30 AM, Vincent wrote:
Hi,
as explained here http://community.arm.com/message/25127, it is possible to
boot the raspberry 2 in secure mode, by adding the kernel_old=1 option in
config.txt. The main effects of this option are:
- all 4 cores start executing in secure SVC mode instea
On 02/25/2015 05:15 AM, Paul Kocialkowski wrote:
> Le mardi 24 février 2015 à 16:57 -0600, Nishanth Menon a écrit :
>> 430973: Stale prediction on replaced inter working branch causes
>> Cortex-A8 to execute in the wrong ARM/Thumb state
>> Impacts: Everything lower than r2p1
>> Work around: Se
Nishanth Menon writes:
> On 13:27-20150220, Akshay Saraswat wrote:
>> This patch adds workaround for ARM errata 798870 which says
>> "If back-to-back speculative cache line fills (fill A and fill B) are
>> issued from the L1 data cache of a CPU to the L2 cache, the second
>> request (fill B) is t
Akshay Saraswat writes:
[...]
> I don't think it hurts to have a generic function with ARM errata
> workaround implementation. Whoever wish to use it can call it in their
> boot path. And it's not even getting executed right now for any SoC
> other than Exynos542x, so those who don't want it nee
Dear Dave Kucharczyk,
On Wed, Feb 25, 2015 at 3:19 AM, DaveKucharczyk
wrote:
> I'm porting U-Boot for an MX51 based board.
>
> This is the boot sequence with debug on...
>
> U-Boot 2014.07-svn10 (Feb 24 2015 - 15:49:39)
>
> initcall: 9ff85820
> U-Boot code: 9FF8 -> 9FFA6824 BSS: -> 9FFD944C
Hi,
The third incarnation of this series to address various ideas of
previous V2 series. I will skip the full blurb and point to V1/V2
links for the usual blurb.
Changes since V2:
- Added documentation revisioning info with ARM erratums
- patch series are split up to address ARM e
omap_smc1 is now generic enough to remove duplicate
omap3_gp_romcode_call logic that omap3 introduced.
As part of this change, move to using the generic lowlevel_init.S for
omap3 as well.
Signed-off-by: Nishanth Menon
---
arch/arm/cpu/armv7/omap-common/Makefile|2 +-
arch/arm/cpu/ar
RX51 has a secure logic which uses different parameters compared to
traditional implementation. So, make the generic secure acr write
over-ride-able by board file and refactor rx51 code to use this.
While at it, enable the OMAP3 specific errata code for 454179, 430973,
621766.
Signed-off-by: Nish
Add workaround for Cortex-A15 ARM erratum 798870 which says
"If back-to-back speculative cache line fills (fill A and fill B) are
issued from the L1 data cache of a CPU to the L2 cache, the second
request (fill B) is then cancelled, and the second request would have
detected a hazard against a rece
From: Praveen Rao
This patch enables the workaround for ARM errata 798870 for OMAP5 /
DRA7 which says "If back-to-back speculative cache line fills (fill
A and fill B) are issued from the L1 data cache of a CPU to the
L2 cache, the second request (fill B) is then cancelled, and the
second request
Update to existing recommendation for L2ACTLR configuration to prevent
system instability and optimize performance.
These apply to both OMAP5 and DRA7.
Reported-by: Vivek Chengalvala
Signed-off-by: Nishanth Menon
---
arch/arm/cpu/armv7/omap5/hwinit.c | 16
1 file changed, 16
Enable the OMAP3 specific errata code for 454179, 430973, 621766
and while at it, remove legacy non-revision checked errata logic.
Signed-off-by: Nishanth Menon
---
arch/arm/cpu/armv7/omap3/board.c | 31 ++-
include/configs/am3517_crane.h |4
include/
454179: Stale prediction may inhibit target address misprediction on
next predicted taken branch
Impacts: Every Cortex-A8 processors with revision lower than r2p1
Work around: Set IBE and disable branch size mispredict to 1
Also provide a hook for SoC specific handling to take place if ne
This is in preperation of using generic cross OMAP code.
Signed-off-by: Nishanth Menon
---
.../arm/include/asm/arch-omap3/{omap3.h => omap.h} |0
include/configs/am3517_crane.h |2 +-
include/configs/am3517_evm.h |2 +-
include/configs/cm_t35
430973: Stale prediction on replaced inter working branch causes
Cortex-A8 to execute in the wrong ARM/Thumb state
Impacts: Every Cortex-A8 processors with revision lower than r2p1
Work around: Set IBE to 1
Based on ARM errata Document revision 20.0 (13 Nov 2010)
Signed-off-by: Nishanth M
621766: Under a specific set of conditions, executing a sequence of
NEON or vfp load instructions can cause processor deadlock
Impacts: Every Cortex-A8 processors with revision lower than r2p1
Work around: Set L1NEON to 1
Based on ARM errata Document revision 20.0 (13 Nov 2010)
Signed-off
set_pl310_ctrl_reg does use the Secure Monitor Call (SMC) to setup
PL310 control register, however, that is something that is generic
enough to be used for OMAP5 generation of processors as well. The
only difference being the service being invoked for the function.
So, convert the service to a mac
Hello Simon,
On Wed, 25 Feb 2015 07:00:23 -0700, Simon Glass
wrote:
> Hi Albert,
>
> On 25 February 2015 at 06:27, Simon Glass wrote:
> > Hi Albert,
> >
> > On 24 February 2015 at 23:28, Albert ARIBAUD
> > wrote:
> >> Hello Simon,
> >>
> >> I'm a bit (read: almost completely) lost re all the
On 02/25/2015 01:55 PM, Kevin Hilman wrote:
> Nishanth Menon writes:
>
>> On 13:27-20150220, Akshay Saraswat wrote:
>>> This patch adds workaround for ARM errata 798870 which says
>>> "If back-to-back speculative cache line fills (fill A and fill B) are
>>> issued from the L1 data cache of a CPU
Hello Masahiro,
On Tue, 10 Feb 2015 19:52:56 +0900, Masahiro Yamada
wrote:
> My main motivation for this commit:
>
> [1] Follow the arch/arm/Makefile style of Linux Kernel
>
> [2] Maintain compiler options systematically
> Currently, we give -march=* and -mtune=* options inconsistently:
> O
Le mercredi 25 février 2015 à 08:32 -0600, menon.nisha...@gmail.com a
écrit :
> On Wed, Feb 25, 2015 at 6:27 AM, Paul Kocialkowski wrote:
> > Le mercredi 25 février 2015 à 13:31 +0200, Igor Grinberg a écrit :
> >> On 02/25/15 13:19, Paul Kocialkowski wrote:
> >> > Le mardi 24 février 2015 à 16:57
Tom,
The following changes since commit 38dac81b3d0e777f301ca98100bfbcab01d616c2:
Merge branch 'master' of git://git.denx.de/u-boot-mmc (2015-02-23 16:18:06
-0500)
are available in the git repository at:
git://git.denx.de/u-boot-fsl-qoriq.git master
for you to fetch changes up to 94e3c8c
On 01/06/2015 01:11 PM, York Sun wrote:
> From: Bhupesh Sharma
>
> This patch ensures that the TZPC (BP147) and TZASC-400 programming
> happens for LS2085A SoC only when the desired config flags are
> enabled and ensures that the TZPC programming is done to allow Non-secure
> (NS) + secure (S)
I applied the patch, but it still hangs.
The directory tree is different for mx5x vs. MX35
I added relocate.S to...arch/arm/cpu/armv7/mx5/relocate.S
and modified Makefile here...arch/arm/cpu/armv7/mx5/Makefile
Does that seem right?
--
View this message in context:
http://u-boot.10912.n7.nab
On 01/16/2015 01:23 AM, Alison Wang wrote:
> This patch is to define default values for some CCSR macros
> to make header files cleaner.
>
> Signed-off-by: Alison Wang
> ---
Applied to u-boot-fsl-qoriq master branch, awaiting upstream.
York
___
U-B
On 01/21/2015 01:29 AM, Minghuan Lian wrote:
> LS1021A's PCIe1 region begins 0x40_; PCIe2 begins
> 0x48_. In order to access PCIe device, we must create
> TLB to map the 40bit physical address to 32bit virtual address.
> This patch will enable MMU after DDR is available and create
On 01/21/2015 01:29 AM, Minghuan Lian wrote:
> Signed-off-by: Minghuan Lian
> ---
This set is applied to u-boot-fsl-qoriq master branch, awaiting upstream.
York
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On 01/16/2015 01:21 AM, Alison Wang wrote:
> There 4 JRs, 4 RTICs and 8 DECOs, and set them the same stream id
> for using the same SMMU3 on LS1021A.
>
> Signed-off-by: Xiubo Li
> Signed-off-by: Alison Wang
> ---
> Changes in v2:
> - Move changing CCSR macros to a separated patch.
Applied to
On 01/22/2015 11:53 PM, Chenhui Zhao wrote:
> The RCPM FSM may not be reset after power-on, for example,
> in the cases of cold boot and wakeup from deep sleep.
> It causes cache coherency problem and may block deep sleep.
> Therefore, reset them if they are not be reset.
>
> Signed-off-by: Chen
On 01/20/2015 07:16 AM, Volodymyr Riazantsev wrote:
> Add support of the DDR mode for eSDHC driver.
> Enable it for i.MX6 SoC family only.
>
> Change-Id: Ie27a945c9fe79d044cc886e269b60747f1744116
> Signed-off-by: Volodymyr Riazantsev
> ---
Applied to u-boot-fsl-qoriq master branch, awaiting up
On 02/23/2015 10:06 AM, Simon Glass wrote:
> On 20 February 2015 at 00:21, Gaurav Rana wrote:
>> Currently only normal hashing is supported using hardware acceleration.
>> Added support for progressive hashing using hardware.
>>
>> Signed-off-by: Ruchika Gupta
>> Signed-off-by: Gaurav Rana
>>
On 02/24/2015 08:07 PM, Gaurav Rana wrote:
> This patch does the following:
>
> 1. The function names for encapsulation and decapsulation
> were inconsitent in freescale's implementation and cmd_blob file.
> This patch corrects the issues.
> 2. The function protopye is also modified to change th
Hi Rob,
On 20 February 2015 at 20:24, Rob Herring wrote:
> On Wed, Feb 18, 2015 at 1:52 PM, Dileep Katta
> wrote:
> > This patch adds functionality to getvar command to get the userdata
> partition
> > size.
>
> This is non-standard and doesn't scale to other partitions. There is
>
Is there a
Hi Suriyan,
On Thu, Jan 22, 2015 at 5:46 PM, Suriyan Ramasami wrote:
> On Thu, Jan 22, 2015 at 9:51 AM, Kevin Hilman wrote:
>> Suriyan Ramasami writes:
>>
>>> Hello Kevin,
>>>
>>> On Wed, Jan 21, 2015 at 4:54 PM, Kevin Hilman wrote:
Hi Surijan,
Suriyan Ramasami writes:
>>>
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