SCFG_SCFGREVCR is SCFG bit reverse register. This register
must be written with 0x before writing to any other
SCFG register. Then other SCFG register could be written in
big-endian mode.
Address: 157_h base + 200h offset = 157_0200h
Bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15|16 17 18
From: Jason Jin
Disable the snoop for slave interface 0, 1 and 2
to avoid the interleaving on the CCI400 BUS.
Signed-off-by: Jason Jin
Signed-off-by: Minghuan Lian
---
Change log:
v2: Add tag "arm: ls102xa:" in the subject.
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 1 +
board/fre
From: Yuan Yao
Add define CONFIG_SYS_WRITE_SWAPPED_DATA.
For LS1021AQDS and LS1021QTWR nor flash write should swap the
bytes when handle unaligned tail bytes.
Because of the ending, if the date bus width is 16-bits and the
number of bytes is odd, we should swap the byte when write the
last one.
EC1 pins in RCW can be selected as RGMII1, GPIO3, CAN1/2, FTM1 or
SAI1/2. There is a bug that EC3 RGMII could not work when selecting EC1
as other functionality except RGMII. The workaround is to select
ge2_clk125 for eTSEC clock muxing in register SCFG_ETSECCMCR.
Signed-off-by: Alison Wang
---
C
SystemID information could be read through I2C1 from EEPROM
on LS1021ATWR board.
As LS1 is a little-endian processor, getting the version ID by
be32_to_cpu() is wrong. Fix it by using e.version directly.
This change will be compatible for both ARM and PowerPC.
As there is an errata that I2C1 coul
This series contain SD boot support for LS1021AQDS/TWR board
and NAND boot support for LS1021AQDS board.SPL framework is
used. PBL initialize the internal RAM and copy SPL to it,
then SPL initialize DDR using SPD and copy u-boot from SD
card or NAND flash to DDR, finally SPL transfer control to
u-b
This patch adds SD boot support for LS1021AQDS board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.
Signed-off-by: Alison Wang
Signed-off-by: Jason Jin
---
In SD boot, the magic number of u-boot image will be checked.
For LS102xA, u-boot.bin doesn't have the magic number. So use
u-boot.img which includes the magic number instead of u-boot.bin
when producing u-boot-with-spl-pbl.bin.
Signed-off-by: Alison Wang
---
Change log:
v3: No change.
v2: No c
On LS1, DDR is initialized by reading SPD through I2C interface
in SPL code. For I2C, ll_entry_count() is called, and it returns
the number of elements of a linker-generated array placed into
subsection of .u_boot_list section specified by _list argument.
So add I2C linker list in the generic .lds
For LS102xA, the size of spl/u-boot-spl.bin is variable.
This patch adds the support to deal with the variable
u-boot size in pblimage tool. It will be padded to 64
byte boundary.
Use pblimage_check_params() to add the specific operations
for ARM, such as PBI CRC and END command and the calculatio
Through adding CONFIG_QIXIS_I2C_ACCESS macro,
QIXIS_READ(reg)/QIXIS_WRITE(reg, value) can be used
for both i2c and ifc access to QIXIS FPGA. This is
more convenient for coding.
Signed-off-by: Jason Jin
Signed-off-by: Alison Wang
---
Change log:
v3: No change.
v2: No change.
board/freescale/
To support interactive DDR debugger, cli_simple.o, cli.o, cli_readline.o,
command.o, s_record.o, xyzModem.o and cmd_disk.o are all needed for
drivers/ddr/fsl/interactive.c.
In current common/Makefile, the above .o files are only produced when
CONFIG_SPL_BUILD is disabled.
For LS102xA, interactive
This patch adds SD boot support for LS1021ATWR board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.
Signed-off-by: Chen Lu
Signed-off-by: Alison Wang
Signed
This patch adds NAND boot support for LS1021AQDS board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from NAND flash to DDR, finally SPL transfer control to u-boot.
Signed-off-by: Prabhakar Kushwaha
Signed-off-by: Ali
Signed-off-by: Chunhe Lan
---
include/configs/P1023RDB.h | 43 +++
1 files changed, 43 insertions(+), 0 deletions(-)
diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h
index ba3da06..6b29add 100644
--- a/include/configs/P1023RDB.h
+++ b
Hi, Suriyan.
This patch can be separated.
On 10/02/2014 10:45 PM, Suriyan Ramasami wrote:
> This change adds support for enabling the USB host features of the board.
> This includes the USB3503A hub and the SMC LAN9730 ethernet controller
> as well.
>
> Credit goes to Tushar Behera (Linaro) for
Hi,
does anyone has tried eMMC boot on Arndale board?
I copied BL1, SPL and u-boot to eMMC, like I do on SD card but it does not boot
at all.
Note that once booted on SD card, I get some errors while accessing eMMC.
"mmc dev 0" returns:
dwmci_send_cmd: DATA ERROR!
switch to pa
On Fri, 2014-10-17 at 12:20 +0200, Guillaume Gardet wrote:
> Hi,
>
> does anyone has tried eMMC boot on Arndale board?
Other than the image which was in mine when it arrived, no, I've only
booted from the removable SD/MMC device.
> Note that once booted on SD card, I get some errors while access
Hi
On Fri, Oct 17, 2014 at 1:11 PM, Ian Campbell wrote:
> On Fri, 2014-10-17 at 12:20 +0200, Guillaume Gardet wrote:
>> Hi,
>>
>> does anyone has tried eMMC boot on Arndale board?
>
> Other than the image which was in mine when it arrived, no, I've only
> booted from the removable SD/MMC device.
Signed-off-by: Shengzhou Liu
---
board/freescale/t208xqds/README | 243
1 file changed, 243 insertions(+)
create mode 100755 board/freescale/t208xqds/README
diff --git a/board/freescale/t208xqds/README b/board/freescale/t208xqds/README
new file mode 1007
On Fri, 17 Oct 2014 12:20:44 +0200
Guillaume Gardet wrote:
> Hi,
>
> does anyone has tried eMMC boot on Arndale board?
>
> I copied BL1, SPL and u-boot to eMMC, like I do on SD card but it does not
> boot at all.
>
> Note that once booted on SD card, I get some errors while accessing eMMC.
>
On Friday, October 17, 2014 at 01:27:10 AM, Fabio Estevam wrote:
> On Thu, Oct 16, 2014 at 8:02 PM, Marek Vasut wrote:
> > So this discussion is related to a different thread ? I see ...
>
> We are talking about the need for the delay in the Ethernet PHY.
>
> Nikolay sent a patch adding such del
Hi Ian,
On Mon, Oct 13, 2014 at 8:57 PM, Maxime Ripard
wrote:
> On Sun, Oct 12, 2014 at 04:23:05PM +0800, Chen-Yu Tsai wrote:
>> On Sun, Oct 12, 2014 at 12:05 AM, Ian Campbell wrote:
>> > On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
>> >> From: Hans de Goede
>> >>
>> >> The A31, A23 a
Hi,
it was a pleasure for me to meet so many of you this Monday in
Düsseldorf at the ELCE. As many as 17 current custodians and 2
prospective new custodians were present at the event:
Hans de Goede - Sunxi
Alexey Brodkin - ARC
Marek Vasut - USB
Scott Wood - NAND
Joe Hershberger - Netwo
Hello,
On Thu, Oct 16, 2014 at 7:17 PM, Marek Vasut wrote:
> On Thursday, October 16, 2014 at 08:24:21 PM, Otavio Salvador wrote:
>> Hello,
>>
>> On Wed, Sep 3, 2014 at 6:25 AM, Marek Vasut wrote:
>> > On Wednesday, September 03, 2014 at 03:44:35 AM, Otavio Salvador wrote:
>> >> On Tue, Sep 2, 2
On Friday, October 17, 2014 at 05:35:58 PM, Otavio Salvador wrote:
> Hello,
[...]
> >> I have looked at this and I am unsure I still think removing it is a
> >> good idea. I think the way to go is to change CONFIG_MXS to
> >> CONFIG_MXSIMAGE and enable this in sandbox defconfig. What you think?
>
On 10/17/2014 01:24 AM, Chunhe Lan wrote:
> Signed-off-by: Chunhe Lan
> ---
A little bit more information in commit message will help us search for this
patch later.
York
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Hi Rob:
THANKS!
On 14-10-15 08:19 PM, Rob Herring wrote:
From: Rob Herring
CHUNK_TYPE_DONT_CARE should skip over the specified number of blocks, but
currently fails to increment the device block address. This results in
filesystem images getting written incorrectly. Add the missing block
addr
Add soc specific drivers directory like in the Linux kernel.
It is going to be used by keysotone soc specific drivers.
Signed-off-by: Ivan Khoronzhuk
---
drivers/Makefile | 2 ++
drivers/soc/Makefile | 3 +++
2 files changed, 5 insertions(+)
create mode 100644 drivers/soc/Makefile
diff --g
This patch split the Keystone II SGMII SerDes related code from
Ethernet driver and create a separate SGMII SerDes driver.
The SerDes driver can be used by others keystone subsystems
like PCI, sRIO, so move it to driver/soc/keystone directory.
Signed-off-by: Hao Zhang
Signed-off-by: Ivan Khoronzh
From: Hao Zhang
SerDes driver is used by other sub systems like PCI, sRIO etc.
So modify it to be more general. The SerDes driver provides common
API's that can also be extended for other peripherals SerDes
configurations.
Signed-off-by: Hao Zhang
Signed-off-by: Ivan Khoronzhuk
---
arch/arm/i
This patch series adds serdes driver, taking out it from
keystone_net driver.
v3..v1:
- just rebase.
Hao Zhang (2):
soc: keystone_serdes: enhance to use cmu/comlane/lane specific
configurations
soc: keystone_serdes: generalize to be used by other sub systems
Ivan Khoronzhuk (3):
From: Hao Zhang
Enhance the driver to use cmu/comlane/lane specific configurations
instead of 1 big array of configuration.
Signed-off-by: Hao Zhang
Signed-off-by: Ivan Khoronzhuk
---
arch/arm/include/asm/arch-keystone/hardware-k2hk.h | 3 +
arch/arm/include/asm/arch-keystone/hardware.h
The cmu, comlane, lane configuration mechanism are similar for sub
systems as well such as PCI or sRIO, but they have different values
based on input clock and output bus rate. According to this compact
driver to simplify adding different configuration settings based
on clock and rate.
Signed-off-
This patch series optimize keystone_net driver to use MDIO bus and
eht PHY frameworks.
Based on
"[U-boot] [Patch v3 0/5] keystone2: serdes: add seredes driver"
https://www.mail-archive.com/u-boot@lists.denx.de/msg148694.html
v2..v1
net: keystone_net: register eth PHYs on MDIO bus
- add
Don't use mdio_enable twice while eth open. Also rename it to
keystone2_mdio_reset as more appropriate name.
Acked-by: Vitaly Andrianov
Signed-off-by: Ivan Khoronzhuk
---
drivers/net/keystone_net.c | 16 ++--
1 file changed, 2 insertions(+), 14 deletions(-)
diff --git a/drivers/net
In case when several Ethernet ports are supported it's
convenient to see the number of phy that is not found.
Acked-by: Vitaly Andrianov
Signed-off-by: Ivan Khoronzhuk
---
drivers/net/phy/phy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/phy.c b/drivers/n
The phy framework has function to get link, so use it
instead of own implementation.
There is no reason to check SGMII link while sending each
packet, phy link is enough. Check SGMII link only while
ethernet open.
Acked-by: Vitaly Andrianov
Signed-off-by: Ivan Khoronzhuk
---
drivers/net/keysto
As MDIO bus has been added we can register PHYs with it.
After registration, the PHY driver will be probed according to the
hardware on board.
Startup PHY at the ethernet open.
Use phy_startup() instead of keystone_get_link_status() when eth open,
as it verifies PHY link inside and SGMII link is
Currently MDIO framework is not used to configure Ethernet PHY.
As result some of already implemented functions are duplicated.
So register MDIO bus in order to use it. On that stage it's just
registered, it'll be used as we start to use PHY framework.
Use mdio bus read/write/reset functions in th
Hi Akshay,
On 15 October 2014 18:38, Akshay Saraswat wrote:
> Now we are adding a new Peach-Pi board which is a variant of Peach-Pit
> and is based on Exynos5800. Exynos5800 itself is a variant of Exynos5420,
> hence, most of the hardware config and settings are reused for this board.
>
> Changes
On 16 October 2014 16:58, Bin Meng wrote:
> When building U-Boot with CONFIG_X86_RESET_VECTOR, the linking
> process misses the resetvec.o and start16.o so it cannot generate
> the rom version of U-Boot. The arch/x86/cpu/Makefile is updated to
> pull them into the final linking process.
>
> Signed
On 16 October 2014 16:58, Bin Meng wrote:
> GDT limit should be one less than an integral multiple of eight.
>
> Signed-off-by: Bin Meng
Acked-by: Simon Glass
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These patches add network support for Keystne2 Edison SoC boards.
Based on
"[U-boot] [Patch v2 0/5] keystone_net: use MDIO bus and eth PHY frameworks"
http://patchwork.ozlabs.org/patch/322289/
v2..v1
ARM: keystone: clock: add support for K2E SoCs
- firstly added
Hao Zhang (1):
board:
Keystone2 Edison SoC uses the same keystone navigator, but
uses different NETCP PktDMA definitions. This patch adds
required definitions.
Acked-by: Vitaly Andrianov
Acked-by: Murali Karicheri
Signed-off-by: Ivan Khoronzhuk
---
arch/arm/include/asm/arch-keystone/hardware-k2e.h | 13
The new Marvel PHY (88E1514) used on K2L/K2E EVM requires longer time
to auto negotiate with SoC's SGMII port.
It can take about 3 sec to up the PHY after reset, so add code to
expose sgmii auto negotiation waiting process.
Acked-by: Vitaly Andrianov
Signed-off-by: Ivan Khoronzhuk
---
drivers/
The Keystone2 Edison SoC uses the same keystone net driver.
This patch adds opportunity to use it by K2E SoCs.
Acked-by: Vitaly Andrianov
Acked-by: Murali Karicheri
Signed-off-by: Ivan Khoronzhuk
---
arch/arm/include/asm/arch-keystone/hardware-k2e.h | 3 +++
drivers/net/keystone_net.c
For K2E and K2L SoCs clock output from PASS PLL has to be enabled
after NETCP domain and PA module are enabled. So create new function
for that and call it after PA module is enabled.
Signed-off-by: Ivan Khoronzhuk
---
arch/arm/cpu/armv7/keystone/clock.c| 17 +
arch/arm/i
From: Hao Zhang
This patch adds network support code and enables keystone_net
driver usage for k2e_evm evaluation board.
Acked-by: Vitaly Andrianov
Acked-by: Murali Karicheri
Signed-off-by: Hao Zhang
Signed-off-by: Ivan Khoronzhuk
---
board/ti/ks2_evm/board_k2e.c | 68 ++
Keystone2 Edison SoC uses the same keystone SerDes driver.
This patch adds support for K2E SoCs.
Acked-by: Vitaly Andrianov
Acked-by: Murali Karicheri
Signed-off-by: Ivan Khoronzhuk
---
arch/arm/include/asm/arch-keystone/hardware-k2e.h | 4
drivers/net/keystone_net.c
On 10/17/2014 08:38 PM, Ivan Khoronzhuk wrote:
This patch series adds serdes driver, taking out it from
keystone_net driver.
v3..v1:
- just rebase.
is based on "[U-boot] [Patch v2 0/5] keystone2: generalize keystone_net
driver usage"
https://www.mail-archive.com/u-boot@lists.denx.de/
On 10/17/2014 10:00 PM, Ivan Khoronzhuk wrote:
On 10/17/2014 08:38 PM, Ivan Khoronzhuk wrote:
This patch series adds serdes driver, taking out it from
keystone_net driver.
v3..v1:
- just rebase.
is based on "[U-boot] [Patch v2 0/5] keystone2: generalize
keystone_net driver usage"
https:
On 10/17/2014 08:44 PM, Ivan Khoronzhuk wrote:
This patch series optimize keystone_net driver to use MDIO bus and
eht PHY frameworks.
Based on
"[U-boot] [Patch v3 0/5] keystone2: serdes: add seredes driver"
https://www.mail-archive.com/u-boot@lists.denx.de/msg148694.html
link update
https://www
Hello Jaehoon,
On Fri, Oct 17, 2014 at 1:52 AM, Jaehoon Chung wrote:
> Hi, Suriyan.
>
> This patch can be separated.
>
OK, I shall separate out the power.c/power.h changes for enabling and
disabling the usbhost phy.
> On 10/02/2014 10:45 PM, Suriyan Ramasami wrote:
>> This change adds support f
On 10/17/2014 09:01 PM, Ivan Khoronzhuk wrote:
These patches add network support for Keystne2 Edison SoC boards.
Based on
"[U-boot] [Patch v2 0/5] keystone_net: use MDIO bus and eth PHY frameworks"
http://patchwork.ozlabs.org/patch/322289/
link update
https://www.mail-archive.com/u-boot@lists.d
On 10/17/2014 01:52 AM, Ivan Khoronzhuk wrote:
This series adds the DDR3 ECC support to enable ECC in the DDR3
EMIF controller for Keystone II devices.
Based on
"[U-boot] [Patch 0/5] keystone2: add network support for K2E SoC and EVM"
https://www.mail-archive.com/u-boot@lists.denx.de/msg148985.h
Hello Simon,
On Thu, Oct 9, 2014 at 8:42 AM, Simon Glass wrote:
> +Tom for the question below re return values
>
> Hi,
>
> On 8 October 2014 15:54, Suriyan Ramasami wrote:
>>
>> On Wed, Oct 8, 2014 at 1:44 PM, Simon Glass wrote:
>> > Hi Suriyan,
>> >
>> > On 8 October 2014 14:23, Suriyan Ramasa
Hi Suriyan,
On 17 October 2014 13:17, Suriyan Ramasami wrote:
> Hello Simon,
>
> On Thu, Oct 9, 2014 at 8:42 AM, Simon Glass wrote:
>> +Tom for the question below re return values
>>
>> Hi,
>>
>> On 8 October 2014 15:54, Suriyan Ramasami wrote:
>>>
>>> On Wed, Oct 8, 2014 at 1:44 PM, Simon Glas
Hi Alban,
On 15 October 2014 03:42, Alban Bedel wrote:
> On Tue, 14 Oct 2014 21:18:37 +0200
> Simon Glass wrote:
>
>> Hi Joe,
>>
>> On 14 October 2014 21:14, Joe Hershberger wrote:
>> >
>> > On Tue, Oct 14, 2014 at 12:21 PM, Simon Glass wrote:
>> > >
>> > > Hi,
>> > >
>> > > On 14 October 2014
Hi,
On 16 October 2014 22:52, Ahmad Draidi wrote:
> This patch makes the following changes:
> - Set kernel entry point correctly
> - Append bootargs from image to global bootargs instead
> of replacing them
> - Return end address instead of size from android_image_get_end()
> - Give corre
Hi Simon,
some comments on return values and error reporting below:
On Wed, 15 Oct 2014 02:05:31 -0600
Simon Glass wrote:
...
> diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c
> index 53f9b34..afac3f9 100644
> --- a/board/amcc/sequoia/sequoia.c
> +++ b/board/amcc/sequoia
Hi Simon,
On Wed, 15 Oct 2014 02:05:32 -0600
Simon Glass wrote:
...
> + else if (strncmp(argv[1], "boa", 3) == 0) {
> + int err = ft_board_setup(working_fdt, gd->bd);
> +
> + if (err) {
> + printf("Failed to add board information to FDT: %s\n",
> +
Commit 951860634fdb557bbb58e0f99215391bc0c29779 may have changed
the logic unintentially from "if (!(swfw_sync & (fwmask | swmask)))"
to "if ((swfw_sync & swmask) && !(swfw_sync & fwmask))". This change
breaks some e1000 NIC with a message "ERROR: Unable to read EEPROM!".
Signed-off-by: York Sun
Hi Simon,
On Wed, 15 Oct 2014 02:05:33 -0600
Simon Glass wrote:
...
> diff --git a/common/fdt_support.c b/common/fdt_support.c
> index 3f64156..dc41222 100644
> --- a/common/fdt_support.c
> +++ b/common/fdt_support.c
> @@ -112,17 +112,7 @@ int fdt_find_and_setprop(void *fdt, const char *node,
>
On Wed, 15 Oct 2014 02:05:36 -0600
Simon Glass wrote:
> Flash regions can optionally be compressed or hashed. Add the ability to
> read this information from the flashmap.
>
> Signed-off-by: Simon Glass
> ---
>
> include/fdtdec.h | 16
> lib/fdtdec.c | 8
> 2 fi
On Wed, 15 Oct 2014 02:05:35 -0600
Simon Glass wrote:
> Use the correct FDT data types for this function. Also add more debugging.
>
> Signed-off-by: Simon Glass
> ---
>
> include/fdtdec.h | 10 +-
> lib/fdtdec.c | 19 ---
> 2 files changed, 17 insertions(+), 12 de
On Wed, 15 Oct 2014 02:05:39 -0600
Simon Glass wrote:
> This function is only called within this file so make it static. Also
> fix its argument types to be consistent with its caller.
>
> Signed-off-by: Simon Glass
> ---
>
> common/fdt_support.c | 4 ++--
> 1 file changed, 2 insertions(+), 2
Hi Simon,
On Wed, 15 Oct 2014 02:05:38 -0600
Simon Glass wrote:
> Add an additional function for adding information to the device tree before
> booting. This permits additions which are not board-specific.
>
> Signed-off-by: Simon Glass
> ---
>
> README| 9 -
> commo
On Friday, October 17, 2014 at 10:44:06 PM, York Sun wrote:
> Commit 951860634fdb557bbb58e0f99215391bc0c29779 may have changed
> the logic unintentially from "if (!(swfw_sync & (fwmask | swmask)))"
> to "if ((swfw_sync & swmask) && !(swfw_sync & fwmask))". This change
> breaks some e1000 NIC with a
On 09/30/2014 07:41 PM, Stephen Warren wrote:
> On 09/22/2014 05:30 PM, Simon Glass wrote:
>> This series adds driver model support to the GPIO and serial drivers used
>> by Raspberry Pi, and moves Raspberry Pi over to driver model.
>>
>> This requires adding driver model support to the pl01x seria
Hi Akshay,
On 17 October 2014 11:52, Simon Glass wrote:
>
> Hi Akshay,
>
> On 15 October 2014 18:38, Akshay Saraswat wrote:
> > Now we are adding a new Peach-Pi board which is a variant of Peach-Pit
> > and is based on Exynos5800. Exynos5800 itself is a variant of Exynos5420,
> > hence, most of
Hello Mr. Glass
On Fri, Oct 17, 2014 at 11:19 PM, Simon Glass wrote:
> Hi,
>
> On 16 October 2014 22:52, Ahmad Draidi wrote:
>> This patch makes the following changes:
>> - Set kernel entry point correctly
>> - Append bootargs from image to global bootargs instead
>> of replacing them
>>
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