Dear Pierre.
In message <1398321641-7113-2-git-send-email-p.aub...@staubli.com> you wrote:
>
...
> --- a/lib/Makefile
> +++ b/lib/Makefile
> @@ -35,6 +35,9 @@ obj-y += net_utils.o
> obj-$(CONFIG_PHYSMEM) += physmem.o
> obj-y += qsort.o
> obj-$(CONFIG_SHA1) += sha1.o
> +ifdef CONFIG_SUPPORT_EMMC
On 04/23/14 22:00, Eric Nelson wrote:
> Hi Stefano,
>
> On 04/23/2014 10:07 AM, Stefano Babic wrote:
>> Hi Tim, hi Nikita,
>>
>> On 10/04/2014 16:08, Nikita Kiryanov wrote:
>>
The cfg files are currently all written to use the IOMUX register
names as MX6_ (no Q vs DL) so that a single c
Hello Wolfgang,
Le 24/04/2014 08:55, Wolfgang Denk a écrit :
Dear Pierre Aubert,
In message <1398321641-7113-2-git-send-email-p.aub...@staubli.com> you wrote:
This patch adds functions for read, write and authentication
key programming for the Replay Protected Memory Block partition
in the eMM
Hi Pekon,
On Wed, Apr 23, 2014 at 8:04 PM, Gupta, Pekon wrote:
> Hello Marek,
>
>>From: Belisko Marek [mailto:marek.beli...@gmail.com]
>>
>>CC-ing Pekon Gupta which add those changes in commit:
>>6e562b1106ea6afc78752f50925e87e9dd14f8b4
>>
>>On Tue, Apr 15, 2014 at 12:47 PM, Belisko Marek
>>wro
Dear Pierre,
In message <5358ba6a.3030...@staubli.com> you wrote:
>
> > The changelog goes into the comment section (i. e. below the "---"
> I will fix it in V5. I made the same mistake for the patch 3/3.
Thanks.
Actually I cannot see a V4 of patch 3/3 ?
> > line), not into the commit message.
Hello Wolfgang,
Le 24/04/2014 09:33, Wolfgang Denk a écrit :
Dear Pierre,
In message <5358ba6a.3030...@staubli.com> you wrote:
The changelog goes into the comment section (i. e. below the "---"
I will fix it in V5. I made the same mistake for the patch 3/3.
Thanks.
Actually I cannot see a V
Hello Wolfgang,
Le 24/04/2014 08:59, Wolfgang Denk a écrit :
Dear Pierre.
In message <1398321641-7113-2-git-send-email-p.aub...@staubli.com> you wrote:
...
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -35,6 +35,9 @@ obj-y += net_utils.o
obj-$(CONFIG_PHYSMEM) += physmem.o
obj-y += qsort.o
obj
Hi Tim,
On 23/04/2014 06:53, Tim Harvey wrote:
> Avoid uding pmic_init() as this forces the model of only allowing a
> single PMIC driver to be built at a time.
>
> Signed-off-by: Tim Harvey
> ---
> drivers/power/pmic/pmic_pfuze100.c | 2 +-
> include/power/pfuze100_pmic.h | 1 +
> 2 files
Hi Tim,
On 23/04/2014 06:53, Tim Harvey wrote:
> The LTC3676 PMIC includes four DC/DC converters, and three 300mA
> LDO Regulators (two Adjustable). The DC/DC converters are adjustable based
> on a resistor devider (board-specific).
>
> This adds support for the LTC3676 by creating a namespace un
On Wed, Apr 23, 2014 at 11:03 AM, Stefano Babic wrote:
> Hi Tim,
Hi Stefano,
>
> On 03/04/2014 08:01, Tim Harvey wrote:
>> Switch to an SPL image. The SPL for Ventana does the following:
>> - setup i2c and read the factory programmed EEPROM to obtain DRAM config
>>and model for board-specif
On 23/04/2014 06:53, Tim Harvey wrote:
> The LTC3676 PMIC is used instead of the PFUZE100 PMIC on the
> GW51xx/GW52xx/GW53xx Ventana baseboards. In order to support the IMX6Q SoC
> at 1GHz on those baseboards, we need to adjust the voltage scaling for the SW1
> and SW3 DC/DC converters on the LTC36
Hi Tim,
On 24/04/2014 10:06, Tim Harvey wrote:
>>> +
>>> +/* configure mx6 mmdc io registers */
>>> +struct mx6_mmdc_ioregs mmdc_ioregs = {
>>> + /* DDR3 */
>>> + .mmdc_grp_ddr_type = 0x000c,
>>> + /* disable DDR pullups */
>>> + .mmdc_grp_ddrpke = 0x,
>>> + /* SDCL
On Thu, Apr 24, 2014 at 1:03 AM, Stefano Babic wrote:
> Hi Tim,
>
> On 23/04/2014 06:53, Tim Harvey wrote:
>> Avoid uding pmic_init() as this forces the model of only allowing a
>> single PMIC driver to be built at a time.
>>
>> Signed-off-by: Tim Harvey
>> ---
>> drivers/power/pmic/pmic_pfuze10
Hi Tim!
BTW: Thanks for all your work on this. Great work and really appreciated.
Just a quick note:
On 24.04.2014 10:06, Tim Harvey wrote:
If I were to split the partitions like the above change, it will cause
some grief for existing users that are using the 3.0.35 (non
device-tree) vendor
This patch remove always false (since we tested ret = 0) ternary operator
with ret value returned.
Signed-off-by: Lukasz Majewski
---
drivers/dfu/dfu.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index a41195b..422cdba 100644
--- a
This patch adds functions for read, write and authentication
key programming for the Replay Protected Memory Block partition
in the eMMC.
Signed-off-by: Pierre Aubert
CC: Pantelis Antoniou
---
Changes in V5:
- move changelog to the right place
- change lib/Makefile for adding sha256 when CONFIG_
User's confirmation is asked in different commands. This commit adds a
function for such confirmation.
Signed-off-by: Pierre Aubert
---
V3, V4, V5: no changes
Patch added in V2
common/cmd_fuse.c | 11 ++-
common/cmd_nand.c | 16 +---
common/cmd_otp.c | 18 +++---
This serie of patches adds some functions and a sub-command of 'mmc' for
programming the authentication key and for reading and writing the RPMB
partition of an eMMC according to the JEDEC standard No. 64-A441
The sub-command rpmb is enabled by the flag CONFIG_SUPPORT_EMMC_RPMB defined
in the b
This sub-command adds support for the RPMB partition of an eMMC:
* mmc rpmb key
Programs the authentication key in the eMMC This key can not
be overwritten.
* mmc rpmb read <#count> [address of key]
Reads <#count> blocks of 256 bytes in the RPMB partition
beginning at block number . If t
Hi Tim,
On 24/04/2014 10:19, Tim Harvey wrote:
>>
>> This is a change in the PMIC framework API and must be documented.
>>
>> Currently, we support multiple instances of the same PMIC, but not
>> different PMIC on the same board.
>>
>
> Stefano,
>
> Hmm... I see several pmic's that use their ow
Most of the I2C slaves support accesses in the typical style
that is : read/write series of bytes at particular address offset.
These transactions look like:"
(1) START:Address:Tx:Offset:RESTART:Address[0..4]:Tx/Rx:data[0..n]:STOP"
However there are certain devices which support accesses in
terms
Hi Chin,
> > [1] Fix denali_write_oob() handler.
> >
> > As for v7, "nand markbad" did not work at all.
> >
> > With this patch, it works.
>
> Actually this was tested before.
> Here is the test result (as this was written as SOCFPGA documentation)
>
> SOCFPGA_CYCLONE5 # nand markbad 0
> Bad
Hi Chin,
On Wed, 23 Apr 2014 02:06:58 -0500
Chin Liang See wrote:
> Hi Masahiro,
>
>
> On Fri, 2014-04-18 at 20:41 +0900, Masahiro Yamada wrote:
> > Hi Chin,
> >
> >
> > I found another fatal problem in v7.
> > "nand markbad" command does not work at all.
> > I think write_oob_data() is bug
Hi Scott, Chin,
On Wed, 23 Apr 2014 02:15:10 -0500
Chin Liang See wrote:
> On Tue, 2014-04-22 at 14:12 -0500, Scott Wood wrote:
> > On Tue, 2014-04-22 at 10:04 +0900, Masahiro Yamada wrote:
> > > Hi Scott,
> > >
> > >
> > > > > It is really really painful to wait more than 10 seconds just for
On 25.03.2014 22:00, Matthias Fuchs wrote:
This patch adds support for the new PMC440 hardware revision 1.4.
The board now uses Micrel KSZ9031 phys.
Add missing i2c initialization before reading bootstrap eeprom.
Fix a couple of coding style issues.
Make local functions static.
Signed-off-by:
Hi Tom,
please pull the following patch:
The following changes since commit adcdeacc3eda1e5949e54062aa99c299e12483be:
Merge branch 'master' of git://git.denx.de/u-boot-mips (2014-04-23 11:07:11
-0400)
are available in the git repository at:
git://www.denx.de/git/u-boot-ppc4xx.git master
Hi Marek,
>From: Belisko Marek [mailto:marek.beli...@gmail.com]
>On Wed, Apr 23, 2014 at 8:04 PM, Gupta, Pekon wrote:
>>>From: Belisko Marek [mailto:marek.beli...@gmail.com]
>>>
>>>CC-ing Pekon Gupta which add those changes in commit:
>>>6e562b1106ea6afc78752f50925e87e9dd14f8b4
>>>
>>>On Tue, Apr
Trivial fix.
Signed-off-by: Michal Simek
---
Makefile | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Makefile b/Makefile
index 0191869..3e324f9 100644
--- a/Makefile
+++ b/Makefile
@@ -285,7 +285,7 @@ export KBUILD_CHECKSRC KBUILD_SRC KBUILD_EXTMOD
# cmd_cc_o
Hello
I tried to use a Intel 82574 based miniPCIe NIC on a Freescale iMX6 eval
board as shown below. It seems that the NIC is unable to read and/or
write the descriptors in system memory. The settings of the PCIe core
registers seems to be OK (according to the iMX6 RM).
Any idea what i am missing
On Wed, Apr 23, 2014 at 6:02 AM, Lukasz Majewski wrote:
> Hi Rob,
>
>> From: Sebastian Siewior
>>
>> This patch contains an implementation of the fastboot protocol on the
>> device side and documentation. This is based on USB download gadget
>> infrastructure. The fastboot function implements the
Signed-off-by: Samuel Egli
Cc: Roger Meier
Cc: Heiko Schocher
Cc: Wolfgang Denk
---
include/configs/siemens-am33x-common.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/siemens-am33x-common.h
b/include/configs/siemens-am33x-common.h
index 261b348..73a1
This patch series provides a general update and clean up for siemens boards.
* Update DDR3 settings for dxr2 board. Provide DDR3 software leveling
parameters for new engineering samples
* Add more flexible control of LEDs
* Cosmetic changes in dxr2 and pxm2
Samuel Egli (5):
siemens: cosmeti
* remove setting LED in user button function.
We want to decouple reading user button and setting LED. This
two things need to be done independently.
* led cmd can be used to control LEDs that are defined in board file
having a led cmd, one can easily set LEDs in u-boot shell. For
ex
In order to have the same LED indication like in another product
when ready for updating, enable only red led and disable status
LED when entering DFU mode.
The status LED is only switched off when defined in board file.
Signed-off-by: Samuel Egli
Cc: Roger Meier
Cc: Heiko Schocher
Cc: Wolfgan
For dxr2 board DXR2_IOCTRL_VAL is set by data in EEPROM. In pxm2
board it does not make sense to have dxr2 as prefix. Replace it with
more meaningful DDR prefix.
Signed-off-by: Samuel Egli
Cc: Pascal Bach
Cc: Roger Meier
Cc: Heiko Schocher
Cc: Wolfgang Denk
---
board/siemens/pxm2/board.c |
* add parameters for factory and print them at start up to
facilitate control of right DDR3 settings in EEPROM.
* cosmetic changes in a couple of printfs
Signed-off-by: Samuel Egli
Cc: Roger Meier
Cc: Heiko Schocher
Cc: Wolfgang Denk
---
board/siemens/dxr2/board.c | 41 +++
On 04/23/2014 11:22 PM, Dirk Eibach wrote:
> NAK for dlvision, io, iocon and neo.
> Flash partition layout does not allow changing CONFIG_SYS_TEXT_BASE.
> I will try to come up with a different solution for these boards.
>
Thanks. I will resend the patch to deal with MPC8572DS only.
York
_
Dear Ian,
On Sat, 2014-04-19 at 14:52 +0100, Ian Campbell wrote:
> struct dw_eth_dev contains fields which are accessed via DMA, so make sure it
> is aligned to a dma boundary. Without this I see:
> ERROR: v7_dcache_inval_range - start address is not aligned - 0x7fb677e0
>
> Signed-off-by: Ia
Dear Ian,
On Sat, 2014-04-19 at 14:52 +0100, Ian Campbell wrote:
> - /* Invalidate only "status" field for the following check */
> - invalidate_dcache_range((unsigned long)&desc_p->txrx_status,
> - (unsigned long)&desc_p->txrx_status +
> -
In addition to using the MMC "user area" (the device's physical partition), I
am also using the "first MMC boot partition" and the "second MMC boot
partition"...
As a result, I am currently using the following code snippet in a number of
places:
err = -1;
if (mmc->part_num != part_num) {
On Thursday, April 24, 2014 at 10:24:53 AM, Lukasz Majewski wrote:
> This patch remove always false (since we tested ret = 0) ternary operator
> with ret value returned.
>
> Signed-off-by: Lukasz Majewski
> ---
> drivers/dfu/dfu.c |2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Appli
On Thu, 2014-04-24 at 17:41 +, Alexey Brodkin wrote:
> 1. Don't invalidate "sizeof(struct dmamacdescr)" but only
> "roundup(sizeof(desc_p->txrx_status), ARCH_DMA_MINALIGN))".
OK. (Although given the realities of the real world values of
ARCH_DMA_MINALIGN on every arch and the sizes of the str
From: Stephen Warren
U-Boot on Tegra30 currently selects a main CPU frequency that cannot be
supported at all on some SKUs, and needs higher VDD_CPU/VDD_CORE values
on some others. This can result in unreliable operation of the main CPUs.
Resolve this by switching to a CPU frequency that can be
On 04/23/2014 11:04 PM, Masahiro Yamada wrote:
> This commit adds
> - arch/*/Kconfig: provide a menu to select target boards
> - board/*/Kconfig: set CONFIG macros to the appropriate values
> for each board
> - configs/*_defconfig: default setting of each board
>
> (This commit was auto
From: Stephen Warren
ci_ep_queue() currently only fills in the page0/page1 fields in the
queue item. If the buffer is larger than 4KiB (unaligned) or 8KiB
(page-aligned), then this prevents the HW from knowing where to write
the balance of the data.
Fix this by initializing all 5 pageN pointers,
From: Stephen Warren
At least drivers/usb/gadget/storage_common.c expects that ep->req.actual
contain the number of bytes actually transferred. (At least in practice,
I observed it failing to work correctly unless this was the case).
However, ci_udc.c modifies ep->req.length instead. I assume th
From: Stephen Warren
Tegra's USB controller appears to be a variant of the ChipIdea
controller; perhaps derived from it, or simply a different version of
the IP core to what U-Boot supports today.
In this variant, at least the following difference are present:
- Some registers are moved about.
-
From: Stephen Warren
usb_gadget_register_driver() currently unconditionally programs PORTSC
to select a ULPI PHY. This is incorrect on at least the Tegra boards I
am testing with, which use a UTMI PHY for the OTG ports. Make the PHY
selection code conditional upon the specific EHCI controller tha
From: Stephen Warren
ci_udc.c allocates only a single buffer for each endpoint, which
ci_ep_alloc_request() returns as a hard-coded value rather than
dynamically allocating. Consequently, storage_common.c must limit
itself to using a single buffer at a time. Add a special case
to the definition o
> 1. Don't invalidate "sizeof(struct dmamacdescr)" but only
> "roundup(sizeof(desc_p->txrx_status), ARCH_DMA_MINALIGN))".
I'm not sure I like this: if ARCH_DMA_MINALIGN is "too large" and ends
up invalidating more than the struct, it could be an error, so it's
safer to ask it to invalidate the str
Hello Andreas,
Am 20.04.2014 10:34, schrieb Andreas Bießmann:
Commit 2842c1c24269a05142802d25520e7cb9035e456c introduced lib/sha256 into
mkimage. Since then it will be compiled with HOSTCC which may produce errors
on some systems. Most BSD systems (like OS X for me) do not ship a
linux/string.h
Hello Masahiro,
Am 22.04.2014 07:31, schrieb Masahiro Yamada:
Hi.
I found 6 PowerPC boards are broken:
MPC8572DS MPC8572DS_36BIT dlvision-10g io iocon neo
Section overlap error occurrs.
powerpc-linux-ld.bfd: section .resetvec loaded at
[fffc,] overlaps section .
Hello York,
Am 24.04.2014 19:02, schrieb York Sun:
On 04/23/2014 11:22 PM, Dirk Eibach wrote:
NAK for dlvision, io, iocon and neo.
Flash partition layout does not allow changing CONFIG_SYS_TEXT_BASE.
I will try to come up with a different solution for these boards.
Thanks. I will resend the
Hi Rob,
> On Wed, Apr 23, 2014 at 6:02 AM, Lukasz Majewski
> wrote:
> > Hi Rob,
> >
> >> From: Sebastian Siewior
> >>
> >> This patch contains an implementation of the fastboot protocol on
> >> the device side and documentation. This is based on USB download
> >> gadget infrastructure. The fastb
On Apr 24, 2014, at 10:19 PM, Heiko Schocher wrote:
> Hello York,
>
> Am 24.04.2014 19:02, schrieb York Sun:
>> On 04/23/2014 11:22 PM, Dirk Eibach wrote:
>>> NAK for dlvision, io, iocon and neo.
>>> Flash partition layout does not allow changing CONFIG_SYS_TEXT_BASE.
>>> I will try to come up
Krunal Desai wrote:
> Can you get a dump of config space for the 82574? What are its BARs?
=> pci display 1.0.0 0 40
: 10d38086 0016 0200 0010
0010: 0110 01010001 0112
0020: 8086
0030: 00c8 01
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