Re: [U-Boot] socfpga cyclone5 dts

2018-10-25 Thread Marek Vasut
On 10/24/2018 09:44 PM, Simon Goldschmidt wrote: > On 23.10.2018 10:54, Marek Vasut wrote: >> On 10/23/2018 10:52 AM, Simon Goldschmidt wrote: >> [...] >> > - socfpga_cyclone5_de1_soc.dts > - socfpga_cyclone5_de10_nano.dts These should be upstream. >>> But they aren't? Or did you mean

Re: [U-Boot] socfpga cyclone5 dts

2018-10-24 Thread Simon Goldschmidt
On 23.10.2018 10:54, Marek Vasut wrote: On 10/23/2018 10:52 AM, Simon Goldschmidt wrote: [...] - socfpga_cyclone5_de1_soc.dts - socfpga_cyclone5_de10_nano.dts These should be upstream. But they aren't? Or did you mean "these should be upstreamed"? By whom? CCing Dinh :-) [...] Also, Dinh h

Re: [U-Boot] socfpga cyclone5 dts

2018-10-23 Thread Stefan Roese
On 23.10.18 10:41, Marek Vasut wrote: On 10/22/2018 10:48 PM, Simon Goldschmidt wrote: On 18.10.2018 23:04, Marek Vasut wrote: On 10/18/2018 10:20 PM, Simon Goldschmidt wrote: Marek Vasut mailto:marek.va...@gmail.com>> schrieb am Do., 18. Okt. 2018, 22:15: On 10/18/2018 09:28 PM, Simon

Re: [U-Boot] socfpga cyclone5 dts

2018-10-23 Thread Marek Vasut
On 10/23/2018 10:52 AM, Simon Goldschmidt wrote: [...] >>> - socfpga_cyclone5_de1_soc.dts >>> - socfpga_cyclone5_de10_nano.dts >> >> These should be upstream. > > But they aren't? Or did you mean "these should be upstreamed"? By whom? CCing Dinh :-) [...] >>> Also, Dinh has enabled the watchdog

Re: [U-Boot] socfpga cyclone5 dts

2018-10-23 Thread Simon Goldschmidt
On Tue, Oct 23, 2018 at 10:42 AM Marek Vasut wrote: > > On 10/22/2018 10:48 PM, Simon Goldschmidt wrote: > > On 18.10.2018 23:04, Marek Vasut wrote: > >> On 10/18/2018 10:20 PM, Simon Goldschmidt wrote: > >>> > >>> Marek Vasut mailto:marek.va...@gmail.com>> > >>> schrieb am Do., 18. Okt. 2018, 22:

Re: [U-Boot] socfpga cyclone5 dts

2018-10-23 Thread Marek Vasut
On 10/22/2018 09:55 PM, Simon Goldschmidt wrote: > On 18.10.2018 23:04, Marek Vasut wrote: >> On 10/18/2018 10:20 PM, Simon Goldschmidt wrote: >>> >>> Marek Vasut mailto:marek.va...@gmail.com>> >>> schrieb am Do., 18. Okt. 2018, 22:15: >>> >>> On 10/18/2018 09:28 PM, Simon Goldschmidt wrote: >

Re: [U-Boot] socfpga cyclone5 dts

2018-10-23 Thread Marek Vasut
On 10/22/2018 10:48 PM, Simon Goldschmidt wrote: > On 18.10.2018 23:04, Marek Vasut wrote: >> On 10/18/2018 10:20 PM, Simon Goldschmidt wrote: >>> >>> Marek Vasut mailto:marek.va...@gmail.com>> >>> schrieb am Do., 18. Okt. 2018, 22:15: >>> >>> On 10/18/2018 09:28 PM, Simon Goldschmidt wrote: >

Re: [U-Boot] socfpga cyclone5 dts

2018-10-22 Thread Dalon L Westergreen
On Mon, 2018-10-22 at 22:48 +0200, Simon Goldschmidt wrote: > On 18.10.2018 23:04, Marek Vasut wrote: > > On 10/18/2018 10:20 PM, Simon Goldschmidt wrote: > > > Marek Vasut mailto:marek.va...@gmail.com>> > schrieb am Do., 18. Okt. 2018, 22:15: > > On 10/18/2018 09:28 PM, Simon Goldschmidt

Re: [U-Boot] socfpga cyclone5 dts

2018-10-22 Thread Simon Goldschmidt
On 18.10.2018 23:04, Marek Vasut wrote: On 10/18/2018 10:20 PM, Simon Goldschmidt wrote: Marek Vasut mailto:marek.va...@gmail.com>> schrieb am Do., 18. Okt. 2018, 22:15: On 10/18/2018 09:28 PM, Simon Goldschmidt wrote: > Hi Marek, Hi, > I was playing with updating the dts

Re: [U-Boot] socfpga cyclone5 dts

2018-10-22 Thread Simon Goldschmidt
On 18.10.2018 23:04, Marek Vasut wrote: On 10/18/2018 10:20 PM, Simon Goldschmidt wrote: Marek Vasut mailto:marek.va...@gmail.com>> schrieb am Do., 18. Okt. 2018, 22:15: On 10/18/2018 09:28 PM, Simon Goldschmidt wrote: > Hi Marek, Hi, > I was playing with updating the dts

[U-Boot] socfpga cyclone5 dts

2018-10-18 Thread goldsi...@gmx.de
Hi Marek, I was playing with updating the dts files for cyclone5 (and arria5) from current kernel sources, but I found that the kernel as 4 boards that U-Boot doesn't have and U-Boot has 6 boards that the kernel doesn't have. How should I proceed here? Should I copy new boards from the kernel

Re: [U-Boot] socfpga cyclone5 dts

2018-10-18 Thread Marek Vasut
On 10/18/2018 10:20 PM, Simon Goldschmidt wrote: > > > Marek Vasut mailto:marek.va...@gmail.com>> > schrieb am Do., 18. Okt. 2018, 22:15: > > On 10/18/2018 09:28 PM, Simon Goldschmidt wrote: > > Hi Marek, > > Hi, > > > I was playing with updating the dts files for cyclone5 (and

Re: [U-Boot] socfpga cyclone5 dts

2018-10-18 Thread Simon Goldschmidt
Marek Vasut schrieb am Do., 18. Okt. 2018, 22:15: > On 10/18/2018 09:28 PM, Simon Goldschmidt wrote: > > Hi Marek, > > Hi, > > > I was playing with updating the dts files for cyclone5 (and arria5) from > > current kernel sources, but I found that the kernel as 4 boards that > > U-Boot doesn't hav

Re: [U-Boot] socfpga cyclone5 dts

2018-10-18 Thread Marek Vasut
On 10/18/2018 09:28 PM, Simon Goldschmidt wrote: > Hi Marek, Hi, > I was playing with updating the dts files for cyclone5 (and arria5) from > current kernel sources, but I found that the kernel as 4 boards that > U-Boot doesn't have and U-Boot has 6 boards that the kernel doesn't have. Thanks fo

[U-Boot] socfpga cyclone5 dts

2018-10-18 Thread Simon Goldschmidt
Hi Marek, I was playing with updating the dts files for cyclone5 (and arria5) from current kernel sources, but I found that the kernel as 4 boards that U-Boot doesn't have and U-Boot has 6 boards that the kernel doesn't have. How should I proceed here? Should I copy new boards from the kernel? S