On 23.10.2018 10:54, Marek Vasut wrote:
On 10/23/2018 10:52 AM, Simon Goldschmidt wrote:
[...]
- socfpga_cyclone5_de1_soc.dts
- socfpga_cyclone5_de10_nano.dts
These should be upstream.
But they aren't? Or did you mean "these should be upstreamed"? By whom?
CCing Dinh :-)
[...]
Also, Dinh has enabled the watchdog nearly 4 years ago in
socfpga_cyclone5.dtsi but U-Boot doesn't. Should we keep it enabled or
disable it in the U-Boot specific dts files?
Disable it in board files to keep the current behavior.
Do we enable such things in the "-u-boot.dtsi" "overlay" as well?
Because when adding it to the dts, we end up having diffs again...
Sounds good!
To get the Linux devicetree running on the socrates board, I had to add
the "clock-frequency" property to the uart(s). What's the status here,
socfpga gen5 does not support getting clock rates from the device tree,
is that correct?
If so, I'll put the clock-frequency into the "-u-boot.dtsi" files, as
well. They can be removed once the clock drivers work.
Also, the gpio controllers are now missing the "bank-name" property,
without which they fail to register. Since this property is not even
described in device tree bindings, I chose to add a fallback to the
driver to use 'fdt_get_name()' to get a name. The downside is that
searching a GPIO by bank name might now fail. Is this acceptable? If
not, we'll have to add the "bank-name" properties to the "-u-boot.dtsi"
files as well. But since most gpio drivers seem to do it that way, I
figured it should be OK...
I haven't tested QSPI yet, and I only have access to a SoCrates board,
but aside from some "u-boot,dm-pre-reloc" strings, my "-u-boot.dtsi"
currently only sets "clock-frequency" for the uarts and disables the
watchdog and everything seems to boot fine so far.
Simon
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