Hello Stefan,
On Mon, Dec 1, 2008 at 8:46 PM, Stefan Roese wrote:
> On Monday 01 December 2008, Leon Woestenberg wrote:
>> >> Now, if I re-program the end-point FPGA during the u-boot boot
>> >> time-out, Linux will recognize the end-point.
>> >
>> > It's possible that either the reset in between
On Monday 01 December 2008, Leon Woestenberg wrote:
> >> Now, if I re-program the end-point FPGA during the u-boot boot
> >> time-out, Linux will recognize the end-point.
> >
> > It's possible that either the reset in between goes bonkers or something
> > else causes your FPGA to stop responding. I
Hello all,
On Mon, Dec 1, 2008 at 9:12 AM, Benjamin Herrenschmidt
<[EMAIL PROTECTED]> wrote:
> On Fri, 2008-11-28 at 13:50 +0100, Leon Woestenberg wrote:
>>
>> AMCC PPC460EX canyonlands board with an FPGA PCIe end point:
>>
>> u-boot sees the end point, but Linux does not:
>>
>> U-Boot 1.3.3-00249
On Fri, 2008-11-28 at 13:50 +0100, Leon Woestenberg wrote:
> Hello,
>
> AMCC PPC460EX canyonlands board with an FPGA PCIe end point:
>
> u-boot sees the end point, but Linux does not:
>
> U-Boot 1.3.3-00249-ga524e11 (Jun 30 2008 - 16:05:51)
> CPU: AMCC PowerPC 460EX Rev. A at 800 MHz (PLB=200,
Hello,
AMCC PPC460EX canyonlands board with an FPGA PCIe end point:
u-boot sees the end point, but Linux does not:
U-Boot 1.3.3-00249-ga524e11 (Jun 30 2008 - 16:05:51)
CPU: AMCC PowerPC 460EX Rev. A at 800 MHz (PLB=200, OPB=100, EBC=100 MHz)
<...>
Board: Canyonlands - AMCC PPC460EX Evaluation
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