On Saturday 16 January 2010 10:48:21 anup behare wrote:
> Thanks Stenfan for your valuable inputs.
>
> I have implemented the code suggested by you after completing the ddr
> initialization :
>
> #if defined(CONFIG_DDR_DATA_EYE)
>/*
> * Running denali_core_search_d
Hi Wolfgnag,
I am apologize for debugging with by passing the previous exception.
I was curious about u-boot prompt.
Now i have implemented the steps suggested by stefan, and debugging the
same.
~Anup
On Thu, Jan 14, 2010 at 3:45 PM, Wolfgang Denk wrote:
> Dear anupbeh...@gmail.com,
>
> In me
Thanks Stenfan for your valuable inputs.
I have implemented the code suggested by you after completing the ddr
initialization :
#if defined(CONFIG_DDR_DATA_EYE)
/*
* Running denali_core_search_data_eye() when ECC is enabled
* causes non-ECC machine c
On Thursday 14 January 2010 10:39:57 anupbeh...@gmail.com wrote:
> now as I am getting u-boot prompt that means DDR initilised properly.
> now I am debuging for trap_init and flash_init().
Could be that your DDR init code somehow generates an exception that is
triggered once trap_init() is called
Dear anupbeh...@gmail.com,
In message <001636ed6c7e8c9189047d1ca...@google.com> you wrote:
>
> We bypass the trap_init call, control enters into the flash_init() in
> cfi_flash.c
...
> to more debug we bypass the hang call for time being and we obtain u-boot
> prompt.
This is random hacking a
One update to you on debuging board_init_r()..
We bypass the trap_init call, control enters into the flash_init() in
cfi_flash.c
I am get following console o/p:
fwrite addr fc00 cmd ff 00ff00ff 64 bit x 32 bit
fwrite addr fc0002a8 cmd 98 00980098 64 bit x 32 bit
is= cmd 51
On Wednesday 13 January 2010 18:43:31 anupbeh...@gmail.com wrote:
> I am using board having ppc440x5 core with customized chip and not a
> standard 440Gx.
>
> Board is using Denali controller, as the register are completely different
> we can not use the standard u-boot initialization.
OK, I see.
I am using board having ppc440x5 core with customized chip and not a
standard 440Gx.
Board is using Denali controller, as the register are completely different
we can not use the standard u-boot initialization.
We performed board specific initialization and training for DDR2.
When the code
[Please keep the list on Cc]
On Wednesday 13 January 2010 08:21:32 anupbeh...@gmail.com wrote:
> I am using denali controller.
> Here we can not use 44x_spd_ddr.c as registers are complitly different, so
> we have implemented sdram.c for doing specific initialization...
This seems wrong. You are
On Tuesday 12 January 2010 11:07:13 anupbeh...@gmail.com wrote:
> I am using PPC440GX and DIMM SDRAM.
OK, so you are using the code cpu/ppc4xx/44x_spd_ddr.c to configure the SDRAM
controller. You should enable DEBUG in this code to see a bit more about the
configuration.
BTW: I suggest you take
I am using PPC440GX and DIMM SDRAM.
On 12-Jan-2010 3:20pm, Stefan Roese wrote:
On Tuesday 12 January 2010 10:09:57 anupbeh...@gmail.com wrote:
> In my case CONFIG_SYS_MONITOR_LEN is 256KB
> and CONFIG_SYS_MONITOR_BASE is 0xfffc
> my destaddr is 0x1ffd5000
>
> so gd->rel
On Tuesday 12 January 2010 10:09:57 anupbeh...@gmail.com wrote:
> In my case CONFIG_SYS_MONITOR_LEN is 256KB
> and CONFIG_SYS_MONITOR_BASE is 0xfffc
> my destaddr is 0x1ffd5000
>
> so gd->reloc_off = destaddr - CONFIG_SYS_MONITOR_BASE;
> so gd->reloc_off = 0x20015000
> also gd->malloc = 0x1fed
In my case CONFIG_SYS_MONITOR_LEN is 256KB
and CONFIG_SYS_MONITOR_BASE is 0xfffc
my destaddr is 0x1ffd5000
so gd->reloc_off = destaddr - CONFIG_SYS_MONITOR_BASE;
so gd->reloc_off = 0x20015000
also gd->malloc = 0x1fed1000
After that it continuously restarts with error machine check exception.
Hi all!
I begin use U-Boot at my custom board based on ppc440x5.
Here is Mem Info that we are using on board:
16MB Nor flash with base address 0xfc00
512MB DDR with base addr 0x
256kb ISRAM with base addr 0xc000
TEXT_BASE 0xfffc
Tlb entries for board is:
tlbentry( 0xff
On Tuesday 12 January 2010 08:02:51 anupbeh...@gmail.com wrote:
> I begin use U-Boot at my custom board based on ppc440x5.
What kind of PPC4xx ist this? PPC440EPx?
> Here is Mem Info that we are using on board:
>
> 16MB Nor flash with base address 0xfc00
> 512MB DDR with base addr 0x000
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