On 17/07/2017 23:39, Adam Ford wrote:
On Mon, Jul 17, 2017 at 3:29 PM, Jean-Jacques Hiblot wrote:
On 14/07/2017 15:18, Adam Ford wrote:
On Thu, Jul 13, 2017 at 2:22 AM, Jean-Jacques Hiblot
wrote:
On 12/07/2017 19:30, Tom Rini wrote:
On Tue, Jul 11, 2017 at 06:20:09PM +0200, Jean-Jacques
On Mon, Jul 17, 2017 at 3:29 PM, Jean-Jacques Hiblot wrote:
>
>
> On 14/07/2017 15:18, Adam Ford wrote:
>>
>> On Thu, Jul 13, 2017 at 2:22 AM, Jean-Jacques Hiblot
>> wrote:
>>>
>>>
>>> On 12/07/2017 19:30, Tom Rini wrote:
On Tue, Jul 11, 2017 at 06:20:09PM +0200, Jean-Jacques Hiblot wro
On 14/07/2017 15:18, Adam Ford wrote:
On Thu, Jul 13, 2017 at 2:22 AM, Jean-Jacques Hiblot wrote:
On 12/07/2017 19:30, Tom Rini wrote:
On Tue, Jul 11, 2017 at 06:20:09PM +0200, Jean-Jacques Hiblot wrote:
This series enables the ADMA present in some OMAP SOCs.
On a DRA7 the performances wh
On Thu, Jul 13, 2017 at 2:22 AM, Jean-Jacques Hiblot wrote:
>
>
> On 12/07/2017 19:30, Tom Rini wrote:
>>
>> On Tue, Jul 11, 2017 at 06:20:09PM +0200, Jean-Jacques Hiblot wrote:
>>
>>> This series enables the ADMA present in some OMAP SOCs.
>>> On a DRA7 the performances when reading from the eMMC
On 12/07/2017 19:30, Tom Rini wrote:
On Tue, Jul 11, 2017 at 06:20:09PM +0200, Jean-Jacques Hiblot wrote:
This series enables the ADMA present in some OMAP SOCs.
On a DRA7 the performances when reading from the eMMC go from 20MB/s
to 40MB/s.
Also while were at it, fix some incorrect bit opera
On Wed, Jul 12, 2017 at 12:30 PM, Tom Rini wrote:
> On Tue, Jul 11, 2017 at 06:20:09PM +0200, Jean-Jacques Hiblot wrote:
>
>> This series enables the ADMA present in some OMAP SOCs.
>> On a DRA7 the performances when reading from the eMMC go from 20MB/s
>> to 40MB/s.
>> Also while were at it, fix
On Tue, Jul 11, 2017 at 06:20:09PM +0200, Jean-Jacques Hiblot wrote:
> This series enables the ADMA present in some OMAP SOCs.
> On a DRA7 the performances when reading from the eMMC go from 20MB/s
> to 40MB/s.
> Also while were at it, fix some incorrect bit operations
>
> This is the first seri
This series enables the ADMA present in some OMAP SOCs.
On a DRA7 the performances when reading from the eMMC go from 20MB/s
to 40MB/s.
Also while were at it, fix some incorrect bit operations
This is the first series of 3 which wille enable HS200 and UHS on the omap5
platforms (dra7 and am57).
T
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