Prafulla Wadaskar wrote:
> Hi Tom
>
> Please pull
>
> The following changes since commit 21e0b054c4285f7a497ac4510acf0ae90a28eae0:
> Tom Rix (1):
> ARM Update mach-types.h
>
> are available in the git repository at:
>
> u-boot-marvell.git on next branch ..BRANCH.NOT.VERIFIED..
>
>
On Fri, 16 Oct 2009 13:09:15 -0400
Mark Asselstine wrote:
> The SheevaPlug DevKit is shipped with 4x8 by 1Gb DDR devices in
> two banks for a total of 512MB of RAM. Based on this configuration
> the existing values for SDRAM address control register are incorrect
> -DATA 0xFFD01410 0x0099
On Sunday 18 October 2009 16:11:11 Tom wrote:
> Mark Asselstine wrote:
> > The SheevaPlug DevKit is shipped with 4x8 by 1Gb DDR devices in
> > two banks for a total of 512MB of RAM. Based on this configuration
> > the existing values for SDRAM address control register are incorrect
> > and result i
Mark Asselstine wrote:
> The SheevaPlug DevKit is shipped with 4x8 by 1Gb DDR devices in
> two banks for a total of 512MB of RAM. Based on this configuration
> the existing values for SDRAM address control register are incorrect
> and result in random kernel oops as memory is incorrectly accessed
>
The SheevaPlug DevKit is shipped with 4x8 by 1Gb DDR devices in
two banks for a total of 512MB of RAM. Based on this configuration
the existing values for SDRAM address control register are incorrect
and result in random kernel oops as memory is incorrectly accessed
(while for example extracting a
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