d/nand/raw/octeontx_bch.h
delete mode 100644 drivers/mtd/nand/raw/octeontx_bch_regs.h
delete mode 100644 drivers/mtd/nand/raw/octeontx_nand.c
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
mich...@amarulasolutions.com
_
> Read speed: 3752kiB/s
>
> Signed-off-by: Miquel Raynal
> ---
> Changes in v2:
> * Use an unsigned long as advised by Michael for accounting time.
> ---
> cmd/mtd.c | 15 ++-
> 1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/cmd/mt
00644 drivers/mtd/nand/raw/octeontx_bch.c
> delete mode 100644 drivers/mtd/nand/raw/octeontx_bch.h
> delete mode 100644 drivers/mtd/nand/raw/octeontx_bch_regs.h
> delete mode 100644 drivers/mtd/nand/raw/octeontx_nand.c
>
>
Reviewed-by: Michael Trimarchi
diff --git a/drivers/mtd
> drivers/mtd/nand/raw/Makefile | 1 -
> drivers/mtd/nand/raw/lpc32xx_nand_slc.c| 587 -
> 4 files changed, 2 insertions(+), 614 deletions(-)
> delete mode 100644 drivers/mtd/nand/raw/lpc32xx_nand_slc.c
>
>
Reviewed-By: Michael Trimarchi
r_err("pxa3xx driver supports single CS only\n");
> + kfree(pdata);
> return -EINVAL;
> }
>
Reviewed-by: MIchael Trimarchi
>
>
> --
> 2.39.5
>
>
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M.
L);
> + if (err)
> goto err_free_buffers;
>
> - if (mxs_nand_setup_ecc(mtd))
> + err = mxs_nand_setup_ecc(mtd);
> + if (err)
> goto err_free_buffers;
>
> nand->ecc.read_page = mxs_nand_ecc_read_page;
>
>
Reviewed-
time_left) {
> - dev_err(denali->dev, "timeout while waiting for irq
> 0x%x\n",
> - irq_mask);
> - return 0;
> - }
> -
> - return denali->irq_status;
> + dev_err(denali->dev, "timeout while
CA_DMA_DESC_NUM));
> + if (!info->rx_desc) {
> printf("Fail to alloc DMA descript!\n");
> kfree(info->tx_desc);
> return -ENOMEM;
>
>
Reviewed-by: Michael Trimarchi
>
gt;
> ret = sunxi_nand_ecc_init(mtd, &nand->ecc);
> if (ret) {
> dev_err(dev, "ECC init failed: %d\n", ret);
> + kfree(chip);
> return ret;
> }
>
> ret = nand_scan_tail(mtd);
> if
gt; -{
> - struct mxic_nand_ctrl *nfc = dev_get_priv(dev);
> - struct nand_chip *nand_chip = &nfc->nand_chip;
> - struct mtd_info *mtd;
> - ofnode child;
> - int err;
> -
> - nfc->regs = dev_read_addr_ptr(dev);
> -
> - n
have
limited size that does not allow to have all the TI ecosystem on boot
partition and then you must use the the rest of emmc. Booting from this
scenario is totally fine
Michael
>
>
> Thanks for the fix,
> Anshul
>
Enable the clock framework on the m2b platform as was done
in m2 variant. This helps to increase the NAND controller performance.
Signed-off-by: Michael Trimarchi
---
configs/imx6ulz_smm_m2b_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/imx6ulz_smm_m2b_defconfig
b
Add the configuration that allow to reset the board from reset
cmd
Signed-off-by: Michael Trimarchi
---
configs/imx6ulz_smm_m2b_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/imx6ulz_smm_m2b_defconfig
b/configs/imx6ulz_smm_m2b_defconfig
index 3d7530431fd..36f5922ea10
Hi
On Fri, Jul 4, 2025 at 3:33 PM Fabio Estevam wrote:
>
> Hi Michael,
>
> On Fri, Jul 4, 2025 at 5:37 AM Michael Nazzareno Trimarchi
> wrote:
>
> > We have problems that our board crashes with display enabled when this
> > series is applied but we can boot
> &g
223
> >> ++-
> >> common/board_r.c | 247
> >> +++-------
> >> include/initcall.h| 49 +++---
> >> lib/Makefile | 1 -
> &g
int do_mtd_io(struct cmd_tbl *cmdtp, int flag,
> int argc,
> io_op.oobbuf += io_op.oobretlen;
> }
>
> + if (benchmark && bench_start) {
> + bench_end = timer_get_us();
> + printf("%s speed: %lukiB/s\n",
> +
Hi Fabio
Are you going to pick up my last series?
Michael
On Mon, May 26, 2025 at 10:01 PM Michael Nazzareno Trimarchi
wrote:
>
> Hi Fabio
>
> On Mon, May 26, 2025 at 9:58 PM Fabio Estevam wrote:
> >
> > Hi Michael,
> >
> > On Mon, May 26, 2025 at
then we add more. But given all of the other options we
> have in common/spl/Kconfig right now for NAND, I'm unclear about what is
> missing today.
I have already rejected this patch for this specific option, because
you can always select and
this board or family are the only consumer
gned s64 variable.
Also I've just noticed, that env/sf.c uses ulong to store ENV_OFFSET.
-michael
just found your reply by accident.
-michael
n.
Introduce a new boolean kconfig option to switch on the "relative to the
end" behavior.
Signed-off-by: Michael Walle
---
v2:
- made the Kconfig help text clearer on MMC hardware partitions.
I've used the term "MMC hardware partition" as it was already
used in s
Hi
On Wed, Jun 4, 2025 at 8:48 AM Michael Nazzareno Trimarchi
wrote:
>
> Hi Patrice
>
> On Wed, Jun 4, 2025 at 8:46 AM Patrice CHOTARD
> wrote:
> >
> >
> >
> > On 6/4/25 08:14, Michael Nazzareno Trimarchi wrote:
> > > Hi
> > >
> >
Hi Patrice
On Wed, Jun 4, 2025 at 8:46 AM Patrice CHOTARD
wrote:
>
>
>
> On 6/4/25 08:14, Michael Nazzareno Trimarchi wrote:
> > Hi
> >
> > On Wed, Jun 4, 2025 at 8:02 AM Patrice CHOTARD
> > wrote:
> >>
> >>
> >>
> >&g
nline bool clk_dev_binded(struct clk *clk)
> > {
> > return false;
> > }
> > +
> > +static inline ulong clk_get_id(const struct clk *clk)
> > +{
> > + return 0;
> > +}
> > #endif /* CONFIG_IS_ENABLED(CLK) */
> >
> > /**
>
s for
selective inclusion of the desired memory components.
Signed-off-by: Michael Trimarchi
---
Changes in v3:
- Fix typo in MAINTAINERS
- Pipeline
https://dev.azure.com/u-boot/u-boot/_build/results?buildId=11274&view=results
Changes in v2:
- Ajust commit message and kconfig
- Add MAINTAINERS e
Hi
Il ven 30 mag 2025, 20:14 Christoph Niedermaier <
cniederma...@dh-electronics.com> ha scritto:
> Hello,
>
> From: Michael Nazzareno Trimarchi
> Sent: Friday, May 30, 2025 5:12 PM
> Subject: Re: [PATCH v3 1/4] clk: imx: add i.MX6UL clk driver
>
> [...]
>
&
Add i.MX6UL clk driver for i.MX6UL CLK driver model usage
Reviewed-by: Peng Fan
Reviewed-by: Christoph Niedermaier
Tested-by: Christoph Niedermaier
Signed-off-by: Michael Trimarchi
---
Changes in v4:
- Fix Kconfig typo
- Fix IPG clock duplication
- Add space for consistency in block
- and
The clock driver allows to boost the NAND performance
controller. Make changes to let it use the new clock driver
=> time nand read ${loadaddr} kernel
NAND read: device 0 offset 0x50, size 0x80
8388608 bytes read: OK
time: 0.488 seconds
Signed-off-by: Michael Trimarchi
---
Chan
Enable the clock framework on the m2 platform.
This helps to increase the NAND controller performance.
Signed-off-by: Michael Trimarchi
---
Changes in v4:
- None
Changes in v3:
- None
Changes in v2:
- Ajust commit message
- drop CONFIG_DM_MTD selected already by MXS_NAND_DT
configs
Make simple the clock registration and enable and allow later
to add support for other platforms
Signed-off-by: Michael Trimarchi
---
Changes in v4:
- None
Changes in v3:
- None
Changes in v2:
- no changes
drivers/mtd/nand/raw/mxs_nand_dt.c | 48 --
1 file
Hi
On Fri, May 30, 2025 at 4:46 PM Christoph Niedermaier
wrote:
>
> Hello,
>
First of all, thank you very much. Resend is not a problem. I'm
doing other things in parallel, so I was not pay attention properly
> From: Michael Trimarchi
> Sent: Thursday, May 29, 2025 7:10 AM
The clock driver allows to boost the NAND performance
controller. Make changes to let it use the new clock driver
=> time nand read ${loadaddr} kernel
NAND read: device 0 offset 0x50, size 0x80
8388608 bytes read: OK
time: 0.488 seconds
Signed-off-by: Michael Trimarchi
---
Chan
Enable the clock framework on the m2 platform.
This helps to increase the NAND controller performance.
Signed-off-by: Michael Trimarchi
---
Changes in v3:
- None
Changes in v2:
- Ajust commit message
- drop CONFIG_DM_MTD selected already by MXS_NAND_DT
configs/imx6ulz_smm_m2_defconfig | 2
Make simple the clock registration and enable and allow later
to add support for other platforms
Signed-off-by: Michael Trimarchi
---
Changes in v3:
- None
Changes in v2:
- no changes
drivers/mtd/nand/raw/mxs_nand_dt.c | 48 --
1 file changed, 5 insertions(+), 43
Add i.MX6UL clk driver for i.MX6UL CLK driver model usage
Reviewed-by: Peng Fan
Signed-off-by: Michael Trimarchi
---
Changes in v3:
- Add all uarts definition
- Move OSC on top suggested
- Drop an invalid clock definition
- Move some pll before they are referenced
Changes in v2:
- None
Hi
On Wed, May 28, 2025 at 8:12 PM Christoph Niedermaier
wrote:
>
> From: U-Boot On Behalf Of Michael Trimarchi
> Sent: Monday, May 26, 2025 9:48 PM
>
> Hello,
>
> > Subject: [PATCH v2 1/4] clk: imx: add i.MX6UL clk driver
> >
> > Add i.MX6UL clk drive
s for
selective inclusion of the desired memory components.
Signed-off-by: Michael Trimarchi
---
Changes in v2:
- Ajust commit message and kconfig
- Add MAINTAINERS entry just for configuration file
board/bsh/imx6ulz_smm_m2/Kconfig | 21 +++
board/bsh/imx6ulz_smm_m2/MAINTAINERS
:mailto:korg.su...@gmail.com
ATTENDEE;CUTYPE=INDIVIDUAL;ROLE=REQ-PARTICIPANT;PARTSTAT=ACCEPTED;RSVP=TRUE
;CN=Michael Nazzareno Trimarchi;X-NUM-GUESTS=0:mailto:michael@amarulasoluti
ons.com
ATTENDEE;CUTYPE=INDIVIDUAL;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=
TRUE;CN=s...@chromium.org;X-NUM-GUESTS=0
:mailto:korg.su...@gmail.com
ATTENDEE;CUTYPE=INDIVIDUAL;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=
TRUE;CN=Michael Nazzareno Trimarchi;X-NUM-GUESTS=0:mailto:michael@amarulaso
lutions.com
ATTENDEE;CUTYPE=INDIVIDUAL;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=
TRUE;CN=s...@chromium.org;X-NUM
s for
selective inclusion of the desired memory components
Signed-off-by: Michael Trimarchi
---
board/bsh/imx6ulz_smm_m2/Kconfig | 21 +++
board/bsh/imx6ulz_smm_m2/Makefile | 4 +-
board/bsh/imx6ulz_smm_m2/ddr3l_timing_128m.c | 1 +
.../imx6ulz_smm_m2/ddr3l_timing_128m_
Hi Fabio
On Mon, May 26, 2025 at 9:58 PM Fabio Estevam wrote:
>
> Hi Michael,
>
> On Mon, May 26, 2025 at 4:48 PM Michael Trimarchi
> wrote:
> >
> > The clock driver allows to boost the NAND performance
> > controller. Make changes to let it use the new clock
Enable the clock framework on the m2 platform.
This helps to increase the NAND controller performance.
Signed-off-by: Michael Trimarchi
---
Changes in v2:
- Ajust commit message
- drop CONFIG_DM_MTD selected already by MXS_NAND_DT
configs/imx6ulz_smm_m2_defconfig | 2 ++
1 file changed, 2
The clock driver allows to boost the NAND performance
controller. Make changes to let it use the new clock driver
=> time nand read ${loadaddr} kernel
NAND read: device 0 offset 0x50, size 0x80
8388608 bytes read: OK
time: 0.488 seconds
Signed-off-by: Michael Trimarchi
---
Chan
Add i.MX6UL clk driver for i.MX6UL CLK driver model usage
Reviewed-by: Peng Fan
Signed-off-by: Michael Trimarchi
---
Changes in v2:
- Add review tag
drivers/clk/imx/Kconfig | 8 ++
drivers/clk/imx/Makefile | 1 +
drivers/clk/imx/clk-imx6ul.c | 270
Make simple the clock registration and enable and allow later
to add support for other platforms
Signed-off-by: Michael Trimarchi
---
Changes in v2:
- no changes
drivers/mtd/nand/raw/mxs_nand_dt.c | 48 --
1 file changed, 5 insertions(+), 43 deletions(-)
diff
HI Fabio
On Mon, May 26, 2025 at 4:27 PM Fabio Estevam wrote:
>
> On Sun, May 25, 2025 at 9:33 AM Michael Trimarchi
> wrote:
> >
> > The clock driver allow to burst the performance of the nand
>
> allows to boostNAND
>
Ok
> > controller. Make change
Hi Peng
On Mon, May 26, 2025 at 9:42 AM Michael Nazzareno Trimarchi
wrote:
>
> Hi Peng
>
> On Mon, May 26, 2025 at 9:38 AM Michael Nazzareno Trimarchi
> wrote:
> >
> > Hi Peng
> >
> > On Mon, May 26, 2025 at 9:34 AM Peng Fan wrote:
> > >
> &g
Hi Peng
On Mon, May 26, 2025 at 9:34 AM Peng Fan wrote:
>
> On Sun, May 25, 2025 at 02:23:10PM +0200, Michael Trimarchi wrote:
> >Make simple the clock registration and enable and allow later
> >to add support for other platforms
> >
> >Signed-off-by: Michael Tri
Hi Peng
On Mon, May 26, 2025 at 9:38 AM Michael Nazzareno Trimarchi
wrote:
>
> Hi Peng
>
> On Mon, May 26, 2025 at 9:34 AM Peng Fan wrote:
> >
> > On Sun, May 25, 2025 at 02:23:10PM +0200, Michael Trimarchi wrote:
> > >Make simple the clock registration and e
Add i.MX6UL clk driver for i.MX6UL CLK driver model usage
Signed-off-by: Michael Trimarchi
---
drivers/clk/imx/Kconfig | 8 ++
drivers/clk/imx/Makefile | 1 +
drivers/clk/imx/clk-imx6ul.c | 270 +++
3 files changed, 279 insertions(+)
create mode
Allow to use clock framework for the m2 platform. This allow
to have better performance to nand controller
Signed-off-by: Michael Trimarchi
---
configs/imx6ulz_smm_m2_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/imx6ulz_smm_m2_defconfig b/configs
The clock driver allow to burst the performance of the nand
controller. Make changes to let it use the new clock driver
Signed-off-by: Michael Trimarchi
---
drivers/mtd/nand/raw/mxs_nand.c| 12
drivers/mtd/nand/raw/mxs_nand_dt.c | 2 +-
2 files changed, 13 insertions(+), 1
Make simple the clock registration and enable and allow later
to add support for other platforms
Signed-off-by: Michael Trimarchi
---
drivers/mtd/nand/raw/mxs_nand_dt.c | 48 --
1 file changed, 5 insertions(+), 43 deletions(-)
diff --git a/drivers/mtd/nand/raw
Hi Dario
On Tue, May 20, 2025 at 5:07 PM Dario Binacchi
wrote:
>
> From: Michael Trimarchi
>
> When using SPL on i.mx6 we frequently notice some DDR initialization
> mismatches between the SPL code and the non-SPL code.
>
> As the non-SPL code have been tested for long
Hi
On Sat, May 17, 2025 at 10:50 PM Fabio Estevam wrote:
>
> On Sat, May 17, 2025 at 5:46 PM Michael Nazzareno Trimarchi
> wrote:
>
> > > I was on master except this commit
> > >
> > > commit 128d997a8772cc174f38d529d8b25f90b3aa8ad8
> > > Author:
Hi Fabio
On Sat, May 17, 2025 at 10:44 PM Michael Nazzareno Trimarchi
wrote:
>
> Hi
>
> On Sat, May 17, 2025 at 10:28 PM Fabio Estevam wrote:
> >
> > On Sat, May 17, 2025 at 5:15 PM Michael Nazzareno Trimarchi
> > wrote:
> >
> > > Can you pl
Hi
On Sat, May 17, 2025 at 10:28 PM Fabio Estevam wrote:
>
> On Sat, May 17, 2025 at 5:15 PM Michael Nazzareno Trimarchi
> wrote:
>
> > Can you please point me to an example of a tested board?
>
> I have just tested the top-of-tree U-Boot on an imx8mn evk board:
>
>
Hi Fabio
On Sat, May 17, 2025 at 9:56 PM Fabio Estevam wrote:
>
> Hi Michael,
>
> On Thu, May 15, 2025 at 5:12 PM Michael Nazzareno Trimarchi
> wrote:
>
> > The serial is not up at that time so we need to buffer the error and print
> > later. Right now
>
default reset_cpu()")
Signed-off-by: Michael Trimarchi
---
arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi
b/arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi
index c67622821e7..faf596255f1 100644
Add the configuration that allow to reset the board from reset
cmd
Signed-off-by: Michael Trimarchi
---
configs/imx6ulz_smm_m2_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/imx6ulz_smm_m2_defconfig b/configs/imx6ulz_smm_m2_defconfig
index 15a3ec5c627..436bfb78cc2
The node is specified on the parent architecture u-boot.dtsi
file
Signed-off-by: Michael Trimarchi
---
arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi | 4
1 file changed, 4 deletions(-)
diff --git a/arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi
b/arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi
to understand but even we need working boards
> Does the failure come from clk_get_bulk() or clk_enable_bulk()?
>
The serial is not up at that time so we need to buffer the error and print
later. Right now
we are working on other fixes
Michael
>
> Please investigate.
>
--
Mi
boot the kernel anymore (exception).
At a later point i want to lock down the device with enabling the "secure
boot" bios function. I have not worked with secure boot yet. I think i can
only get it working with the fit images (fit signature verification)?
Is this thre right implementation approch?
I am grateful for any advice!
Best regards,
Michael
fset to calculation of imdio.priv to
> fix this.
>
> Fixes: cc4e8af2c552 ("net: fsl_enetc: Split register accessors")
> Signed-off-by: Thomas Schaefer
> Signed-off-by: Heiko Thiery
With the nitpick above:
Reviewed-by: Michael Walle
> ---
>
> But the question th
>
> just curious: Did you have to change .configs for either?
We are using the (arm64) defconfig in linux, so no.
Regarding u-boot, I don't know because we are using our own config
and I had to enable CONFIG_OPTEE there (as well as
CONFIG_OPTEE_SERVICE_DISCOVERY, but that one is default y).
-michael
signature.asc
Description: PGP signature
> https://gist.github.com/uditkumarti/5f90210b23e67cd4eb6d06a024031ee8#file-gistfile1-txt-L1970
I can confirm the TRNG will work on u-boot as well as linux.
Thanks!
-michael
signature.asc
Description: PGP signature
On Wed Apr 9, 2025 at 5:22 PM CEST, Tom Rini wrote:
> On Wed, Apr 09, 2025 at 02:33:08PM +0200, Michael Walle wrote:
> > Hi,
> >
> > > >> The formatting with %pa / %pap behaves like %x, which results in an
> > > >> incorrect value being output. To imp
when needed. For SPL_NET and NET_LWIP it is selected by default.
> >> Then it also supports the formatting with %pm, %pM and %pI4.
> >>
> >> Signed-off-by: Christoph Niedermaier
> >> ---
> >> Cc: Tom Rini
> >> Cc: Simon Glass
> >> Cc: M
}
> + if (size == MTDPART_SIZ_FULL)
> + size = master->size - offset;
>
> part.name = ofnode_read_string(child, "label");
> if (!part.name)
> --
> 2.43.0
>
>
>
Reviewed-by: Michael Tri
Hi
Il lun 7 apr 2025, 22:03 Fabio Estevam ha scritto:
> On Mon, Apr 7, 2025 at 4:58 PM Michael Nazzareno Trimarchi
> wrote:
>
> > Can you review it and pick if needed?
>
> This is not assigned to me in patchwork as it is not i.MX related.
>
> Someone else needs to h
n
omap3 platform
but please point me to some recent board if you know
Michael
M.
>
> On 25-03-2025 16:52, Mike Looijmans wrote:
> > Flash partitions may specify MTDPART_SIZ_FULL (=0) as the size of the
> > partition to indicate "the remainder of the flash". Make t
>
> > list_for_each_entry(child_dev, &clk->dev->child_head,
> sibling_node) {
> > + if (device_get_uclass_id(child_dev) != UCLASS_CLK)
> > + continue;
> > +
> > clkp = dev_get_clk_ptr(child_dev);
> > clk_clea
SUPPORT and
> > > select it by NET or NET_LWIP. If someone needs it,
> > > the pointer output can be enabled, otherwise '?' for
> > > unsupported is output.
> >
> > Yeah I had a similar idea, but I'm not sure if yet another config
> > symbol is worth it. That's up to the maintainer to decide :)
> >
> > In any case, we have a different behavior to what is printed
> > right now, as we drop the fallthrough to %x. Tom? Simon?
>
> A Kconfig symbol that NET||NET_LWIP select seems fine, and fall through
> to printing "?".
Great! Christoph, will you prepare a patch or should I?
-michael
signature.asc
Description: PGP signature
On 31/03/2025 18:31, Christian Kohlschütter wrote:
Whoa! Good eyes, Michael!
What is my Fritzbox doing to my initrd, and why does reverting the commit fix
it?
FWIW, I also have a capture with an ethernet frame from another device on my
network (ARP, ethertype 0x0806), so this is probably the
o me. Thank you for fixing this!
Reviewed-by: Michael Brown
Thanks,
Michael
it by NET or NET_LWIP. If someone needs it,
> the pointer output can be enabled, otherwise '?' for
> unsupported is output.
Yeah I had a similar idea, but I'm not sure if yet another config
symbol is worth it. That's up to the maintainer to decide :)
In any case, we have a different behavior to what is printed
right now, as we drop the fallthrough to %x. Tom? Simon?
-michael
signature.asc
Description: PGP signature
he firmware (including any DMA-capable devices configured by the
firmware) is not permitted to continue to write to this memory after
this point.
Thanks,
Michael
ard guarantee that a closed device is quiescent for DMA, but
it happens to be true for most drivers that I've written over the years.
Thanks,
Michael
past, I vaguely recall
> "complaining" about it on IRC.
Yes, I've stumbled on "%pa" with tiny printf (i.e. in
drivers/pinctrl/pinctrl-single.c) which is printing the very wrong
value, actually :) So printing anything unknown as '?' would really
help here.
-michael
signature.asc
Description: PGP signature
#endif
case 'x':
if (islong) {
num = va_arg(va, unsigned long);
@@ -310,6 +307,8 @@ static int _vprintf(struct printf_info *info, const char
*fmt, va_list va)
case '%':
out(info, '%');
default:
+ out(info, '?');
break;
}
-michael
signature.asc
Description: PGP signature
On 31/03/2025 18:31, Christian Kohlschütter wrote:
Whoa! Good eyes, Michael!
What is my Fritzbox doing to my initrd, and why does reverting the commit fix
it?
FWIW, I also have a capture with an ethernet frame from another device on my
network (ARP, ethertype 0x0806), so this is probably the
relate to the packet you're seeing being written
into random memory locations, sorry. I'll leave it to one of the U-Boot
developers to respond.
Thanks,
Michael
. Add some ifdeffery to guard against
> > that.
> >
> > This will make fastboot over USB work with the new LWIP stack.
> >
> > Signed-off-by: Michael Walle
>
> checkpatch.pl reports some issues with this:
>
> $ ./scripts/checkpatch.pl --strict --u-boot --git
ate || !ecc->correct || !ecc->hwctl) &&
> (!ecc->read_page ||
> @@ -5027,6 +5030,7 @@ int nand_scan_tail(struct mtd_info *mtd)
> ecc->size, mtd->writesize);
> ecc->mode = NAND_ECC_SOFT;
>
> + fa
Hi
Applied and sent the pull request
Would be nice to have sometime board sample to work with
Michael
On Wed, Mar 5, 2025 at 5:05 PM Maniyam, Dinesh
wrote:
>
>
>
>
> *From:* Michael Nazzareno Trimarchi
> *Sent:* Wednesday, 5 March 2025 5:27 pm
> *To:* Maniyam, D
-
> - if (oob_required)
> - meson_nfc_set_user_byte(chip, chip->oob_poi);
> + meson_nfc_set_user_byte(chip, chip->oob_poi);
>
> return meson_nfc_write_page_sub(chip, page, false);
> }
>
Applied and sent already the pull request
Michael
The following changes since commit 15d6518c942f0da13f9a7ceeadbd925c3317ec8d:
ARM: dts: imx: Drop bogus regulator extras on DH i.MX6 DHCOM DRC02
(2025-03-13 15:22:48 -0600)
are available in the Git repository at:
git://source.denx.de:u-boot/custodians/u-boot-nand-flash.git nand-next
for you
oid clk_clean_rate_cache(struct clk *clk)
> clk->rate = 0;
>
> list_for_each_entry(child_dev, &clk->dev->child_head,
> sibling_node) {
> + if (device_get_uclass_id(child_dev) != UCLASS_CLK)
> + continue;
> +
>
n.
Introduce a new boolean kconfig option to switch on the "relative to the
end" behavior.
Signed-off-by: Michael Walle
---
env/Kconfig | 42 +-
env/mmc.c | 8
2 files changed, 33 insertions(+), 17 deletions(-)
diff --git a/env/Kc
from a '#define' to a kconfig
> > option.
> >
> > Introduce a new boolean kconfig option to switch on the "relative to the
> > end" behavior.
> >
> > Signed-off-by: Michael Walle
> > ---
> > env/Kconfig | 42 ++
Sorry this should have been individual patches. Please read the subject
as
"[PATCH 1/1]" or just "[PATCH]".
-michael
Sorry this should have been individual patches. Please read the subject
as
"[PATCH 1/1]" or just "[PATCH]".
-michael
Sorry this should have been individual patches. Please read the subject
as
"[PATCH 1/1]" or just "[PATCH]".
-michael
The help text has a newline at the end which will lead to an empty
line after the tftpboot when printing the help overview. Remove it.
Fixes: 4d4d7838127e ("net: lwip: add TFTP support and tftpboot command")
Signed-off-by: Michael Walle
---
cmd/net-lwip.c | 2 +-
1 file changed, 1
make fastboot over USB work with the new LWIP stack.
Signed-off-by: Michael Walle
---
Alternatively, we could add the defines and stub functions to the lwip
header.
---
cmd/fastboot.c | 4
drivers/fastboot/Kconfig | 1 -
drivers/fastboot/fb_common.c | 4
3 files chang
Hi
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
mich...@amarulasolutions.com
__
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
i...@amarulasolutions.com
www.amarulasolutions.com
-nand-flash/-/commits/nand-next?ref_type=heads
Michael
On Wed, Feb 26, 2025 at 5:36 PM Maniyam, Dinesh
wrote:
>
>
> > -Original Message-
> > From: Maniyam, Dinesh
> > Sent: Wednesday, 26 February 2025 11:37 am
> > To: 'Michael Nazzareno Trimarchi
Hi
On Mon, Mar 3, 2025 at 1:54 PM Adam Ford wrote:
> On Mon, Mar 3, 2025 at 6:34 AM Michael Nazzareno Trimarchi
> wrote:
> >
> > Hi Adam
> >
> > On Sun, Mar 2, 2025 at 5:53 PM Adam Ford wrote:
> >>
> >> The ECSPI clock has the ability to se
cspi_root", "pll3_60m", base + 0x38, 19,
> 6));
> -
> + if (clk_on_imx6qp()) {
> + clk_dm(IMX6QDL_CLK_ECSPI_ROOT,
> + imx_clk_divider("ecspi_root", "ecspi_sel", base +
> 0x38, 19, 6));
> + } else {
> +
Hi
On Fri, Feb 28, 2025 at 5:02 AM Maniyam, Dinesh
wrote:
>
>
>
> > -Original Message-
> > From: Michael Nazzareno Trimarchi
> > Sent: Friday, 28 February 2025 5:30 am
> > To: Maniyam, Dinesh
> > Cc: u-boot@lists.denx.de; Marek ; Simon
> > ;
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