Hi
On Sat, May 17, 2025 at 10:50 PM Fabio Estevam <feste...@gmail.com> wrote:
>
> On Sat, May 17, 2025 at 5:46 PM Michael Nazzareno Trimarchi
> <mich...@amarulasolutions.com> wrote:
>
> > > I was on master except this commit
> > >
> > > commit 128d997a8772cc174f38d529d8b25f90b3aa8ad8
> > > Author: Jonas Karlman <jo...@kwiboo.se>
> > > Date: Sat May 10 15:32:01 2025 +0000
> > >
> > > clk: Fix clk_set_parent() regression
> > >
> > > The commit ac30d90f3367 ("clk: Ensure the parent clocks are enabled
> > > while reparenting") add a call to clk_enable() for the parent clock.
> > >
> > > For clock drivers that do not implement the enable() ops, like most
> > > Rockchip clock drivers, this now cause the set_parent() ops to never
> > > be called when CLK_CCF=n (default for Rockchip).
>
> CLK_CCF=y in your case, so this does not help for you.
> >
> > BTW is really needed now?
> >
> > git grep init_uart_clk board/freescale/imx8mn_evk/
> > board/freescale/imx8mn_evk/spl.c: init_uart_clk(1);
>
> This can be removed. I tested without this line, and it boots fine.
Are you sending a patch? or I will send it
Michael
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Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
mich...@amarulasolutions.com
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