Hi I have pushed a rebase of your patches on nand-next on my tree
I have dropped one patch for SPL_FRAMEWORK, drop the same in config of the board. Move the config on the board as last patch, adjust one patch for a code style kisses and push here https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/commits/nand-next?ref_type=heads Michael On Wed, Feb 26, 2025 at 5:36 PM Maniyam, Dinesh <dinesh.mani...@intel.com> wrote: > > > > -----Original Message----- > > From: Maniyam, Dinesh > > Sent: Wednesday, 26 February 2025 11:37 am > > To: 'Michael Nazzareno Trimarchi' <mich...@amarulasolutions.com> > > Cc: u-boot@lists.denx.de; Marek <ma...@denx.de>; Simon > > <simon.k.r.goldschm...@gmail.com>; Tom Rini <tr...@konsulko.com>; Dario > > Binacchi <dario.binac...@amarulasolutions.com>; Johan Jonker > > <jbx6...@gmail.com>; Michal Simek <michal.si...@amd.com>; Arseniy > > Krasnov <avkras...@salutedevices.com>; Alexander Dahl <a...@thorsis.com>; > > William Zhang <william.zh...@broadcom.com>; Igor Prusov > > <ivpru...@salutedevices.com>; Meng, Tingting <tingting.m...@intel.com>; > > Chee, Tien Fong <tien.fong.c...@intel.com>; Hea, Kok Kiang > > <kok.kiang....@intel.com>; Ng, Boon Khai <boon.khai...@intel.com>; > Yuslaimi, > > Alif Zakuan <alif.zakuan.yusla...@intel.com>; Zamri, Muhammad Hazim > Izzat > > <muhammad.hazim.izzat.za...@intel.com>; Lim, Jit Loon > > <jit.loon....@intel.com>; Tang, Sieu Mun <sieu.mun.t...@intel.com> > > Subject: RE: [resend v2 00/19] Add Cadence NAND Driver support > > > > > > > > > -----Original Message----- > > > From: Michael Nazzareno Trimarchi <mich...@amarulasolutions.com> > > > Sent: Saturday, 25 January 2025 6:40 pm > > > To: Maniyam, Dinesh <dinesh.mani...@intel.com> > > > Cc: u-boot@lists.denx.de; Marek <ma...@denx.de>; Simon > > > <simon.k.r.goldschm...@gmail.com>; Tom Rini <tr...@konsulko.com>; > > > Dario Binacchi <dario.binac...@amarulasolutions.com>; Johan Jonker > > > <jbx6...@gmail.com>; Michal Simek <michal.si...@amd.com>; Arseniy > > > Krasnov <avkras...@salutedevices.com>; Alexander Dahl > > > <a...@thorsis.com>; William Zhang <william.zh...@broadcom.com>; Igor > > > Prusov <ivpru...@salutedevices.com>; Meng, Tingting > > > <tingting.m...@intel.com>; Chee, Tien Fong <tien.fong.c...@intel.com>; > > > Hea, Kok Kiang <kok.kiang....@intel.com>; Ng, Boon Khai > > > <boon.khai...@intel.com>; Yuslaimi, Alif Zakuan > > > <alif.zakuan.yusla...@intel.com>; Zamri, Muhammad Hazim Izzat > > > <muhammad.hazim.izzat.za...@intel.com>; Lim, Jit Loon > > > <jit.loon....@intel.com>; Tang, Sieu Mun <sieu.mun.t...@intel.com> > > > Subject: Re: [resend v2 00/19] Add Cadence NAND Driver support > > > > > > Hi Dinesh > > > > > > On Tue, Jan 21, 2025 at 9:39 AM Maniyam, Dinesh > > > <dinesh.mani...@intel.com> > > > wrote: > > > > > > > > Hi Michael, > > > > > > > > Any update on my NAND patchset ?. I can see it is still under review. > > > > Is there anything I can do from my side to speed up the review > process? > > > > Thanks for your time. > > > > > > > > > > Well, last time was not paassing the CI. I will test it again today > > > > > > Michael > > > > > > > Hope you already run the CI test again. > > If failing, may I get the link to the failing list of tests? > > > > Dinesh > > > > Apologies! > I think you mentioned that you were unable to build the code. > I resubmitted v3 of this patchset, which will resolve warning/ > compilation issue. You can look at the cover patch to see > the changes made for v3 in detail. > Please help to use this v3 patchset in running CI test. Please let me know > if you face any difficulties. > Thanks for your time and consideration. > > Dinesh > > > > > > -----Original Message----- > > > > > From: Maniyam, Dinesh > > > > > Sent: Tuesday, 17 December 2024 3:41 pm > > > > > To: Michael Nazzareno Trimarchi <mich...@amarulasolutions.com> > > > > > Cc: u-boot@lists.denx.de; Marek <ma...@denx.de>; Simon > > > > > <simon.k.r.goldschm...@gmail.com>; Tom Rini <tr...@konsulko.com>; > > > > > Dario Binacchi <dario.binac...@amarulasolutions.com>; Johan Jonker > > > > > <jbx6...@gmail.com>; Michal Simek <michal.si...@amd.com>; Arseniy > > > > > Krasnov <avkras...@salutedevices.com>; Alexander Dahl > > > > > <a...@thorsis.com>; William Zhang <william.zh...@broadcom.com>; > > > > > Igor Prusov <ivpru...@salutedevices.com>; Meng, Tingting > > > > > <tingting.m...@intel.com>; Chee, Tien Fong > > > > > <tien.fong.c...@intel.com>; Hea, Kok Kiang > > > > > <kok.kiang....@intel.com>; Ng, Boon Khai <boon.khai...@intel.com>; > > > > > Yuslaimi, Alif Zakuan <alif.zakuan.yusla...@intel.com>; Zamri, > > > > > Muhammad Hazim Izzat <muhammad.hazim.izzat.za...@intel.com>; Lim, > > > > > Jit Loon <jit.loon....@intel.com>; Tang, Sieu Mun > > > > > <sieu.mun.t...@intel.com> > > > > > Subject: RE: [resend v2 00/19] Add Cadence NAND Driver support > > > > > > > > > > > > > > > > > > > > > -----Original Message----- > > > > > > From: Michael Nazzareno Trimarchi <mich...@amarulasolutions.com> > > > > > > Sent: Friday, 13 December 2024 5:16 pm > > > > > > To: Maniyam, Dinesh <dinesh.mani...@intel.com> > > > > > > Cc: u-boot@lists.denx.de; Marek <ma...@denx.de>; Simon > > > > > > <simon.k.r.goldschm...@gmail.com>; Tom Rini > > > > > > <tr...@konsulko.com>; Dario Binacchi > > > > > > <dario.binac...@amarulasolutions.com>; Johan Jonker > > > > > > <jbx6...@gmail.com>; Michal Simek <michal.si...@amd.com>; > > > > > > Arseniy Krasnov <avkras...@salutedevices.com>; Alexander Dahl > > > > > > <a...@thorsis.com>; William Zhang <william.zh...@broadcom.com>; > > > > > > Igor Prusov <ivpru...@salutedevices.com>; Meng, Tingting > > > > > > <tingting.m...@intel.com>; Chee, Tien Fong > > > > > > <tien.fong.c...@intel.com>; Hea, Kok Kiang > > > > > > <kok.kiang....@intel.com>; Ng, Boon Khai > > > > > > <boon.khai...@intel.com>; Yuslaimi, Alif Zakuan > > > > > > <alif.zakuan.yusla...@intel.com>; Zamri, Muhammad Hazim Izzat > > > > > > <muhammad.hazim.izzat.za...@intel.com>; Lim, Jit Loon > > > > > > <jit.loon....@intel.com>; Tang, Sieu Mun > > > > > > <sieu.mun.t...@intel.com> > > > > > > Subject: Re: [resend v2 00/19] Add Cadence NAND Driver support > > > > > > > > > > > > Hi > > > > > > > > > > > > On Thu, Dec 5, 2024 at 10:23 AM <dinesh.mani...@intel.com> > wrote: > > > > > > > > > > > > > > From: Dinesh Maniyam <dinesh.mani...@intel.com> > > > > > > > > > > > > > > This patchset add Cadence NAND driver support for Intel > > > > > > > Agilex5 devices. > > > > > > > > > > > > > > The NAND driver is leveraged from the > > > > > > > cadence-nand-controller.c from Linux version 6.11.2. U-Boot > > > > > > > will support read, write and erase NAND with Cadence driver. > > > > > > > The driver further enhanced in U-Boot to support NAND booting > > > > > > > from FSBL and support boot to kernel via > > > UBIFS. > > > > > > > > > > > > > > Patch status: > > > > > > > Have changes: All patches expect Patch 19 > > > > > > > > > > > > > > Detail changelog can find in commit message. > > > > > > > > > > > > > > v1->v2: > > > > > > > -------- > > > > > > > Patch 1 - 18: > > > > > > > > > > > > > > - remove the "this patch is to" commit phrases > > > > > > > > > > > > > > Patch 4; > > > > > > > - minor refactoring of code to match the stable version 6.11.2. > > > > > > > > > > > > > > Patch 14: > > > > > > > - Add maintainer and "#include" mechanism for new variant > > > > > > > > > > > > > > Patch 16: > > > > > > > - leverage the existing nand_spl_load_image > > > > > > > > > > > > > > > > > > > I have tried to build but it does not work. Have you tested in > github? > > > > > > > > > > > > Michael > > > > > > > > > > Yet to deploy github test on our current platform. > > > > > Only checkpatch.pl and local built has been used as a metric for > > > > > each commit before submission. > > > > > And, all these commits are part of the firmware currently running > > > > > on real hardware. > > > > > > > > > > > > > > > > > > History: > > > > > > > -------- > > > > > > > [v1]: > > > > > > > > https://patchwork.ozlabs.org/project/uboot/cover/20240919035512. > > > > > > > 1385 > > > > > > > 4- > > > > > > > 1-dinesh.mani...@intel.com/ > > > > > > > > > > > > > > Dinesh Maniyam (19): > > > > > > > dt: nand: add cadence nand dt-bindings > > > > > > > arm: dts: agilex5: Enabled cdns-nand dts setting > > > > > > > include: asm: Add support to read/write 64-bit > > > > > > > drivers: mtd: nand: Add driver for Cadence Nand > > > > > > > drivers: mtd: nand: cadence: Add support for read status > command > > > > > > > drivers: mtd: nand: cadence: Add support for readid command > > > > > > > drivers: mtd: nand: cadence: Add support for NAND_CMD_PARAM > > > > > > > drivers: mtd: nand: cadence: Add support for NAND_CMD_RESET > > > > > > > drivers: mtd: nand: cadence: Support cmd SET_FEATURES & > > > GET_FEATURES > > > > > > > drivers: mtd: nand: cadence: Flush & invalidate dma > descriptor > > > > > > > drivers: mtd: nand: cadence: Poll for desc complete status > > > > > > > drivers: mtd: nand: cadence: Use bounce buffer > > > > > > > drivers: nand: Enabled Kconfig and Makefile for cdns-nand > > > > > > > configs: nand2_defconfig: Enable configs for nand boot > > > > > > > drivers: mtd: nand: base: Add support for Hardware ECC for > check bad > > > > > > > block > > > > > > > drivers: mtd: nand: spl: Add support for nand SPL load image > > > > > > > drivers: mtd: nand: Enabled Kconfig and Makefile for > Cadence-SPL > > > > > > > drivers: mtd: nand: Kconfig: Remove SYS_NAND_BLOCK_SIZE > > > dependency > > > > > > > drivers: mtd: nand: Kconfig: Enabled self-init for cdns-nand > > > > > > > SPL > > > > > > > > > > > > > > arch/arm/dts/socfpga_agilex5.dtsi | 14 + > > > > > > > .../arm/dts/socfpga_agilex5_socdk-u-boot.dtsi | 28 + > > > > > > > arch/arm/include/asm/io.h | 25 + > > > > > > > board/intel/agilex5-socdk/MAINTAINERS | 2 + > > > > > > > configs/socfpga_agilex5_nand2_defconfig | 33 + > > > > > > > .../mtd/cadence,nand.yaml | 98 + > > > > > > > drivers/mtd/nand/raw/Kconfig | 19 +- > > > > > > > drivers/mtd/nand/raw/Makefile | 2 + > > > > > > > drivers/mtd/nand/raw/cadence_nand.c | 2424 > > > +++++++++++++++++ > > > > > > > drivers/mtd/nand/raw/cadence_spl.c | 59 + > > > > > > > drivers/mtd/nand/raw/nand_base.c | 71 +- > > > > > > > include/cadence-nand.h | 529 ++++ > > > > > > > include/linux/mtd/rawnand.h | 14 + > > > > > > > 13 files changed, 3293 insertions(+), 25 deletions(-) create > > > > > > > mode > > > > > > > 100644 configs/socfpga_agilex5_nand2_defconfig > > > > > > > create mode 100644 > > > > > > > doc/device-tree-bindings/mtd/cadence,nand.yaml > > > > > > > create mode 100644 drivers/mtd/nand/raw/cadence_nand.c > > > > > > > create mode 100644 drivers/mtd/nand/raw/cadence_spl.c > > > > > > > create mode 100644 include/cadence-nand.h > > > > > > > > > > > > > > -- > > > > > > > 2.19.0 > > > > > > > > > > > > > > > > > > > > > > > > > -- > > > > > > Michael Nazzareno Trimarchi > > > > > > Co-Founder & Chief Executive Officer M. +39 347 913 2170 > > > > > > mich...@amarulasolutions.com > > __________________________________ > > > > > > > > > > > > Amarula Solutions BV > > > > > > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 > > > > > > 9172 i...@amarulasolutions.com www.amarulasolutions.com > > > > > > > > > > > > -- > > > Michael Nazzareno Trimarchi > > > Co-Founder & Chief Executive Officer > > > M. +39 347 913 2170 > > > mich...@amarulasolutions.com > > > __________________________________ > > > > > > Amarula Solutions BV > > > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 > > > i...@amarulasolutions.com www.amarulasolutions.com > -- Michael Nazzareno Trimarchi Co-Founder & Chief Executive Officer M. +39 347 913 2170 mich...@amarulasolutions.com __________________________________ Amarula Solutions BV Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 i...@amarulasolutions.com www.amarulasolutions.com
