From: Ken Ma
Add a uclass which provides access to MDIO busses and includes
operations required by MDIO.
The implementation is based on the existing mii/phy/mdio data
structures and APIs.
This patch also adds device tree binding for MDIO bus.
Signed-off-by: Ken Ma
Reviewed-by: s...@chromium.org
From: Ken Ma
This patch adds a separate driver for the MDIO interface of the
Marvell Ethernet controllers based on driver model. There are two
reasons to have a separate driver rather than including it inside
the MAC driver itself:
*) The MDIO interface is shared by all Ethernet ports, so a dri
From: Ken Ma
Changes in v4:
- Minor updates for comments and Maintainer.
- Use wait_for_bit_le32() instead of implementing private busy wait
polling function.
Changes in v3:
- Move mdio uclass implementation to driver/net folder;
- Replace flat-tree functions with livetree functions and upda
From: Ken Ma
Add a uclass which provides access to MDIO busses and includes
operations required by MDIO.
The implementation is based on the existing mii/phy/mdio data
structures and APIs.
This patch also adds device tree binding for MDIO bus.
Signed-off-by: Ken Ma
Reviewed-by: s...@chromium.org
From: Ken Ma
This patch adds a separate driver for the MDIO interface of the
Marvell Ethernet controllers based on driver model. There are two
reasons to have a separate driver rather than including it inside
the MAC driver itself:
*) The MDIO interface is shared by all Ethernet ports, so a dri
From: Ken Ma
Changes in v3:
- Move mdio uclass implementation to driver/net folder;
- Replace flat-tree functions with livetree functions and update codes
and comments to be consistent with driver-model codes style;
- Put struct mii_dev to uclass platdata to avoid the mdio alloc and
let dri
From: Ken Ma
This patch adds a separate driver for the MDIO interface of the
Marvell Ethernet controllers based on driver model. There are two
reasons to have a separate driver rather than including it inside
the MAC driver itself:
*) The MDIO interface is shared by all Ethernet ports, so a dri
From: Ken Ma
Add a uclass which provides access to MDIO busses and includes
operations required by MDIO.
The implementation is based on the existing mii/phy/mdio data
structures and APIs.
This patch also adds evice tree binding for MDIO bus.
Signed-off-by: Ken Ma
Reviewed-by: s...@chromium.org,
From: Ken Ma
Changes in v3:
- Move mdio uclass implementation to driver/net folder;
- Replace flat-tree functions with livetree functions and update codes
and comments to be consistent with driver-model codes style;
- Put struct mii_dev to uclass platdata to avoid the mdio alloc and
let dri
From: Ken Ma
Changes in v2:
- Fix error printing:
- Change some debug to pr_err;
- mii bus has no parent member and it is not a udevice, so dev_err
is changed to pr_err for mii bus error printings.
Ken Ma (2):
dm: mdio: add a uclass for MDIO
mdio: add marvell MDIO driver
MAINTAIN
From: Ken Ma
Add a uclass which provides access to MDIO busses and includes
operations required by MDIO.
The implementation is based on the existing mii/phy/mdio data
structures and APIs.
This patch also adds evice tree binding for MDIO bus.
Signed-off-by: Ken Ma
---
Changes in v2: None
MAIN
From: Ken Ma
This patch adds a separate driver for the MDIO interface of the
Marvell Ethernet controllers based on driver model. There are two
reasons to have a separate driver rather than including it inside
the MAC driver itself:
*) The MDIO interface is shared by all Ethernet ports, so a dri
From: Ken Ma
This patch adds a separate driver for the MDIO interface of the
Marvell Ethernet controllers based on driver model. There are two
reasons to have a separate driver rather than including it inside
the MAC driver itself:
*) The MDIO interface is shared by all Ethernet ports, so a dri
From: Ken Ma
Changes in v2:
- Fix error printing:
- Change some debug to pr_err;
- mii bus has no parent member and it is not a udevice, so dev_err
is changed to pr_err for mii bus error printings.
Ken Ma (2):
dm: mdio: add a uclass for MDIO
mdio: add marvell MDIO driver
MAINTAIN
From: Ken Ma
Add a uclass which provides access to MDIO busses and includes
operations required by MDIO.
The implementation is based on the existing mii/phy/mdio data
structures and APIs.
This patch also adds evice tree binding for MDIO bus.
Signed-off-by: Ken Ma
---
Changes in v2: None
MAIN
From: Ken Ma
Add a uclass which provides access to MDIO busses and includes
operations required by MDIO.
The implementation is based on the existing mii/phy/mdio data
structures and APIs.
This patch also adds evice tree binding for MDIO bus.
Signed-off-by: Ken Ma
---
MAINTAINERS
From: Ken Ma
This patch adds a separate driver for the MDIO interface of the
Marvell Ethernet controllers based on driver model. There are two
reasons to have a separate driver rather than including it inside
the MAC driver itself:
*) The MDIO interface is shared by all Ethernet ports, so a dri
From: Ken Ma
Ken Ma (2):
dm: mdio: add a uclass for MDIO
mdio: add marvell MDIO driver
MAINTAINERS| 2 +
arch/arm/Kconfig | 1 +
doc/device-tree-bindings/mdio/marvell-mdio.txt | 18 ++
doc/device-tree-bindings/mdio/md
From: Ken Ma
Currently mvebu sata driver is in arch/arm/mach_mvebu directory, this
patch moves it to drivers/ata directory with renaming "sata.c" to
"ahci_mvebu.c" which is aligned to Linux.
New ahci driver's kconfig option is added as AHCI_MVEBU which selects
SCSI_AHCI and is based on AHCI.
Sig
From: Ken Ma
These patches move ahci mvebu driver to drivers/ata directory with bug
fixing and scsi supporting.
Changes in v4:
- Base on the latest mainline git version
- Let AHCI_MVEBU depend on AHCI and select SCSI_AHCI
ahci_mvebu driver is based on AHCI UCLASS, so let AHCI_MVEBU based on
AHC
From: Ken Ma
Mvebu AHCI is AHCI driver which uses SCSI under the hood.
This patch adjusts AHCI setup to support SCSI by creating
a SCSI device as a child. Since the functions of creating
SCSI device need the kconfig option DM_SCSI, so let
AHCI_MVEBU select DM_SCSI.
Signed-off-by: Ken Ma
Reviewe
From: Ken Ma
This patch enables the new ahci mvebu driver for marvell arm64 platform
SOCs(A3k and A8k). And since AHCI_MVEBU selects SCSI_AHCI, so
"CONFIG_SCSI_AHCI=y" is removed from those default config files.
Signed-off-by: Ken Ma
Reviewed-by: Stefan Roese
Reviewed-by: Simon Glass
---
Cha
From: David Sniatkiwicz
This workaround was added for A8040/7040 A0.
A8040/7040 A0 is no longer supported so this workaround
can be removed.
Signed-off-by: David Sniatkiwicz
Signed-off-by: Ken Ma
Reviewed-by: Stefan Roese
Reviewed-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
From: Ken Ma
Currently mvebu sata driver is in arch/arm/mach_mvebu directory, this
patch moves it to drivers/ata directory with renaming "sata.c" to
"ahci_mvebu.c" which is aligned to Linux.
New ahci driver's kconfig option is added as AHCI_MVEBU which selects
SCSI_AHCI and is based on AHCI.
Sig
From: Ken Ma
These patches move ahci mvebu driver to drivers/ata directory with bug
fixing and scsi supporting.
Changes in v4:
- Base on the latest mainline git version
- Let AHCI_MVEBU depend on AHCI and select SCSI_AHCI
- Let AHCI_MVEBU select DM_SCSI
- Remove CONFIG_AHCI_MVEBU from marvell a
From: Ken Ma
Mvebu AHCI is AHCI driver which uses SCSI under the hood.
This patch adjusts AHCI setup to support SCSI by creating
a SCSI device as a child. Since the functions of creating
SCSI device need the kconfig option DM_SCSI, so let
AHCI_MVEBU select DM_SCSI.
Signed-off-by: Ken Ma
Reviewe
From: Ken Ma
This patch enables the new ahci mvebu driver for marvell arm64 platform
SOCs(A3k and A8k). And since AHCI_MVEBU selects SCSI_AHCI, so
"CONFIG_SCSI_AHCI=y" is removed from those default config files.
Signed-off-by: Ken Ma
Reviewed-by: Stefan Roese
Reviewed-by: Simon Glass
Since AH
From: David Sniatkiwicz
This workaround was added for A8040/7040 A0.
A8040/7040 A0 is no longer supported so this workaround
can be removed.
Signed-off-by: David Sniatkiwicz
Signed-off-by: Ken Ma
Reviewed-by: Stefan Roese
Reviewed-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
From: Ken Ma
These patches move ahci mvebu driver to drivers/ata directory with bug
fixing and scsi supporting.
Changes in v3:
- Use the new SPDX tags.
David Sniatkiwicz (1):
ata: ahci_mvebu: a8040 a0: remove bad port register offsets
workarounds
Ken Ma (3):
ata: mvebu: move mvebu sat
From: Ken Ma
This patch enables the new ahci mvebu driver for marvell arm64 platform
SOCs(A3k and A8k).
Signed-off-by: Ken Ma
Reviewed-by: Stefan Roese
Reviewed-by: Simon Glass
---
Changes in v3: None
configs/mvebu_db-88f3720_defconfig | 1 +
configs/mvebu_db_armada8k_defconfig
From: Ken Ma
Currently mvebu sata driver is in arch/arm/mach_mvebu directory, this
patch moves it to drivers/ata directory with renaming "sata.c" to
"ahci_mvebu.c" which is aligned to Linux.
New ahci driver's kconfig option is added as AHCI_MVEBU which selects
DM_SCSI.
Signed-off-by: Ken Ma
Rev
From: Ken Ma
Mvebu AHCI is AHCI driver which uses SCSI under the hood.
This patch adjusts AHCI setup to support SCSI by creating
a SCSI device as a child.
Signed-off-by: Ken Ma
Reviewed-by: Stefan Roese
Reviewed-by: Simon Glass
---
Changes in v3: None
drivers/ata/ahci_mvebu.c | 17
From: David Sniatkiwicz
This workaround was added for A8040/7040 A0.
A8040/7040 A0 is no longer supported so this workaround
can be removed.
Signed-off-by: David Sniatkiwicz
Signed-off-by: Ken Ma
Reviewed-by: Stefan Roese
Reviewed-by: Simon Glass
---
Changes in v3: None
drivers/ata/ahci_m
From: Ken Ma
Currently mvebu sata driver is in arch/arm/mach_mvebu directory, this
patch moves it to drivers/ata directory with renaming "sata.c" to
"ahci_mvebu.c" which is aligned to Linux.
New ahci driver's kconfig option is added as AHCI_MVEBU which selects
DM_SCSI.
Signed-off-by: Ken Ma
---
From: Ken Ma
These patches move ahci mvebu driver to drivers/ata directory with bug
fixing and scsi supporting.
Changes in v2:
- Add MAINTAINERS updating
David Sniatkiwicz (1):
ata: ahci_mvebu: a8040 a0: remove bad port register offsets
workarounds
Ken Ma (3):
ata: mvebu: move mvebu s
From: Ken Ma
This patch enables the new ahci mvebu driver for marvell arm64 platform
SOCs(A3k and A8k).
Signed-off-by: Ken Ma
---
Changes in v2: None
configs/mvebu_db-88f3720_defconfig | 1 +
configs/mvebu_db_armada8k_defconfig | 1 +
configs/mvebu_espressobin-88f3720_defcon
From: Ken Ma
Mvebu AHCI is AHCI driver which uses SCSI under the hood.
This patch adjusts AHCI setup to support SCSI by creating
a SCSI device as a child.
Signed-off-by: Ken Ma
---
Changes in v2: None
drivers/ata/ahci_mvebu.c | 17 -
1 file changed, 16 insertions(+), 1 deleti
From: David Sniatkiwicz
This workaround was added for A8040/7040 A0.
A8040/7040 A0 is no longer supported so this workaround
can be removed.
Signed-off-by: David Sniatkiwicz
Signed-off-by: Ken Ma
---
Changes in v2: None
drivers/ata/ahci_mvebu.c | 8
1 file changed, 8 deletions(-)
From: Ken Ma
Currently mvebu sata driver is in arch/arm/mach_mvebu directory, this
patch moves it to drivers/ata directory with renaming "sata.c" to
"ahci_mvebu.c" which is aligned to Linux.
New ahci driver's kconfig option is added as AHCI_MVEBU which selects
DM_SCSI.
Signed-off-by: Ken Ma
Cc:
From: Ken Ma
This patch enables the new ahci mvebu driver for marvell arm64 platform
SOCs(A3k and A8k).
Signed-off-by: Ken Ma
Cc: Simon Glass
Cc: Stefan Roese
---
configs/mvebu_db-88f3720_defconfig | 1 +
configs/mvebu_db_armada8k_defconfig | 1 +
configs/mvebu_espressobin-8
From: David Sniatkiwicz
This workaround was added for A8040/7040 A0.
A8040/7040 A0 is no longer supported so this workaround
can be removed.
Signed-off-by: David Sniatkiwicz
Signed-off-by: Ken Ma
Cc: Simon Glass
Cc: Stefan Roese
---
drivers/ata/ahci_mvebu.c | 8
1 file changed, 8 d
From: Ken Ma
Mvebu AHCI is AHCI driver which uses SCSI under the hood.
This patch adjusts AHCI setup to support SCSI by creating
a SCSI device as a child.
Signed-off-by: Ken Ma
Cc: Simon Glass
Cc: Stefan Roese
---
drivers/ata/ahci_mvebu.c | 17 -
1 file changed, 16 insertions
From: Ken Ma
These patches move ahci mvebu driver to drivers/ata directory with bug fixing
and scsi supporting.
David Sniatkiwicz (1):
ata: ahci_mvebu: a8040 a0: remove bad port register offsets
workarounds
Ken Ma (3):
ata: mvebu: move mvebu sata driver to drivers/ata directory
ata:
quot;Toggle PCIE Reset GPIO ...\n");
+ dm_gpio_set_value(&reset_gpio, 0);
+ mdelay(200);
+ dm_gpio_set_value(&reset_gpio, 1);
+ }
+#else
+ dev_dbg(pcie->dev, "PCIE Reset on GPIO support is missing\n");
+#endif /* CONFIG_DM_GPIO
From: Wilson Ding
Signed-off-by: Wilson Ding
Cc: Simon Glass
Cc: Stefan Roese
Signed-off-by: Ken Ma
---
configs/mvebu_db-88f3720_defconfig | 3 +++
configs/mvebu_espressobin-88f3720_defconfig | 3 +++
2 files changed, 6 insertions(+)
diff --git a/configs/mvebu_db-88f3720_defconfig
From: Ken Ma
Reviewed-on: http://vgitil04.il.marvell.com:8080/43289
Tested-by: iSoC Platform CI
Reviewed-by: Kostya Porotchkin
Reviewed-by: Igal Liberman
Cc: Simon Glass
Cc: Stefan Roese
Signed-off-by: Ken Ma
---
.../pinctrl/marvell,armada-37xx-pinctrl.txt| 186
From: Wilson Ding
This patch enabled PCIe port on both devel-board
and espressobin board.
Cc: Simon Glass
Cc: Stefan Roese
Signed-off-by: Wilson Ding
Signed-off-by: Ken Ma
---
arch/arm/dts/armada-3720-db.dts | 8
arch/arm/dts/armada-3720-espressobin.dts | 7 +++
arch
From: Ken Ma
The commit "arm64: mvebu: Add pinctrl nodes for Armada 3700" has
added new pinctrl nodes.
This reverts commit f7cab0f95b05ec6a66fe4796b9ad44406d0cc864.
Cc: Simon Glass
Cc: Stefan Roese
Signed-off-by: Ken Ma
---
arch/arm/dts/armada-37xx.dtsi | 14 --
1 file changed, 1
From: Wilson Ding
This patch added a new region of 32MiB AT 0xe800.
to Armada37x0's memory map. This region is supposed to
be mapped in MMU in order to enable the access to the
PCI I/O or MEM resources.
Signed-off-by: Wilson Ding
Reviewed-on: http://vgitil04.il.marvell.com:8080/38724
Tested
From: Ken Ma
Pin 23 on South bridge does not belong to the rgmii group. It belongs to
a separate group which can have 3 functions.
Due to this the fix also have to update the way the functions are
managed. Until now each groups used NB_FUNCS(which was 2) functions. For
the mpp23, 3 functions are
From: Ken Ma
Cc: Simon Glass
Cc: Stefan Roese
Signed-off-by: Ken Ma
---
configs/mvebu_db-88f3720_defconfig | 2 ++
configs/mvebu_espressobin-88f3720_defconfig | 2 ++
2 files changed, 4 insertions(+)
diff --git a/configs/mvebu_db-88f3720_defconfig
b/configs/mvebu_db-88f3720_defconf
From: Ken Ma
The below patches introduce aardvark pcie driver and enable pcie for Armada
37xx.
Ken Ma (1):
arm64: a37xx: defconfigs: enable PCI_CMD and E1000 driver
Wilson Ding (4):
arm64: a37xx: populate pcie memory region
arm64: a37xx: pci: add support for aardvark pcie driver
arm64:
From: Ken Ma
This patch corrects below mpp definitions:
- The sdio_sb group is composed of 6 pins and not 5;
- The rgmii group contains pins mpp2[17:6] and not mpp2[19:6];
- Pin of group "pmic0" is mpp1[6] but not mpp1[16];
- Pin of group "pmic1" is mpp1[7] but not mpp1[17];
- A new group "s
From: Ken Ma
For armada_37xx_update_reg(), the parameter offset should be pointer so
that it can be updated, otherwise offset will keep old value, and then
when offset is larger than or equal to 32 the mask calculated by
"BIT(offset)" will be 0 in gpio chip hook functions, it's an error,
this pat
From: Ken Ma
This patch enable the PINCTRL and GPIO support, including the GPIO
command on the Armada 3720 espressobin board.
Reviewed-on: http://vgitil04.il.marvell.com:8080/40746
Tested-by: iSoC Platform CI
Reviewed-by: Wilson Ding
Cc: Simon Glass
Cc: Stefan Roese
Signed-off-by: Ken Ma
--
From: Ken Ma
On the south bridge we have pin from 0 to 29, so it gives 30 pins (and
not 29).
Reviewed-on: http://vgitil04.il.marvell.com:8080/43285
Tested-by: iSoC Platform CI
Reviewed-by: Hua Jing
Cc: Simon Glass
Cc: Stefan Roese
Signed-off-by: Ken Ma
---
drivers/pinctrl/mvebu/pinctrl-arm
From: Ken Ma
Since the new pinctrl/gpio driver is used, so this patch removes
the old board specific pin control settings.
Cc: Simon Glass
Cc: Stefan Roese
Signed-off-by: Ken Ma
---
board/Marvell/mvebu_armada-37xx/board.c | 23 ---
1 file changed, 23 deletions(-)
diff --
From: Ken Ma
This patch corrects below mpp definitions for armada 3720 DB board
and ESPRESSOBin board:
- "smi" pins group is added and "smi" function is set for eth0;
- Now pcie pins are used as gpio to implement PCIe function in
hardware, so "pcie" group function is changed to "gpio".
Reviewe
From: Ken Ma
The number of pins in South Bridge is 30 and not 29. There is a fix for
the driver for the pinctrl, but a fix is also need at device tree level
for the GPIO.
Reviewed-on: http://vgitil04.il.marvell.com:8080/43286
Reviewed-by: Hua Jing
Tested-by: iSoC Platform CI
Cc: Simon Glass
C
From: Ken Ma
Reviewed-on: http://vgitil04.il.marvell.com:8080/40913
Reviewed-by: Wilson Ding
Tested-by: Wilson Ding
Cc: Simon Glass
Cc: Stefan Roese
Signed-off-by: Ken Ma
---
arch/arm/dts/armada-3720-espressobin.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/ar
From: Ken Ma
Add mmc pins, pcie pins and sdio pins definition and do these pins'
configuration for DB board and espressobin board;
Add uart2 pins configuration for DB board.
Reviewed-on: http://vgitil04.il.marvell.com:8080/40914
Reviewed-by: Wilson Ding
Tested-by: Wilson Ding
Cc: Simon Glass
From: Ken Ma
Cc: Simon Glass
Cc: Stefan Roese
Signed-off-by: Ken Ma
---
arch/arm/dts/armada-37xx.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/armada-37xx.dtsi b/arch/arm/dts/armada-37xx.dtsi
index 6902342..75a22de 100644
--- a/arch/arm/dts/armada-37xx.dtsi
+++ b/arch/
From: Ken Ma
The below patches fix new pinctrl driver issues and remove old obsolete pinctrl
implementation for Armada 37xx.
Ken Ma (13):
arm64: a37xx: dts: add gpio head file including
arm64: a37xx: defconfig: Enable PINCTRL and GPIO support for
ESPRESSOBin board
arm64: a37xx: dts: A
From: Ken Ma
If north bridge selection register bit1 is clear, pins [10:8] are for
SDIO0 Resetn, Wakeup, and PDN while if bit1 is set, pins [10:8]are for
GPIO; when bit1 is clear, pin 9 and pin 10 can be used for uart2 RTSn
and CTSn, so bit1 should be added to uart2 group and it must be set
for b
From: Ken Ma
In armada_37xx_gpiochip_register, the return value of fdtdec_get_bool
should be true when gpio-controller is found; current codes makes a
wrong inverse return value judgement, this patch fixes it.
Signed-off-by: Ken Ma
Cc: Stefan Roese
Cc: Kostya Porotchkin
Cc: Gregory CLEMENT
C
From: Ken Ma
*** BLURB HERE ***
Fix 2 armada-37xx pinctrl issues.
Ken Ma (2):
pinctrl: a3700: Fix uart2 group selection register mask
pinctrl: a3700: Fix the issue that gpio controller is registered with
wrong node id
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 7 ---
1 file chan
From: Ken Ma
In armada_37xx_gpiochip_register, the return value of fdtdec_get_bool
should be true when gpio-controller is found; current codes makes a
wrong inverse return value judgement, this patch fixes it.
Signed-off-by: Ken Ma
Cc: Simon Glass
Cc: Stefan Roese
Cc: Michal Simek
Cc: Kostya
From: Ken Ma
If north bridge selection register bit1 is clear, pins [10:8] are for
SDIO0 Resetn, Wakeup, and PDN while if bit1 is set, pins [10:8]are for
GPIO; when bit1 is clear, pin 9 and pin 10 can be used for uart2 RTSn
and CTSn, so bit1 should be added to uart2 group and it must be set
for b
From: Ken Ma
*** BLURB HERE ***
Fix 2 armada37x0 pinctrl issues.
Ken Ma (2):
pinctrl: a3700: Fix uart2 group selection register mask
pinctrl: a3700: Fix the issue that gpio controller is registered with
wrong node id
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 7 ---
1 file chang
From: Ken Ma
- Enable SCSI support in Armada-3700 DB default configuration.
Reviewed-on: http://vgitil04.il.marvell.com:8080/35302
Reviewed-by: Omri Itach
Tested-by: iSoC Platform CI
Reviewed-by: Kostya Porotchkin
Signed-off-by: Ken Ma
Cc: Simon Glass
Cc: Stefan Roese
Cc: Michal Simek
---
From: Ken Ma
- Add mvebu scsi driver which is based on scsi uclass so that
scsi command can work when driver model is enabled for scsi;
- Mvebu scsi is serial attached scsi and act as an add-on host
bus adapter.
Signed-off-by: Ken Ma
Cc: Simon Glass
Cc: Stefan Roese
Cc: Michal Simek
Revi
From: Ken Ma
- When scsi controller acts as a bus, we need to bind its children
scsi devices(scsi hdd, cd, dvd, scanner) to their drivers as spi
controller binds spi flashes, so scsi-uclass's post bind function
calls dm_scan_fdt_dev() to bind scsi subnode devices;
- When scsi controller is
From: Ken Ma
- Add scsi node which acts as a bus for scsi devices, armada3700 has
only 1 scsi interface, so max-id is 1, and the logic unit number is
also 1 for armada3700;
- Since a3700's scsi is sas(serial attached scsi) which is compatible
for sata and sata hard disk is a sas device, so
From: Ken Ma
- Add generic scsi device tree bindings doc, the doc includes:
- Brief introduction for scsi;
- Scsi's properties' introduction;
- Add marvell mvebu scsi binding doc with the example of armada3700
SCSI controller.
Signed-off-by: Ken Ma
Cc: Simon Glass
Cc: Stefan Roese
Cc: M
From: Ken Ma
- For the purpose of accessing peripheral devices through SCSI, the
peripheral devices need to be probed to finish low level
initialization, for example, ahci controller needs to do the ahci
initialization;
- scsi_low_level_init() calling is removed since the detailed scsi low
From: Ken Ma
- The members in scsi_platdata(base, max_lun and max_id) are generic,
so now they are taken from fdt by the uclass_platdata instead of
platdata code upon call to post bind callback.
Signed-off-by: Ken Ma
Cc: Simon Glass
Cc: Stefan Roese
Cc: Michal Simek
Reviewed-on: http://v
From: Ken Ma
*** BLURB HERE ***
1. Move base, max_lun and max_id such scsi generic data from platdata to uclass
plat data;
2. Make scsi compatible for legacy SCSI devices and new SAS controller
- Introduce scsi bus DT node, scsi work as bus and scsi disks, scsi scanner
and sata are
its
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