Hello Yousaf
> -Original Message-
> From: U-Boot On Behalf Of Mian Yousaf
> Kaukab
> Sent: Tuesday, July 21, 2020 8:04 PM
> To: u-boot@lists.denx.de; Rajesh Bhagat ;
> harninder@nxp.com; sudhanshu.gu...@nxp.com
> Cc: prabhakar.kushw...@nxp.com; Andy Tang ; Priyanka
> Jain ; Mian Yous
Thanks Bin,
> -Original Message-
> From: Bin Meng
> Sent: Wednesday, July 10, 2019 9:43 AM
> To: Poonam Aggrwal
> Cc: Alexander Graf ; u-boot@lists.denx.de
> Subject: Re: [U-Boot] Boot Linux using EFI environment from u-boot
>
> On Wed, Jul 10, 2019 at 12:09 PM
Corrected the email address of Alex.
> -Original Message-
> From: U-Boot On Behalf Of Poonam
> Aggrwal
> Sent: Wednesday, July 10, 2019 9:37 AM
> To: Alexander Graf
> Cc: u-boot@lists.denx.de
> Subject: [U-Boot] Boot Linux using EFI environment from u-boot
>
&g
Hello Alex
I am not sure, but it seems it is possible to boot Linux from u-boot using EFI
environment.
So what I intend to do is that without using UEFI , if I can boot Linux and
make EFI variables available for Linux.
Can you please help me on how I can use this configuration.
Many Thanks
Poo
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Chuanhua
> Han
> Sent: Friday, November 23, 2018 2:08 PM
> To: u-boot@lists.denx.de
> Cc: Chuanhua Han
> Subject: [U-Boot] [PATCH] armv8: lx2160a: Modify dspi1 controller intrrupts
> property
>
> This
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Priyanka
> Jain
> Sent: Monday, October 29, 2018 3:01 PM
> To: u-boot@lists.denx.de; York Sun
> Cc: Priyanka Jain ; Pankit Garg
> ; Wasim Khan ; Sriram Dash
>
> Subject: [U-Boot] [PATCH][v2] armv8: lx
Hello Bin,
> -Original Message-
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: Monday, October 22, 2018 9:41 AM
> To: Poonam Aggrwal
> Cc: York Sun ; U-Boot Mailing List
> Subject: Re: [PATCH 1/2] powerpc: t1040: Correct RCW MAC2_GMII_SEL value
>
> Hi Poo
> -Original Message-
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: Monday, October 22, 2018 7:41 AM
> To: York Sun
> Cc: Poonam Aggrwal ; U-Boot Mailing List b...@lists.denx.de>
> Subject: Re: [PATCH 1/2] powerpc: t1040: Correct RCW MAC2_GMII_SEL value
>
Hello Calvin
Please find few comments inline.
Regards
Poonam
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Calvin
> Johnson
> Sent: Monday, October 09, 2017 2:42 PM
> To: u-boot@lists.denx.de
> Cc: joe.hershber...@ni.com; Anji Jagarlmudi
> Subjec
Hello Calvin,
Minor comments below.
Regards
Poonam
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Calvin
> Johnson
> Sent: Monday, October 09, 2017 2:42 PM
> To: u-boot@lists.denx.de
> Cc: joe.hershber...@ni.com; Anji Jagarlmudi
> Subject: [U-Boot]
Hello Bhaskar
Please find feedback below.
Regards
Poonam
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Bhaskar
> Upadhaya
> Sent: Tuesday, November 21, 2017 2:56 PM
> To: u-boot@lists.denx.de
> Cc: Bhaskar Upadhaya
> Subject: [U-Boot] [PATCH v2]
-Original Message-
From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Prabhakar
Kushwaha
Sent: Friday, August 18, 2017 3:53 PM
To: Santan Kumar ; u-boot@lists.denx.de; York Sun
Cc: Priyanka Jain
Subject: Re: [U-Boot] [PATCH 1/1] board/ls2080ardb: Remove
CONFIG_DISPLAY_BO
-Original Message-
From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Ruchika Gupta
Sent: Saturday, May 13, 2017 5:37 AM
To: u-boot@lists.denx.de; sun.y...@nxp.com; Prabhakar Kushwaha
Cc: Ruchika Gupta
Subject: [U-Boot] [PATCH] ARMv8/sec_firmware : Update chosen/kaslr-seed
Hello Marek Vasut
I am working on u-boot 2016.01.
Using a platform with DWC3 USB 3.0 controller.
My objective is to configure the USB in device mode and it gets exposed to an
X86 as a USB mass storage.
The memory exposed would be a SATA disk.
Is it possible to do it via ums command?
I gave it
Crossbars and IDT were not getting configured for Serdes2 protocol
0x9d for B4420.
Signed-off-by: Poonam Aggrwal
Signed-off-by: Shaveta Leekha
---
board/freescale/b4860qds/b4860qds.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/board/freescale/b4860qds
only difference being LC VCO rather than Ring VCO.
Signed-off-by: Poonam Aggrwal
Signed-off-by: Prabhakar Kushwaha
---
arch/powerpc/cpu/mpc85xx/b4860_serdes.c | 29 +
board/freescale/b4860qds/b4860qds.c |2 ++
board/freescale/b4860qds/eth_b4860qds.c |5
Removed LIODNs for RMAN, RIO, 10G. T1040 has 10 QMAN portals so assigned
LIODNs accordingly.
Signed-off-by: Poonam Aggrwal
---
arch/powerpc/cpu/mpc85xx/t1040_ids.c | 36 --
1 files changed, 0 insertions(+), 36 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx
From: Prabhakar Kushwaha
Qixis FPGA has tag data contains image name and build date.
It is helpful to identify the FPGA image precisely.
Signed-off-by: York Sun
Acked-by: Timur Tabi
Signed-off-by: Prabhakar Kushwaha
Signed-off-by: Poonam Aggrwal
---
board/freescale/t4qds/t4qds.c | 11
From: Shaveta Leekha
This function is called by "qixis_reset switch" command and
switch settings are calculated from qixis FPGA registers.
Signed-off-by: York Sun
Signed-off-by: Shaveta Leekha
Signed-off-by: Poonam Aggrwal
---
board/freescale/t4qds/t4qd
From: Shaveta Leekha
This function is called by "qixis_reset switch" command
and switch settings are calculated from FPGA/qixis registers.
Signed-off-by: York Sun
Signed-off-by: Shaveta Leekha
Signed-off-by: Poonam Aggrwal
---
board/freescale/b4860qds/b4860qd
re available.
Signed-off-by: York Sun
Signed-off-by: Shaveta Leekha
Signed-off-by: Poonam Aggrwal
---
board/freescale/common/qixis.c | 47 +--
board/freescale/common/qixis.h |1 +
2 files changed, 36 insertions(+), 12 deletions(-)
diff --git a/board/f
TP_CLUSTER register of orignal SoC
which may not be valid for the personality.
So add initiator type check to find valid cluster.
Signed-off-by: Prabhakar Kushwaha
Signed-off-by: Poonam Aggrwal
---
arch/powerpc/cpu/mpc85xx/cpu_init.c | 30 ++
1 files changed, 22 insert
igned-off-by: Prabhakar Kushwaha
Signed-off-by: Poonam Aggrwal
---
board/freescale/common/qixis.c | 46
board/freescale/common/qixis.h |3 ++
2 files changed, 49 insertions(+), 0 deletions(-)
diff --git a/board/freescale/common/qixis.c b/board/free
cores: 1 cluster with 2 e6500 cores
2. Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster.
3. Single DDRC
4. 2X 4 lane serdes
5. 3 SGMII interfaces
6. no sRIO
7. no 10G
Signed-off-by: Prabhakar Kushwaha
Signed-off-by: Poonam Aggrwal
---
arch/powerpc/cpu/mpc85xx/Makefile
Signed-off-by: Sandeep Singh
Signed-off-by: Poonam Aggrwal
---
Changes in v2: Added Shaveta's, York's, Sandeep's and Prabhakar's signoff.
arch/powerpc/cpu/mpc85xx/b4860_serdes.c | 15 ++
arch/powerpc/include/asm/config_mpc85xx.h |2 +-
drivers/net/fm/b4860.c
From: Prabhakar Kushwaha
Qixis FPGA has tag data contains image name and build date.
It is helpful to identify the FPGA image precisely.
Signed-off-by: York Sun
Acked-by: Timur Tabi
Signed-off-by: Prabhakar Kushwaha
Signed-off-by: Poonam Aggrwal
---
board/freescale/t4qds/t4qds.c | 11
From: Shaveta Leekha
This function is called by "qixis_reset switch" command and
switch settings are calculated from qixis FPGA registers.
Signed-off-by: York Sun
Signed-off-by: Shaveta Leekha
Signed-off-by: Poonam Aggrwal
---
board/freescale/t4qds/t4qd
From: Shaveta Leekha
This function is called by "qixis_reset switch" command
and switch settings are calculated from FPGA/qixis registers.
Signed-off-by: York Sun
Signed-off-by: Shaveta Leekha
Signed-off-by: Poonam Aggrwal
---
board/freescale/b4860qds/b4860qd
re available.
Signed-off-by: York Sun
Signed-off-by: Shaveta Leekha
Signed-off-by: Poonam Aggrwal
---
board/freescale/common/qixis.c | 47 +--
board/freescale/common/qixis.h |1 +
2 files changed, 36 insertions(+), 12 deletions(-)
diff --git a/board/f
cores: 1 cluster with 2 e6500 cores
2. Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster.
3. Single DDRC
4. 2X 4 lane serdes
5. 3 SGMII interfaces
6. no sRIO
7. no 10G
Signed-off-by: Prabhakar Kushwaha
Signed-off-by: Poonam Aggrwal
---
arch/powerpc/cpu/mpc85xx/Makefile
TP_CLUSTER register of orignal SoC
which may not be valid for the personality.
So add initiator type check to find valid cluster.
Signed-off-by: Prabhakar Kushwaha
Signed-off-by: Poonam Aggrwal
---
arch/powerpc/cpu/mpc85xx/cpu_init.c | 30 ++
1 files changed, 22 insert
igned-off-by: Prabhakar Kushwaha
Signed-off-by: Poonam Aggrwal
---
board/freescale/common/qixis.c | 46
board/freescale/common/qixis.h |3 ++
2 files changed, 49 insertions(+), 0 deletions(-)
diff --git a/board/freescale/common/qixis.c b/board/free
Signed-off-by: Sandeep Singh
Signed-off-by: Poonam Aggrwal
---
Changes in v2: Added Shaveta's, York's, Sandeep's and Prabhakar's signoff.
arch/powerpc/cpu/mpc85xx/b4860_serdes.c | 15 ++
arch/powerpc/include/asm/config_mpc85xx.h |2 +-
drivers/net/fm/b4860.c
Wrong pointer was being used to copy code into L2SRAM.
Also removed the unreferenced variable l2srbar.
Signed-off-by: Poonam Aggrwal
---
Thanks Wolfgang and Kumar for identifying the issue.
arch/powerpc/cpu/mpc85xx/cpu_init_early.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions
Signed-off-by: Poonam Aggrwal
Cc: York Sun
---
P1014 processor supports maximum 16bit DDR data width.
Based of: git://git.am.freescale.net/mirrors/u-boot.git (branch, master)
arch/powerpc/cpu/mpc8xxx/ddr/util.c |4 +++-
arch/powerpc/include/asm/fsl_ddr_sdram.h |1 +
2 files changed
Signed-off-by: Poonam Aggrwal
---
Based of: git://git.am.freescale.net/mirrors/u-boot.git (branch, master)
include/configs/P1_P2_RDB.h |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 579abc2..607ebb8
Enables the Intel Pro/1000 PT Gb Ethernet PCI-E Network Adapter configuration
support for P1/P2 RDB.
Signed-off-by: Poonam Aggrwal
---
include/configs/P1_P2_RDB.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
Because the variable was getting defined twice.
Signed-off-by: Poonam Aggrwal
---
include/configs/P1_P2_RDB.h |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 4f72f36..02e5281 100644
--- a/include/configs
Signed-off-by: Vivek Mahajan
---
include/configs/P1_P2_RDB.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 612c669..de8e60b 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -99
Use a slighly larger value of CLK_CTRL for DDR at 667MHz
which fixes random crashes while linux booting.
Applicable for both NAND and NOR boot.
Signed-off-by: Sandeep Gopalpet
Signed-off-by: Poonam Aggrwal
---
board/freescale/p1_p2_rdb/ddr.c |2 +-
1 files changed, 1 insertions(+), 1
This patch enables the eSPI configuration to use
the Spansion Flash on P1 and P2 RDB Platforms
This also enables the Intel Pro/1000 PT Gb Ethernet
PCI-E Network Adapter configuration support
Signed-off-by: Poonam Aggrwal
---
include/configs/P1_P2_RDB.h | 15 +++
1 files changed
- Also modified the code to use io accessors.
Signed-off-by: Poonam Aggrwal
Signed-off-by: Dipen Dudhat
---
Incorporated Wolfgang's comments on earlier patch
board/freescale/p1_p2_rdb/p1_p2_rdb.c | 16 +---
1 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/
Signed-off-by: Dipen Dudhat
Signed-off-by: Poonam Aggrwal
---
board/freescale/p1_p2_rdb/p1_p2_rdb.c | 25 -
1 files changed, 8 insertions(+), 17 deletions(-)
diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c
b/board/freescale/p1_p2_rdb/p1_p2_rdb.c
index 31cdf9a
- Removed RevB, as it was a development stage board.
- From now only RevC and RevD will be supported.
Signed-off-by: Dipen Dudhat
Signed-off-by: Poonam Aggrwal
---
board/freescale/p1_p2_rdb/p1_p2_rdb.c | 25 -
1 files changed, 8 insertions(+), 17 deletions
Signed-off-by: Poonam Aggrwal
Signed-off-by: Kumar Gala
---
board/freescale/p1_p2_rdb/ddr.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/freescale/p1_p2_rdb/ddr.c b/board/freescale/p1_p2_rdb/ddr.c
index 08d3aaa..658347b 100644
--- a/board/freescale/p1_p2_rdb
The data being modified was in NOR flash which caused the crash.
file->board/freescale/p1_p2_rdb/ddr.c
function->fixed_sdram()
Signed-off-by: Poonam Aggrwal
Signed-off-by: Kumar Gala
---
board/freescale/p1_p2_rdb/ddr.c | 16
1 files changed, 8 insertions(+), 8 del
the hardcodings for platforms with onboard
memories and try to use the FSL SPD code for DDR initialization.
Signed-off-by: Poonam Aggrwal
---
based of git://git.am.freescale.net/mirrors/u-boot.git
board/freescale/p1_p2_rdb/ddr.c | 29 -
1 files changed, 24
While in probecpu() UART is still not initialized.
Signed-off-by: Poonam Aggrwal
Acked-by: Kumar Gala
---
applies on git.am.freescale.net/mirrors/u-boot.git
cpu/mpc85xx/cpu.c |4
cpu/mpc86xx/cpu.c |6 ++
cpu/mpc8xxx/cpu.c |6 --
3 files changed, 10 insertions(+), 6
-off-by: Poonam Aggrwal
Signed-off-by: Kumar Gala
---
applies on git.am.freescale.net/mirrors/u-boot.git
cpu/mpc85xx/fdt.c|2 +
cpu/mpc86xx/fdt.c|3 ++
cpu/mpc8xxx/Makefile |1 +
cpu/mpc8xxx/fdt.c| 55 ++
4 files changed, 61
Incase the system is detected with Unknown SVR, let the system boot
with a default value and a proper message.
Now with dynamic detection of SOC properties from SVR, this is necessary
to prevent a crash.
Signed-off-by: Poonam Aggrwal
Signed-off-by: Kumar Gala
---
applies on
Incase the system is detected with Unknown SVR, let the system boot
with a default value and a proper message.
Now with dynamic detection of SOC properties from SVR, this is necessary
to prevent a crash.
Signed-off-by: Poonam Aggrwal
Signed-off-by: Kumar Gala
---
applies on
.
* All the FSL 85xx boards can use it for PCIe initialization.
Signed-off-by: Poonam Aggrwal
Signed-off-by: Kumar Gala
---
- applies on git.denx.de/u-boot-mpc85xx.git branch->next
- next patch following it makes use of this patch for PCIe initialization
on P1&P2 RDB
drivers/pci/fsl_pci
* Added PCIe support for P1 P2 RDB
* Calls the fsl_pci_init_port function to initialize all the PCIe ports
on the board.
Signed-off-by: Poonam Aggrwal
Signed-off-by: Kumar Gala
---
- applies on git.denx.de/u-boot-mpc85xx.git branch->next
- depends on
"[PATCH 1/2] driver/fsl_pc
P2010 - single core variant of P2020
P1011 - Single core variant of P1020
- Also made changes to keep the lists sorted.
Signed-off-by: Poonam Aggrwal
Signed-off-by: Kumar Gala
---
- applies on git.denx.de/u-boot-mpc85xx.git branch->next
cpu/mpc85xx/Makefile|4 +++-
cpu/mpc8
* Added PCIe support for P1 P2 RDB
* Calls the fsl_pci_init_port function to initialize all the PCIe ports
on the board.
Signed-off-by: Poonam Aggrwal
Signed-off-by: Kumar Gala
---
- applies on git.denx.de/u-boot-mpc85xx.git branch->next
board/freescale/p1_p2_rdb/Makefile |1 +
bo
.
Signed-off-by: Poonam Aggrwal
Signed-off-by: Kumar Gala
---
- applies on git.denx.de/u-boot-mpc85xx.git branch->next
drivers/pci/fsl_pci_init.c | 41 +
include/asm-ppc/fsl_pci.h | 26 ++
2 files changed, 67 insertions(+)
P2010 and P1011 are single core variants of P2020 and P1010 respectively.
The board(RDB) will be same.
Signed-off-by: Poonam Aggrwal
Signed-off-by: Kumar Gala
---
applies on http://git.denx.de/u-boot-mpc85xx.git branch->next
Makefile | 10 ++
1 files changed, 10 insertions(+)
P2010 - single core variant of P2020
P1011 - Single core variant of P1020
Signed-off-by: Poonam Aggrwal
Signed-off-by: Kumar Gala
---
- applies on git.denx.de/u-boot-mpc85xx.git branch->next
cpu/mpc85xx/Makefile|2 ++
cpu/mpc8xxx/cpu.c |4
drivers/m
Signed-off-by: Poonam Aggrwal
Signed-off-by: Kumar Gala
---
applies on http://git.denx.de/u-boot-mpc85xx.git branch->next
Makefile |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/Makefile b/Makefile
index f92ef30..337bf89 100644
--- a/Makefile
+++ b/Makef
Signed-off-by: Poonam Aggrwal
Signed-off-by: Kumar Gala
---
applies on http://git.denx.de/u-boot-mpc85xx.git branch->next
include/asm-ppc/config.h |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/asm-ppc/config.h b/include/asm-ppc/config.h
index fd79
The code base adds P1 & P2 RDB platforms support.
The folder and file names can cater to future SOCs of P1/P2 family.
P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series.
Tested following on P2020RDB:
1. eTSECs
2. DDR, NAND, NOR, I2C.
Signed-off-by: Poonam Aggrwal
---
following on P2020RDB:
1. eTSECs(1/2/3)
2. DDR, NAND, NOR, I2C, PCIe, etc
Signed-off-by: Poonam Aggrwal
---
-Based of u-boot version 2009.08-rc1
-Incorporated comments of Wolfgang and Kumar Gala.
-get_mem_size has not been because the board has onboard fixed memory with
pre-known memory size
capabilities.
Also the SOC is pin compatible with P2020
Signed-off-by: Poonam Aggrwal
---
- based of 2009.08-rc1
- depends on the patch
"[PATCH 1/2] Refactored common cpu specific code for 85xx and 86xx into one
file."
- Changes over v1:
Incorporated Wolfgang's comments
cpu/m
messages.
Signed-off-by: Poonam Aggrwal
---
- based of 2009.08-rc1
- depends on the patch
"[PATCH 1/2] Refactored common cpu specific code for 85xx and 86xx into one
file."
- Changes over v1:
Incorporated Wolfgang's comments
common/cmd_mp.c |6 +-
cp
Removed same code pieces from cpu/mpc85xx/cpu.c and cpu/mpc86xx/cpu.c
and moved to cpu/mpc8xxx/cpu.c(new file)
Signed-off-by: Poonam Aggrwal
---
- based of u-boot version 2009.08-rc1
- Changes over v1:
Incorporated Wolfgang's comments
Makefile |2 +
cpu/mpc85xx/
compatible with P2020
Signed-off-by: Poonam Aggrwal
---
- based of 2009.08-rc1
- depends on the patch
"[PATCH] Refactored common cpu specific code for 85xx and 86xx into one file."
cpu/mpc85xx/Makefile|1 +
cpu/mpc8xxx/cpu.c |2 ++
drivers/misc/fsl_law.c
messages.
Signed-off-by: Poonam Aggrwal
---
changes over previous version:
Incorporated Wolfgang's comments
based on version 2009.06
common/cmd_mp.c |6 +-
cpu/mpc85xx/cpu.c | 21 -
cpu/mpc85xx/mp.c |6 +-
cpu/mpc85xx/rele
Removed same code pieces from cpu/mpc85xx/cpu.c and cpu/mpc86xx/cpu.c
and moved to cpu/mpc8xxx/cpu.c(new file)
Signed-off-by: Poonam Aggrwal
---
based on u-boot version 2009.06
Makefile |2 +
cpu/mpc85xx/cpu.c| 70 +-
cpu/mpc86xx/cpu.c
The code base is generic to add more P1_P2 RDB platforms support as and when
required.
The folder and file names are such that they can cater to future SOCs of P1/P2
family.
Tested the following on P2020RDB:
1. eTSECs(1/2/3)
2. DDR, NAND, NOR, I2C etc
Signed-off-by: Poonam Aggrwal
Copyright messages.
Signed-off-by: Poonam Aggrwal
---
common/cmd_mp.c |6 +-
cpu/mpc85xx/cpu.c | 111 ++---
cpu/mpc85xx/mp.c |6 +-
cpu/mpc85xx/release.S | 25 +-
cpu/mpc85xx/speed.c |4
The code base is generic to add more P1_P2 RDB platforms support as and when
required.
The folder and file names are such that they can cater to future SOCs of P1/P2
family.
Tested the following on P2020RDB:
1. eTSECs(1/2/3)
2. DDR, NAND, NOR, I2C etc
Signed-off-by: Poonam Aggrwal
Instead the num of cores is determined dynamically by reading the SVR values.
This can help to use the same u-boot image across the platforms.
Added CONFIG_MAX_CPUS value 8.
Also revamped and corrected few Freescale Copyright messages.
Signed-off-by: Poonam Aggrwal
---
common/cmd_mp.c
These PHYs are on P2020RDB platform.
Also revamped Freescale copyright message in drivers/net/tsec.c.
Signed-off-by: Poonam Aggrwal
---
drivers/net/tsec.c | 52 +++-
1 files changed, 51 insertions(+), 1 deletions(-)
diff --git a/drivers/net
Defining the next two configs allows to switch the serial port from the
console using the setenv stdin and stdout
1. #define CONFIG_SERIAL_MULTI 1 /* Enable both serial ports */
2. #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */
Signed-off-by: Poonam Aggrwal
Signed-off-by: Poonam Aggrwal
---
include/asm-ppc/immap_85xx.h | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index db2bdf0..0efef05 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc
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