Instead the num of cores is determined dynamically by reading the SVR values.
This can help to use the same u-boot image across the platforms.

Added CONFIG_MAX_CPUS value 8.

Also revamped and corrected few Freescale Copyright messages.

Signed-off-by: Poonam Aggrwal <poonam.aggr...@freescale.com>
---
 common/cmd_mp.c               |    8 ++-
 cpu/mpc85xx/cpu.c             |  104 ++++++++++++++++++++++++----------------
 cpu/mpc85xx/mp.c              |    6 +-
 cpu/mpc85xx/release.S         |   25 +++++++++-
 cpu/mpc85xx/speed.c           |    4 +-
 include/asm-ppc/config.h      |    1 +
 include/asm-ppc/global_data.h |    5 ++
 include/asm-ppc/processor.h   |    5 +-
 include/common.h              |    1 +
 include/e500.h                |    6 +--
 lib_ppc/board.c               |    4 +-
 lib_ppc/bootm.c               |    3 +-
 12 files changed, 112 insertions(+), 60 deletions(-)

diff --git a/common/cmd_mp.c b/common/cmd_mp.c
index faa8700..d943832 100644
--- a/common/cmd_mp.c
+++ b/common/cmd_mp.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008 Freescale Semiconductor, Inc.
+ * Copyright (C) 2008-2009 Freescale Semiconductor, Inc. All rights reserved.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -23,6 +23,8 @@
 #include <common.h>
 #include <command.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int
 cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
@@ -34,9 +36,9 @@ cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
        }
 
        cpuid = simple_strtoul(argv[1], NULL, 10);
-       if (cpuid >= CONFIG_NUM_CPUS) {
+       if (cpuid >= gd->cpu->num_cores) {
                printf ("Core num: %lu is out of range[0..%d]\n",
-                               cpuid, CONFIG_NUM_CPUS - 1);
+                               cpuid, gd->cpu->num_cores - 1);
                return 1;
        }
 
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index d88c564..3233cdd 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2004,2007,2008 Freescale Semiconductor, Inc.
+ * Copyright(C) 2004,2007-2009 Freescale Semiconductor, Inc. All rights 
reserved.
  * (C) Copyright 2002, 2003 Motorola Inc.
  * Xianghua Xiao (x.x...@motorola.com)
  *
@@ -38,37 +38,37 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 struct cpu_type cpu_type_list [] = {
-       CPU_TYPE_ENTRY(8533, 8533),
-       CPU_TYPE_ENTRY(8533, 8533_E),
-       CPU_TYPE_ENTRY(8535, 8535),
-       CPU_TYPE_ENTRY(8535, 8535_E),
-       CPU_TYPE_ENTRY(8536, 8536),
-       CPU_TYPE_ENTRY(8536, 8536_E),
-       CPU_TYPE_ENTRY(8540, 8540),
-       CPU_TYPE_ENTRY(8541, 8541),
-       CPU_TYPE_ENTRY(8541, 8541_E),
-       CPU_TYPE_ENTRY(8543, 8543),
-       CPU_TYPE_ENTRY(8543, 8543_E),
-       CPU_TYPE_ENTRY(8544, 8544),
-       CPU_TYPE_ENTRY(8544, 8544_E),
-       CPU_TYPE_ENTRY(8545, 8545),
-       CPU_TYPE_ENTRY(8545, 8545_E),
-       CPU_TYPE_ENTRY(8547, 8547_E),
-       CPU_TYPE_ENTRY(8548, 8548),
-       CPU_TYPE_ENTRY(8548, 8548_E),
-       CPU_TYPE_ENTRY(8555, 8555),
-       CPU_TYPE_ENTRY(8555, 8555_E),
-       CPU_TYPE_ENTRY(8560, 8560),
-       CPU_TYPE_ENTRY(8567, 8567),
-       CPU_TYPE_ENTRY(8567, 8567_E),
-       CPU_TYPE_ENTRY(8568, 8568),
-       CPU_TYPE_ENTRY(8568, 8568_E),
-       CPU_TYPE_ENTRY(8569, 8569),
-       CPU_TYPE_ENTRY(8569, 8569_E),
-       CPU_TYPE_ENTRY(8572, 8572),
-       CPU_TYPE_ENTRY(8572, 8572_E),
-       CPU_TYPE_ENTRY(P2020, P2020),
-       CPU_TYPE_ENTRY(P2020, P2020_E),
+       CPU_TYPE_ENTRY(8533, 8533, 1),
+       CPU_TYPE_ENTRY(8533, 8533_E, 1),
+       CPU_TYPE_ENTRY(8535, 8535, 1),
+       CPU_TYPE_ENTRY(8535, 8535_E, 1),
+       CPU_TYPE_ENTRY(8536, 8536, 1),
+       CPU_TYPE_ENTRY(8536, 8536_E, 1),
+       CPU_TYPE_ENTRY(8540, 8540, 1),
+       CPU_TYPE_ENTRY(8541, 8541, 1),
+       CPU_TYPE_ENTRY(8541, 8541_E, 1),
+       CPU_TYPE_ENTRY(8543, 8543, 1),
+       CPU_TYPE_ENTRY(8543, 8543_E, 1),
+       CPU_TYPE_ENTRY(8544, 8544, 1),
+       CPU_TYPE_ENTRY(8544, 8544_E, 1),
+       CPU_TYPE_ENTRY(8545, 8545, 1),
+       CPU_TYPE_ENTRY(8545, 8545_E, 1),
+       CPU_TYPE_ENTRY(8547, 8547_E, 1),
+       CPU_TYPE_ENTRY(8548, 8548, 1),
+       CPU_TYPE_ENTRY(8548, 8548_E, 1),
+       CPU_TYPE_ENTRY(8555, 8555, 1),
+       CPU_TYPE_ENTRY(8555, 8555_E, 1),
+       CPU_TYPE_ENTRY(8560, 8560, 1),
+       CPU_TYPE_ENTRY(8567, 8567, 1),
+       CPU_TYPE_ENTRY(8567, 8567_E, 1),
+       CPU_TYPE_ENTRY(8568, 8568, 1),
+       CPU_TYPE_ENTRY(8568, 8568_E, 1),
+       CPU_TYPE_ENTRY(8569, 8569, 1),
+       CPU_TYPE_ENTRY(8569, 8569_E, 1),
+       CPU_TYPE_ENTRY(8572, 8572, 2),
+       CPU_TYPE_ENTRY(8572, 8572_E, 2),
+       CPU_TYPE_ENTRY(P2020, P2020, 2),
+       CPU_TYPE_ENTRY(P2020, P2020_E, 2),
 };
 
 struct cpu_type *identify_cpu(u32 ver)
@@ -81,6 +81,19 @@ struct cpu_type *identify_cpu(u32 ver)
        return NULL;
 }
 
+int probecpu (void)
+{
+       uint svr;
+       uint ver;
+
+       svr = get_svr();
+       ver = SVR_SOC_VER(svr);
+
+       gd->cpu = identify_cpu(ver);
+
+       return 0;
+}
+
 int checkcpu (void)
 {
        sys_info_t sysinfo;
@@ -100,23 +113,30 @@ int checkcpu (void)
        int i;
 
        svr = get_svr();
-       ver = SVR_SOC_VER(svr);
        major = SVR_MAJ(svr);
 #ifdef CONFIG_MPC8536
        major &= 0x7; /* the msb of this nibble is a mfg code */
 #endif
        minor = SVR_MIN(svr);
 
-#if (CONFIG_NUM_CPUS > 1)
-       volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
-       printf("CPU%d:  ", pic->whoami);
-#else
-       puts("CPU:   ");
+#ifndef CONFIG_MP
+       if (gd->cpu->num_cores > 1)
+               puts("#############################################\n"
+                       "The system is detected to be MULTICORE,\n"
+                       "but u-boot is built with UNI-CORE\n"
+                       "To enable mutlticore Build set CONFIG_MP\n"
+                    "#############################################\n\n");
 #endif
 
-       cpu = identify_cpu(ver);
-       if (cpu) {
-               puts(cpu->name);
+       if (gd->cpu->num_cores > 1) {
+               volatile ccsr_pic_t *pic = (void 
*)(CONFIG_SYS_MPC85xx_PIC_ADDR);
+               printf("CPU%d:  ", pic->whoami);
+       }
+       else
+               puts("CPU:   ");
+
+       if (gd->cpu->name) {
+               puts(gd->cpu->name);
 
                if (IS_E_PROCESSOR(svr))
                        puts("E");
@@ -150,7 +170,7 @@ int checkcpu (void)
        get_sys_info(&sysinfo);
 
        puts("Clock Configuration:");
-       for (i = 0; i < CONFIG_NUM_CPUS; i++) {
+       for (i = 0; i < gd->cpu->num_cores; i++) {
                if (!(i & 3))
                        printf ("\n       ");
                printf("CPU%d:%-4s MHz, ",
diff --git a/cpu/mpc85xx/mp.c b/cpu/mpc85xx/mp.c
index 76f02a4..3822102 100644
--- a/cpu/mpc85xx/mp.c
+++ b/cpu/mpc85xx/mp.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008 Freescale Semiconductor.
+ * Copyright (C) 2008-2009 Freescale Semiconductor, Inc. All rights reserved.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -157,7 +157,7 @@ static void pq3_mp_up(unsigned long bootpg)
        out_be32(&gur->devdisr, devdisr);
 
        /* release the hounds */
-       up = ((1 << CONFIG_NUM_CPUS) - 1);
+       up = ((1 << gd->cpu->num_cores) - 1);
        bpcr = in_be32(&ecm->eebpcr);
        bpcr |= (up << 24);
        out_be32(&ecm->eebpcr, bpcr);
@@ -167,7 +167,7 @@ static void pq3_mp_up(unsigned long bootpg)
        /* wait for everyone */
        while (timeout) {
                int i;
-               for (i = 0; i < CONFIG_NUM_CPUS; i++) {
+               for (i = 0; i < gd->cpu->num_cores; i++) {
                        if (table[i * NUM_BOOT_ENTRY + BOOT_ENTRY_ADDR_LOWER])
                                cpu_up_mask |= (1 << i);
                };
diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S
index fbefc2c..e553079 100644
--- a/cpu/mpc85xx/release.S
+++ b/cpu/mpc85xx/release.S
@@ -1,3 +1,26 @@
+/*
+ * Copyright (C) 2008-2009 Freescale Semiconductor, Inc. All rights reserved.
+ * Kumar Gala <kumar.g...@freescale.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
 #include <config.h>
 #include <mpc85xx.h>
 #include <version.h>
@@ -203,7 +226,7 @@ __secondary_start_page:
        .align L1_CACHE_SHIFT
        .globl __spin_table
 __spin_table:
-       .space CONFIG_NUM_CPUS*ENTRY_SIZE
+       .space CONFIG_MAX_CPUS*ENTRY_SIZE
 
        /* Fill in the empty space.  The actual reset vector is
         * the last word of the page */
diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c
index 286b6b2..dddd1d1 100644
--- a/cpu/mpc85xx/speed.c
+++ b/cpu/mpc85xx/speed.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2004, 2007-2009 Freescale Semiconductor Inc.
+ * Copyright (C) 2004, 2007-2009 Freescale Semiconductor, Inc. All rights 
reserved.
  * (C) Copyright 2003 Motorola Inc.
  * Xianghua Xiao, (x.x...@motorola.com)
  *
@@ -51,7 +51,7 @@ void get_sys_info (sys_info_t * sysInfo)
        /* Divide before multiply to avoid integer
         * overflow for processor speeds above 2GHz */
        half_freqSystemBus = sysInfo->freqSystemBus/2;
-       for (i = 0; i < CONFIG_NUM_CPUS; i++) {
+       for (i = 0; i  < gd->cpu->num_cores; i++) {
                e500_ratio = ((gur->porpllsr) >> (i * 8 + 16)) & 0x3f;
                sysInfo->freqProcessor[i] = e500_ratio * half_freqSystemBus;
        }
diff --git a/include/asm-ppc/config.h b/include/asm-ppc/config.h
index 0900f65..e5269b5 100644
--- a/include/asm-ppc/config.h
+++ b/include/asm-ppc/config.h
@@ -29,4 +29,5 @@
 #endif
 #endif
 
+#define CONFIG_MAX_CPUS        8
 #endif
diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h
index 244c161..2fac9a3 100644
--- a/include/asm-ppc/global_data.h
+++ b/include/asm-ppc/global_data.h
@@ -1,4 +1,5 @@
 /*
+ * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
  * (C) Copyright 2002
  * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
  *
@@ -25,6 +26,7 @@
 #define __ASM_GBL_DATA_H
 
 #include "asm/types.h"
+#include "asm/processor.h"
 
 /*
  * The following data structure is placed in some memory wich is
@@ -92,6 +94,9 @@ typedef       struct  global_data {
 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
        u32 lbc_clk;
 #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
+#if defined(CONFIG_MPC85xx)
+       struct cpu_type *cpu;
+#endif
 #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || 
defined(CONFIG_MPC86xx)
        u32 i2c1_clk;
        u32 i2c2_clk;
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index e7db1c6..649d8b3 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -1017,13 +1017,14 @@ n:
 struct cpu_type {
        char name[15];
        u32 soc_ver;
+       u32 num_cores;
 };
 
 struct cpu_type *identify_cpu(u32 ver);
 
 #if defined(CONFIG_MPC85xx)
-#define CPU_TYPE_ENTRY(n, v) \
-       { .name = #n, .soc_ver = SVR_##v, }
+#define CPU_TYPE_ENTRY(n, v, nc) \
+       { .name = #n, .soc_ver = SVR_##v, .num_cores = (nc), }
 #else
 #if defined(CONFIG_MPC83xx)
 #define CPU_TYPE_ENTRY(x) {#x, SPR_##x}
diff --git a/include/common.h b/include/common.h
index ff4f821..6bce154 100644
--- a/include/common.h
+++ b/include/common.h
@@ -439,6 +439,7 @@ void                ppcDWstore(unsigned int *addr, unsigned 
int *value);
 #endif
 
 /* $(CPU)/cpu.c */
+int    probecpu      (void);
 int    checkcpu      (void);
 int    checkicache   (void);
 int    checkdcache   (void);
diff --git a/include/e500.h b/include/e500.h
index 84b580d..f8c8266 100644
--- a/include/e500.h
+++ b/include/e500.h
@@ -8,13 +8,9 @@
 
 #ifndef __ASSEMBLY__
 
-#ifndef CONFIG_NUM_CPUS
-#define CONFIG_NUM_CPUS 1
-#endif
-
 typedef struct
 {
-  unsigned long freqProcessor[CONFIG_NUM_CPUS];
+  unsigned long freqProcessor[CONFIG_MAX_CPUS];
   unsigned long freqSystemBus;
   unsigned long freqDDRBus;
   unsigned long freqLocalBus;
diff --git a/lib_ppc/board.c b/lib_ppc/board.c
index 155171d..171e635 100644
--- a/lib_ppc/board.c
+++ b/lib_ppc/board.c
@@ -290,7 +290,9 @@ init_fnc_t *init_sequence[] = {
 #if defined(CONFIG_BOARD_EARLY_INIT_F)
        board_early_init_f,
 #endif
-
+#if defined(CONFIG_MPC85xx)
+       probecpu,
+#endif
 #if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
        get_clocks,             /* get CPU and bus clocks (etc.) */
 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
diff --git a/lib_ppc/bootm.c b/lib_ppc/bootm.c
index 0d702bf..a491c65 100644
--- a/lib_ppc/bootm.c
+++ b/lib_ppc/bootm.c
@@ -170,11 +170,12 @@ void arch_lmb_reserve(struct lmb *lmb)
 
 static void boot_prep_linux(void)
 {
-#if (CONFIG_NUM_CPUS > 1)
+#ifdef CONFIG_MP
        /* if we are MP make sure to flush the dcache() to any changes are made
         * visibile to all other cores */
        flush_dcache();
 #endif
+
        return ;
 }
 
-- 
1.5.6.3

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