u-boot binary size for Freescale mpc8536DS platforms is 512KB.
This has been reached to upper limit of the platforms and causig
linker error. So increase the u-boot binary size to 768KB.
Signed-off-by: Haijun Zhang
---
include/configs/MPC8536DS.h | 4 ++--
1 file changed, 2 insertions(+), 2
for read and write command.
3. Add CONFIG_SYS_FSL_ERRATUM_ESDHC111 to enable its workaround.
Signed-off-by: Haijun Zhang
---
changes for V2
- Rewrite the comments.
arch/powerpc/include/asm/config_mpc85xx.h | 5 +
drivers/mmc/fsl_esdhc.c | 5 -
2 files changed, 9
CONFIG_SYS_FSL_ERRATUM_ESDHC111 to enable its workaround.
Signed-off-by: Haijun Zhang
---
arch/powerpc/include/asm/config_mpc85xx.h | 5 +
drivers/mmc/fsl_esdhc.c | 5 -
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
b/arch
There was wrong phy_mask for AR8021 device,
so the AR8021 can't be probed correctly.
Changed it from 0x4f to 0x40.
Signed-off-by: Haijun Zhang
---
drivers/net/phy/atheros.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/atheros.c b/drivers/ne
u-boot binary size for Freescale mpc8536DS platforms is 512KB.
This has been reached to upper limit of the platforms and causig
linker error. So increase the u-boot binary size to 768KB.
Signed-off-by: Haijun Zhang
---
include/configs/MPC8536DS.h | 10 +++---
1 file changed, 3 insertions
mat to calculate the envaddr.
If there is no enough space for environment variables or envaddr
is larger than 4GiB, we relocate the envaddr to 0x400. The address
relocated is in the front of the first partition that is assigned
for sdboot only.
Signed-off-by: Haijun Zhang
---
changes for
initialize the card
regardless of whether the card is inserted or not in case Rev1.0.
Signed-off-by: Haijun Zhang
---
changes for V3:
- Define quirk in board specific file instead of code in driver
changes for V2:
- Add the judgement condition for this broken card
drivers/mmc
The upper 4 data signals of esdhc are shared with spi flash.
So detect if the upper 4 pins are assigned to esdhc before
enable sdhc 8 bit width.
Signed-off-by: Haijun Zhang
---
changes for V3:
- Define quirk in board specific file instead of code in driver
changes for V2:
- No
From: Haijun Zhang
Esdhc host version number is incorrect in host capacity register.
The value read from was 0x14. Correct it to 0x13.
Signed-off-by: Haijun Zhang
---
changes for V5:
- no changes
arch/powerpc/include/asm/config_mpc85xx.h | 1 +
1 file changed, 1 insertion(+)
diff
h arg 0x.(Trim and discard are ignored here)
6. Check card status after erase operation is completed.
Signed-off-by: Haijun Zhang
---
changes for V5:
- re-write the code to let it seem simple
drivers/mmc/mmc_write.c | 62 -
1 file ch
used for busy state release.
Signed-off-by: Haijun Zhang
---
changes for V5:
- no changes
drivers/mmc/fsl_esdhc.c | 164 +++-
1 file changed, 106 insertions(+), 58 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
Add command class define.
Add mmc erase and secure erase define.
Add secure erase and trim support bit define.
Signed-off-by: Haijun Zhang
---
changes for V5:
- Add some comments for definitions
include/mmc.h | 50 +-
1 file changed, 49
return, has failed.
Signed-off-by: Haijun Zhang
---
changes for V5:
- Changed the judgement way of block number returned from erase command
common/cmd_mmc.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 67a94a7..d83d1e2 100644
--- a
L_SDHC
Manufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
=>
Signed-off-by: Haijun Zhang
---
changes for V5:
- Exclude the judgement of EXT_CSD_REV in case of read EXT_CSD err
drivers/mmc/m
eed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
=> mmcinfo
Device: FSL_SDHC
Manufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
Signed-off-by: Haijun Zhang
---
changes
The upper 4 data signals of esdhc are shared with spi flash.
So detect if the upper 4 pins are assigned to esdhc before
enable sdhc 8 bit width.
Signed-off-by: Haijun Zhang
---
changs for V2:
- No changes
drivers/mmc/fsl_esdhc.c| 5 +
include/configs/T4240QDS.h | 1 +
2 files
initialize the card
regardless of whether the card is inserted or not in case Rev1.0.
Signed-off-by: Haijun Zhang
---
changes for V2:
- Add the judgement condition for this broken card
drivers/mmc/fsl_esdhc.c| 9 +
include/configs/T4240QDS.h | 2 ++
2 files changed, 11
to calculate the envaddr.
If there is no enough space for environment variables or envaddr
is larger than 4GiB, we relocate the envaddr to 0x400. The address
relocated is in the front of the first partition that is assigned
for sdboot only.
Signed-off-by: Haijun Zhang
---
changes for V2:
-
used for busy state release.
Signed-off-by: Haijun Zhang
---
changes for V4:
- no changes
changes for V3:
- changed the '-1' to '0xU'
- redundant check command and data error after while loop.
drivers/m
From: Haijun Zhang
Esdhc host version number is incorrect in host capacity register.
The value read from was 0x14. Correct it to 0x13.
Signed-off-by: Haijun Zhang
---
changes for V4:
- no changes
arch/powerpc/include/asm/config_mpc85xx.h | 1 +
1 file changed, 1 insertion(+)
diff
L_SDHC
Manufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
=>
Signed-off-by: Haijun Zhang
---
changes for V4:
- update the commit message
- mask the cmdclass to 12 bit only
drivers/mmc/m
h arg 0x.(Trim and discard are ignored here)
6. Check card status after erase operation is completed.
Signed-off-by: Haijun Zhang
---
changes for V4:
- Update the commit message
changes for V3:
- update the commit message and secure feature supporting judgment.
driver
.
Error return, zero return, has failed.
Signed-off-by: Haijun Zhang
---
changes for V4:
- update commit message
changes for V3:
- no changes
common/cmd_mmc.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 67a94a7..d4225f6 100644
From: Haijun Zhang
Add command class define.
Add mmc erase and secure erase define.
Add secure erase and trim support bit define.
Signed-off-by: Haijun Zhang
---
changes for V4:
- no changes
changes for V3:
- No changes
include/mmc.h | 50
eed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
=> mmcinfo
Device: FSL_SDHC
Manufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
Signed-off-by: Haijun Zhang
---
changes
From: Haijun Zhang
Esdhc host version number is incorrect in host capacity register.
The value read from was 0x14. Correct it to 0x13.
Signed-off-by: Haijun Zhang
---
changes for V3:
- no changes
arch/powerpc/include/asm/config_mpc85xx.h | 1 +
1 file changed, 1 insertion(+)
diff
From: Haijun Zhang
Add command class define.
Add mmc erase and secure erase define.
Add secure erase and trim support bit define.
Signed-off-by: Haijun Zhang
---
changes for V3:
- No changes
include/mmc.h | 50 +-
1 file changed, 49
: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
=> mmcinfo
Device: FSL_SDHC
Manufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
Signed-off-by: Haijun
of them.
Error number and zero number mean erase operation was failed.
Signed-off-by: Haijun Zhang
---
changes for V3:
- no changes
common/cmd_mmc.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 67a94a7..c124df0 100644
--- a/common
used for busy state release.
Signed-off-by: Haijun Zhang
---
changes for V3:
- changed the '-1' to '0xU'
- redundant check command and data error after while loop.
drivers/mmc/fsl_esdhc.c | 164 +++-
L_SDHC
Manufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
=>
Signed-off-by: Haijun Zhang
---
changes for V3:
- Change the erase group size to be block aligned.
drivers/mmc/m
ature, erase with arg 0x8000(Spec eMMC 4.41).
else erase with arg 0x.(Trim and discard is ingnored here)
6. Check card status after erase.
Signed-off-by: Haijun Zhang
---
changes for V3:
- update the commit message and secure feature supporting judgment.
drivers/mmc/mmc_wr
to calculate the envaddr.
If there is no enough space for environment variables or envaddr
is larger than 4GiB, we relocate the envaddr to 0x400. The address
relocated is in the front of the first partition that is assigned
for sdboot only.
Signed-off-by: Haijun Zhang
---
board/freescale/com
Card detection pin is ineffective on T4240QDS.
This workaround force sdhc driver scan and initialize the card regardless
of whether the card is inserted. if no card is in the slot, the error message
"card is not inserted" will be prompted.
Signed-off-by: Haijun Zhang
---
drivers/mmc/f
The upper 4 data signals of esdhc are shared with spi flash.
So detect if the upper 4 pins are assigned to esdhc
before enable sdhc 8 bit width.
Signed-off-by: Haijun Zhang
---
drivers/mmc/fsl_esdhc.c| 6 ++
include/configs/T4240QDS.h | 2 ++
2 files changed, 8 insertions(+)
diff --git
status after erase.
Signed-off-by: Haijun Zhang
---
Changes for V2:
- No changes
drivers/mmc/mmc_write.c | 70 ++---
1 file changed, 60 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c
index aa2fdef
Esdhc host version number is incorrect in host capacity register.
The value read from was 0x14. Correct it to 0x13.
Signed-off-by: Haijun Zhang
---
Change for V2:
- No changes
arch/powerpc/include/asm/config_mpc85xx.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc
of them.
Error number and zero number mean erase operation was failed.
Signed-off-by: Haijun Zhang
---
Changes for V2:
- Removed the compiling warning
common/cmd_mmc.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 67a94a7..c124df0
L_SDHC
Manufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
=>
Signed-off-by: Haijun Zhang
---
Changes for V2:
- No changes
drivers/mmc/mmc.c | 51 ++-
1 file ch
state release.
6. In case eSDHC host version 2.3, host will signal transfer complete
interrupt once busy state was release.
Signed-off-by: Haijun Zhang
---
Changes for V2:
- Initialize the irqstat = 0 to avoid compile warning
drivers/mmc/fsl_esdhc.c | 165
ame: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
=> mmcinfo
Device: FSL_SDHC
Manufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
Signed-off-by: Haijun Zhang
---
C
state release.
6. In case eSDHC host version 2.3, host will signal transfer complete
interrupt once busy state was release.
Signed-off-by: Haijun Zhang
---
drivers/mmc/fsl_esdhc.c | 165 +++-
1 file changed, 108 insertions(+), 57 deletions(-)
diff
Add command class define.
Add mmc erase and secure erase define.
Add secure erase and trim support bit define.
Signed-off-by: Haijun Zhang
---
changes for V2:
- Changed the comment, no other change
include/mmc.h | 50 +-
1 file changed
state release.
6. In case eSDHC host version 2.3, host will signal transfer complete
interrupt once busy state was release.
Signed-off-by: Haijun Zhang
---
drivers/mmc/fsl_esdhc.c | 165 +++-
1 file changed, 108 insertions(+), 57 deletions(-)
diff
of them.
Error number and zero number mean erase operation was failed.
Signed-off-by: Haijun Zhang
---
common/cmd_mmc.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 67a94a7..15cecb7 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
ame: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
=> mmcinfo
Device: FSL_SDHC
Manufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
Signed-off-by: Haijun Zhang
---
status after erase.
Signed-off-by: Haijun Zhang
---
drivers/mmc/mmc_write.c | 70 ++---
1 file changed, 60 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c
index aa2fdef..f2e9baf 100644
--- a/drivers/mmc
Esdhc host version number is incorrect in host capacity register.
The value read from was 0x14. Correct it to 0x13.
Signed-off-by: Haijun Zhang
---
arch/powerpc/include/asm/config_mpc85xx.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
b/arch
L_SDHC
Manufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 1-bit
=>
Signed-off-by: Haijun Zhang
---
drivers/mmc/mmc.c | 51 ++-
1 file changed, 38 insertions(+), 13 deletions(-)
d
Add command class define.
Add mmc erase and secure erase define.
Add secure erase and trim support bit define.
Signed-off-by: Haijun Zhang
---
include/mmc.h | 49 +
1 file changed, 49 insertions(+)
diff --git a/include/mmc.h b/include/mmc.h
index
T4240QDS eSDHC host capabilities reigster should have VS33 bit define.
Add quirk CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 to deal with capacity
missing
Signed-off-by: Roy Zang
Signed-off-by: Haijun Zhang
---
changes for V3:
- Move the macro define to T4240QDS.h
drivers/mmc/fsl_esdhc.c
nufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 0-bit
=>
Signed-off-by: Haijun Zhang
Signed-off-by: Xie Shaohui-B21989
Tested-by: Ryan Barnett
---
changes for V3:
- Only add Tested-by no other changes
changes f
eSDHC host controller has new register to support SD Spec 3.0.
And the according host controller version was Freescale eSDHC
Version 3.0.
Signed-off-by: Haijun Zhang
---
changes:
- Split from patch [PATCH] powerpc/esdhc: Map
register for eSDHC host controller 3.0
drivers/mmc
Add some descriptions for esdhc register for easily using.
Signed-off-by: Haijun Zhang
---
drivers/mmc/fsl_esdhc.c | 74 -
1 file changed, 37 insertions(+), 37 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index
nufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 0-bit
=>
Signed-off-by: Haijun Zhang
Signed-off-by: Xie Shaohui-B21989
---
drivers/mmc/fsl_esdhc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/fsl_es
T4240QDS eSDHC host capabilities reigster should have VS33 bit define.
Add quirk CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 to deal with capacity
missing
Signed-off-by: Roy Zang
Signed-off-by: Haijun Zhang
---
changes for V2:
- Limited the change to T4240QDS only
arch/powerpc/include/asm
eSDHC host controller has new register to support SD Spec 3.0.
And the according host controller version was Freescale eSDHC
Version 3.0. Add some new register and it simple description.
Signed-off-by: Haijun Zhang
---
drivers/mmc/fsl_esdhc.c | 62
eSDHC host controller has new register to support SD Spec 3.0.
And the according host controller version was Freescale eSDHC
Version 3.0. Add some new register and it simple description.
Signed-off-by: Haijun Zhang
---
drivers/mmc/fsl_esdhc.c | 62
T4240 eSDHC host capabilities reigster should have VS33 bit define.
Add quirk CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 to deal with capacity
missing
Signed-off-by: Roy Zang
Signed-off-by: Haijun Zhang
---
changes for V2:
- Rewrite the comment
arch/powerpc/include/asm/config_mpc85xx.h | 1
nufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 0-bit
=>
Signed-off-by: Haijun Zhang
Signed-off-by: Xie Shaohui-B21989
---
drivers/mmc/fsl_esdhc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/fsl_es
T4240 eSDHC host capabilities reigster should have VS33 bit define.
hack the code to add the 3.3 voltage support
Signed-off-by: Roy Zang
Signed-off-by: Haijun Zhang
---
arch/powerpc/include/asm/config_mpc85xx.h | 1 +
drivers/mmc/fsl_esdhc.c | 6 ++
2 files changed, 7
nufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 0-bit
=>
Signed-off-by: Haijun Zhang
Signed-off-by: Xie Shaohui-B21989
---
drivers/mmc/fsl_esdhc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/fsl_es
: Haijun Zhang
---
drivers/mmc/fsl_esdhc.c | 10 +-
include/fsl_esdhc.h | 3 ++-
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index dc1d002..5aa592b 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
Fill the right command type when using CMD12 to stop data transfer.
Signed-off-by: Haijun Zhang
CC: Fleming Andrew-AFLEMING
CC: Scott Wood
---
drivers/mmc/fsl_esdhc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index
From: "Haijun.Zhang"
Add new board p1020RDB-PD. P1020RDB-PD board was update from P1020RDB.
DDR changed from DDR2 1G to DDR3 2G.
NAND: 128 MiB
Flash: 64 MiB
Also change P1020RDB to P1020RDB-PC to distinguish from P1020RDB board.
Signed-off-by: Jerry Huang
Signed-off-by: Haijun
From: "Haijun.Zhang"
Signed-off-by: Jerry Huang
Signed-off-by: Haijun Zhang
CC: Scott Wood
CC: Sun Yusong-R58495
---
board/freescale/p1_p2_rdb_pc/ddr.c | 2 +-
board/freescale/p1_p2_rdb_pc/tlb.c | 2 +-
boards.cfg | 4
include/configs/p1_p2_rdb_pc.
From: "Haijun.Zhang"
The logic for the whether to configure for polling or DMA
was mistakenly reversed in this patch:
Commit 7b43db92110ec2f15c5f7187a165f2928464966b
drivers/mmc/fsl_esdhc.c: fix compiler warnings
Signed-off-by: Haijun Zhang
CC: Sun Yusong-R58495
---
chan
From: "Haijun.Zhang"
The logic for the whether to configure for polling or DMA
was mistakenly reversed in this patch:
Commit 7b43db92110ec2f15c5f7187a165f2928464966b
drivers/mmc/fsl_esdhc.c: fix compiler warnings
Signed-off-by: Haijun Zhang
CC: Sun Yusong-R58495
CC: Fleming Andre
From: "Haijun.Zhang"
Add platform support for p1020rdb-pd
Signed-off-by: Jerry Huang
Signed-off-by: Haijun Zhang
CC: Sun Yusong-R58495
CC: u-boot@lists.denx.de
---
board/freescale/p1_p2_rdb_pc/ddr.c | 2 +-
boards.cfg | 4
include/configs/p1_p
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