Hi Bin,
On 06/23/2015 04:30 AM, Bin Meng wrote:
Hi Gabriel,
On Sat, Feb 7, 2015 at 11:07 PM, Gabriel Huau wrote:
Hi Simon,
On 02/06/2015 03:14 PM, Simon Glass wrote:
Hi,
On 6 February 2015 at 16:11, Gabriel Huau wrote:
Hi Simon,
On 02/06/2015 03:04 PM, Simon Glass wrote:
Hi Gabriel
Hi Andy,
On 05/26/2015 01:01 AM, Andy Pont wrote:
Hi Gabriel,
soc_gpio_s5_0@0 {
gpio-offset = <0x80 0>;
pad-offset = <0x1d0>;
mode-gpio;
output-value = <0>;
direction = ;
};
soc_gpio_s5_1@0 {
2015 07:21 AM, Simon Glass wrote:
Hi Gabriel,
I have two patches in patchwork:
http://patchwork.ozlabs.org/patch/471146/
http://patchwork.ozlabs.org/patch/471147/
Are they the correct ones? Also do you know how to use the gpio
command to toggle a bin on the Minnowboard MAX header? I'd li
Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.
Signed-off-by: Gabriel Huau
---
Changes in v4:
- Rebase modification on latest update
- Fix typo to read the io-base
- Fix direction_output function to
Please ignore this email/patch, I put the wrong message id ...
On 05/11/2015 11:15 PM, Gabriel Huau wrote:
Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.
Signed-off-by: Gabriel Huau
---
Changes in v3
Please ignore this email/patch, I put the wrong message id ...
On 05/11/2015 11:10 PM, Gabriel Huau wrote:
Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.
Signed-off-by: Gabriel Huau
---
Changes in v3
Please ignore this email/patch, I put the wrong message id ...
On 05/11/2015 11:12 PM, Gabriel Huau wrote:
Signed-off-by: Gabriel Huau
Acked-by: Simon Glass
---
Changes in v3:
- Rebase to the origin/master
Changes in v2:
- Fix ordering of include header
board/intel/minnowmax
Signed-off-by: Gabriel Huau
Acked-by: Simon Glass
---
Changes in v3:
- Rebase to the origin/master
Changes in v2:
- Fix ordering of include header
board/intel/minnowmax/minnowmax.c | 9 +
include/configs/minnowmax.h | 1 +
2 files changed, 10 insertions(+)
diff --git
Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.
Signed-off-by: Gabriel Huau
---
Changes in v3:
- Fix the dt-binding copyright header
- Remove define for IOBASE and use a property
- Fix issues with
Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.
Signed-off-by: Gabriel Huau
---
Changes in v3:
- Fix the dt-binding copyright header
- Remove define for IOBASE and use a property
- Fix issues with
Signed-off-by: Gabriel Huau
Acked-by: Simon Glass
---
Changes in v3:
- Rebase to the origin/master
Changes in v2:
- Fix ordering of include header
board/intel/minnowmax/minnowmax.c | 9 +
include/configs/minnowmax.h | 1 +
2 files changed, 10 insertions(+)
diff --git
Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.
Signed-off-by: Gabriel Huau
---
Changes in v3:
- Fix the dt-binding copyright header
- Remove define for IOBASE and use a property
- Fix issues with
Hi Stephen,
Thanks for the feedback, I completely miss it, I will do the
modification for the v3.
On 04/28/2015 08:22 AM, Stephen Warren wrote:
On 04/28/2015 07:53 AM, Simon Glass wrote:
Hi Gabriel,
On 25 April 2015 at 14:17, Gabriel Huau wrote:
Every pin can be configured now from the
Hi Simon,
Sorry for the delay, I'm gonna provide a new version in the next few
days but here is some answers to your question:
On 04/28/2015 06:53 AM, Simon Glass wrote:
Hi Gabriel,
On 25 April 2015 at 14:17, Gabriel Huau wrote:
Every pin can be configured now from the device tree.
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Fix ordering of include header
board/intel/minnowmax/minnowmax.c | 9 +
include/configs/minnowmax.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/board/intel/minnowmax/minnowmax.c
b/board/intel/minnowmax
Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Clean commit message
- Rename compatible string 'ich6' to 'x86'
There are 6 banks:
4 banks for CORE: available in S0 mode
2 banks for SUS (Suspend): available in S0-S5 mode
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Fix typo in the commit message
arch/x86/dts/minnowmax.dts | 42 ++
1 file
The correct GPIOBASE address on the baytrail is 0x48
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Add a commit message
Changes for v3:
- Fix patch number
arch/x86/include/asm/arch-baytrail/gpio.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86
The correct GPIOBASE address on the baytrail is 0x48
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Add a commit message
arch/x86/include/asm/arch-baytrail/gpio.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/arch-baytrail/gpio.h
b/arch
Hi,
Wrong command ... I sent a duplicate patch v2, you can ignore this one,
sorry.
Regards,
Gabriel
On 04/25/2015 08:19 AM, Gabriel Huau wrote:
The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Update the dts to put the
The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Update the dts to put the correct flash name
arch/x86/dts/minnowmax.dts | 2 +-
include/configs/minnowmax.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a
The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Update the dts to put the correct flash name
arch/x86/dts/minnowmax.dts | 2 +-
include/configs/minnowmax.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a
Hi Bin,
On 04/23/2015 08:23 PM, Bin Meng wrote:
Hi Gabriel,
On Fri, Apr 24, 2015 at 12:16 AM, Gabriel Huau wrote:
This serie of patches adds the support of pin-muxing from the device tree
through
different properties. I have put two example to enable the USB Host on the
minnowboard max
On 04/23/2015 08:14 PM, Bin Meng wrote:
Hi Gabriel,
On Fri, Apr 24, 2015 at 12:16 AM, Gabriel Huau wrote:
A set of properties has been defined for the device tree to select for
each pin the pull/func/default output configuration.
The offset for the PAD needs to be provided and if a GPIO
Hi Simon,
On 04/23/2015 08:35 PM, Simon Glass wrote:
Hi,
On 23 April 2015 at 10:16, Gabriel Huau wrote:
A set of properties has been defined for the device tree to select for
each pin the pull/func/default output configuration.
The offset for the PAD needs to be provided and if a GPIO needs
Hi Bin,
On 04/23/2015 08:20 PM, Bin Meng wrote:
Hi Gabriel,
On Fri, Apr 24, 2015 at 12:16 AM, Gabriel Huau wrote:
The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau
---
include/configs/minnowmax.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion
The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau
---
include/configs/minnowmax.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index 3c7b266..72393fa 100644
--- a/include/configs
Signed-off-by: Gabriel Huau
---
board/intel/minnowmax/minnowmax.c | 9 +
include/configs/minnowmax.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/board/intel/minnowmax/minnowmax.c
b/board/intel/minnowmax/minnowmax.c
index 6e82b16..60dd2bb 100644
--- a/board/intel
-offset = <0x80 8>;
pad-offset = <0x260>;
mode-gpio;
output-value = <1>;
direction = ;
};
Signed-off-by: Gabriel Huau
---
arch/x86/dts/minnowmax.dts| 21 +++
arch/x86/include/asm/arch-baytrail/gpio.h | 1 +
arch/x86/include/asm/gpio.h
There is 6 banks:
4 banks for CORE: available in S0 mode
2 banks for SUS (Suspend): available in S0-S5 mode
Signed-off-by: Gabriel Huau
---
arch/x86/dts/minnowmax.dts | 42 ++
1 file changed, 42 insertions(+)
diff --git a/arch/x86/dts
the device tree implementation.
Because the GPIO and IO base register ares different, I have also defined
some proxy function to set the function/value and direction of the GPIO as
the GPIO register can override some registers in the IO.
Gabriel Huau (4):
x86: baytrail: fix the GPIOBASE add
Signed-off-by: Gabriel Huau
---
arch/x86/include/asm/arch-baytrail/gpio.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/arch-baytrail/gpio.h
b/arch/x86/include/asm/arch-baytrail/gpio.h
index ab4e059..4e8987c 100644
--- a/arch/x86/include/asm/arch
Hi Simon,
On 04/07/2015 07:03 PM, Simon Glass wrote:
Hi Gabriel,
On 6 April 2015 at 00:10, Gabriel Huau wrote:
Hi Simon,
On 04/05/2015 11:31 AM, Simon Glass wrote:
Hi Gabriel,
On 1 April 2015 at 05:20, Gabriel Huau wrote:
Hi Simon,
On 03/31/2015 07:32 PM, Simon Glass wrote:
Hi
Hi Simon,
On 04/05/2015 11:31 AM, Simon Glass wrote:
Hi Gabriel,
On 1 April 2015 at 05:20, Gabriel Huau wrote:
Hi Simon,
On 03/31/2015 07:32 PM, Simon Glass wrote:
Hi Gabriel,
On 27 February 2015 at 01:52, Bin Meng wrote:
Hi Gabriel,
On Fri, Feb 27, 2015 at 3:54 PM, gabriel huau
Hi Simon,
On 03/31/2015 07:32 PM, Simon Glass wrote:
Hi Gabriel,
On 27 February 2015 at 01:52, Bin Meng wrote:
Hi Gabriel,
On Fri, Feb 27, 2015 at 3:54 PM, gabriel huau wrote:
Hi Bin,
On 02/26/2015 07:30 PM, Bin Meng wrote:
Hi Gabriel,
On Thu, Feb 26, 2015 at 12:27 AM, Gabriel Huau
Hi Bin,
On 02/26/2015 07:30 PM, Bin Meng wrote:
Hi Gabriel,
On Thu, Feb 26, 2015 at 12:27 AM, Gabriel Huau wrote:
Hi Bin,
On 02/24/2015 11:52 PM, Bin Meng wrote:
Hi Gabriel,
On Mon, Feb 16, 2015 at 5:55 AM, Gabriel Huau
wrote:
Configure the pinctrl as it required to make some IO
Hi Bin,
On 02/24/2015 11:52 PM, Bin Meng wrote:
Hi Gabriel,
On Mon, Feb 16, 2015 at 5:55 AM, Gabriel Huau wrote:
Configure the pinctrl as it required to make some IO controllers
working (USB/UART/I2C/...).
The idea would be in the next version to modify the pch GPIO driver and
configure
Hi Simon,
With a little bit of delay here are the responses ... :)
On 02/17/2015 08:04 PM, Simon Glass wrote:
Hi Gabriel,
On 15 February 2015 at 14:55, Gabriel Huau wrote:
Configure the pinctrl as it required to make some IO controllers
working (USB/UART/I2C/...).
The idea would be in the
Configure the pinctrl as it required to make some IO controllers
working (USB/UART/I2C/...).
The idea would be in the next version to modify the pch GPIO driver and
configure these pins through the device tree.
These modifications are ported from the coreboot project.
Signed-off-by: Gabriel Huau
Hi Simon,
On 02/06/2015 03:14 PM, Simon Glass wrote:
Hi,
On 6 February 2015 at 16:11, Gabriel Huau wrote:
Hi Simon,
On 02/06/2015 03:04 PM, Simon Glass wrote:
Hi Gabriel,
On 6 February 2015 at 16:01, Gabriel Huau wrote:
Hi Bin,
Actually I was able to try with a quick&dirty code
Hi Simon,
On 02/06/2015 03:04 PM, Simon Glass wrote:
Hi Gabriel,
On 6 February 2015 at 16:01, Gabriel Huau wrote:
Hi Bin,
Actually I was able to try with a quick&dirty code the integration of the
ACPI tables (aml files) and it doesn't seem to be possible.
The boot to Linux is wor
1 AM, Bin Meng wrote:
Hi Gabriel,
Thank you for taking the initiative for the U-Boot ACPI support.
On Thu, Feb 5, 2015 at 3:52 AM, Simon Glass wrote:
+Bin
Hi Gabriel,
On 4 February 2015 at 12:22, Gabriel Huau wrote:
Hi All,
I'm currently thinking on how to integrate the ACPI support
Hi All,
I'm currently thinking on how to integrate the ACPI support in u-boot
x86. I've investigated the coreboot implementation. My first thought was
to port all the source code over but looking at the source code in more
details it doesn't look like an easy option. For example, it involves
This was breaking the build for some boards:
MPC8536DS MPC8536DS_36BIT MPC8536DS_SDCARD MPC8536DS_SPIFLASH qemu-ppce500
Include only these features for some PPC boards if the configuration for
MultiProcessor
is enabled.
Signed-off-by: Gabriel Huau
Cc: Tom Rini
Cc: York Sun
---
common
Hi York,
On 09/03/2014 11:00 AM, York Sun wrote:
On 07/28/2014 08:15 AM, Stefano Babic wrote:
Hi Gabriel,
On 26/07/2014 20:35, Gabriel Huau wrote:
This allows u-boot to load different OS or Bare Metal application on
different cores of the i.MX6 SoC.
For example: running Android on cpu0 and a
On 09/03/2014 11:36 AM, York Sun wrote:
On 09/03/2014 11:26 AM, Gabriel Huau wrote:
Hi York,
On 09/03/2014 11:00 AM, York Sun wrote:
On 07/28/2014 08:15 AM, Stefano Babic wrote:
Hi Gabriel,
On 26/07/2014 20:35, Gabriel Huau wrote:
This allows u-boot to load different OS or Bare Metal
This allows u-boot to load different OS or Bare Metal application on
different cores of the i.MX6 SoC.
For example: running Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1.
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Add a commit log message to explain the purpose of this
Agreed, I misunderstood sorry. I'll do the modification for the next
version of the patch.
Thanks!
Regards,
Gabriel
On 07/15/2014 12:35 PM, Stefano Babic wrote:
Hi Gabriel,
On 15/07/2014 16:13, gabriel huau wrote:
I have just investigate a bit. The file is included by common/board_f.
On 07/15/2014 12:49 AM, Stefano Babic wrote:
Hi Gabriel,
On 13/07/2014 00:31, Gabriel Huau wrote:
This allows u-boot to load different OS or Bare Metal application on the
different cores of the i.MX6DQ.
For example: we can run Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1.
Signed-off
Hi Wolfgang,
On 07/13/2014 02:58 AM, Wolfgang Denk wrote:
Dear Gabriel Huau,
In message <1405204264-10922-1-git-send-email-cont...@huau-gabriel.fr> you
wrote:
This allows u-boot to load different OS or Bare Metal application on the
different cores of the i.MX6DQ.
For example: we c
This allows u-boot to load different OS or Bare Metal application on the
different cores of the i.MX6DQ.
For example: we can run Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1.
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Add a commit log message to explain the purpose of
This allows u-boot to load different OS or Bare Metal application on the
different cores of the i.MX6DQ.
For example: we can run Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1.
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Add a commit log message to explain the purpose of
Hi Stefano,
On 06/24/2014 05:50 AM, Stefano Babic wrote:
Hi Gabriel,
On 22/06/2014 18:56, Gabriel Huau wrote:
This allows u-boot to load different OS or Bare Metal application on the
different cores of the i.MX6DQ.
For example: we can run Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1
Agreed, I'll submit a patch to fix that.
Regards,
Gabriel
On 06/22/2014 02:14 AM, Jeroen Hofstee wrote:
Hello Gabriel,
On 22-06-14 01:55, Gabriel Huau wrote:
This allows u-boot to load different OS or Bare Metal application on the
different cores of the i.MX6DQ.
For example: we ca
This allows u-boot to load different OS or Bare Metal application on the
different cores of the i.MX6DQ.
For example: we can run Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1.
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Add a commit log message to explain the purpose of
Hi Nikolay,
I agree that you have to modify those OS to support 'multi-OS' on
different core but this customization is not part of u-boot in my sense.
For the second point, I have to disagree, the imx6 is totally
appropriate for AMP/multi-OS, in my case, I wasn't thinking about
virtualization
This allows u-boot to load different OS or Bare Metal application on the
different cores of the i.MX6DQ.
For example: we can run Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1.
Signed-off-by: Gabriel Huau
---
arch/arm/cpu/armv7/mx6/Makefile | 1 +
arch/arm/cpu/armv7/mx6/mp.c
Signed-off-by: Gabriel Huau
---
arch/arm/cpu/armv7/mx6/Makefile | 1 +
arch/arm/cpu/armv7/mx6/mp.c | 131 +++
arch/arm/include/asm/arch-mx6/imx-regs.h | 13 +++
3 files changed, 145 insertions(+)
create mode 100644 arch/arm/cpu/armv7/mx6/mp.c
Hi,
I would like to know if it's really necessary to keep the dummy
functions in arch/arm/lib/eabi_compat.c.
These function should not be happen in our case (that why the body is
empty).
They have been introduced due to problems with some toolchains that was
referencing these functions. But we c
Hi,
I sent patches v5 and v10 and I have no more review since a few weeks,
so I think it's ok now, no ?
About the comment/definitions, it has been fixed in last patches :).
Best regards,
On Mon, May 21, 2012 at 11:55:10PM +0200, Wolfgang Denk wrote:
> Dear Gabriel Huau,
>
&
Is it ok ? Can we apply theses patches ?
On Sun, Apr 29, 2012 at 11:27:23PM +0200, Gabriel Huau wrote:
> From the last time, I removed the patch about the PLL initialization because
> it's board specific. I added a new patch for s3c440 gpio driver. Now in the
> board file we have
It's now possible to use the gpio driver interface
for s3c2440. This patch add iomux definitions too.
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Modification of the coding style
- Add my email address to copyright
- Remove a typedef
- Move some defin
Support of the MINI2440 board from FriendlyARM from
an old version of u-boot :
http://repo.or.cz/r/u-boot-openmoko/mini2440.git
Currently, supporting only boot from NOR.
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Coding style cleanup
- Remove unnecessary files
On Wed, May 02, 2012 at 01:40:35PM -0500, Scott Wood wrote:
> On 05/02/2012 01:16 AM, Minkyu Kang wrote:
> > Dear Marek,
> >
> > On 2 May 2012 11:44, Marek Vasut wrote:
> +int gpio_set_value(unsigned gpio, int value)
> +{
> + unsigned l = readl(GPIO_FULLPORT(gpio));
> +
Hi Minkyu Kang,
Can you review/apply theses patches please ? (Marex have already
tortured me ...) :
- [PATCH 1/2 v4] ARM : Add GPIO Driver and IOMUX definition for S3C2440
- [PATCH 2/2 v9] ARM : Add support for MINI2440 (s3c2440).
Thanks,
__
Support of the MINI2440 board from FriendlyARM from
an old version of u-boot :
http://repo.or.cz/r/u-boot-openmoko/mini2440.git
Currently, supporting only boot from NOR.
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Coding style cleanup
- Remove unnecessary files
It's now possible to use the gpio driver interface
for s3c2440. This patch add iomux definitions too.
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Modification of the coding style
- Add my email address to copyright
- Remove a typedef
- Move some defin
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Coding style cleanup
- Remove unnecessary files modification
- Remove unnecessary board configuration set
Changes for v3:
- Coding style cleanup
- Move some macro definition from lowlevel_init.S
to
On Mon, Apr 30, 2012 at 03:21:49PM +0200, Marek Vasut wrote:
> Dear Gabriel Huau,
>
> > +
> > +/*
> > + * Miscellaneous configurable options
> > + */
> > +#defineCONFIG_LONGHELP
> > +#defineCONFIG_SYS_PROMPT "MINI2440 => "
&
On Mon, Apr 30, 2012 at 03:20:42PM +0200, Marek Vasut wrote:
> Dear Gabriel Huau,
>
> > Signed-off-by: Gabriel Huau
> > ---
> > Changes for v2:
> > - Modification of the coding style
> > - Add my email address to copyright
> > - Remove a typ
On Mon, Apr 30, 2012 at 02:25:20PM +0200, Marek Vasut wrote:
> Dear Gabriel Huau,
>
> > On Mon, Apr 30, 2012 at 01:29:37AM +0200, Marek Vasut wrote:
> > > Dear Gabriel Huau,
> > >
> > > Commit message got lost ? :p
> >
> > It's strange, I
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Coding style cleanup
- Remove unnecessary files modification
- Remove unnecessary board configuration set
Changes for v3:
- Coding style cleanup
- Move some macro definition from lowlevel_init.S
to
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Modification of the coding style
- Add my email address to copyright
- Remove a typedef
- Move some defines to driver file
Changes for v3:
- Cleanup coding style
- Changement of the commit message
On Mon, Apr 30, 2012 at 01:35:01PM +0200, Wolfgang Denk wrote:
> Dear Gabriel Huau,
>
> In message <20120430110724.GB4656@debian> you wrote:
> >
> > Just a little question about the ChangeLog. I added the "---" and my
> > changements after it, but
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Coding style cleanup
- Remove unnecessary files modification
- Remove unnecessary board configuration set
Changes for v3:
- Coding style cleanup
- Move some macro definition from lowlevel_init.S
to
Hi,
Just a little question about the ChangeLog. I added the "---" and my
changements after it, but I see this part in "git log", is it normal ?
Will this part be deleted in the merge ?
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mai
On Mon, Apr 30, 2012 at 01:29:37AM +0200, Marek Vasut wrote:
> Dear Gabriel Huau,
>
> Commit message got lost ? :p
It's strange, I have the commit message in my log, but when I
format-patch, The commit message is set only in the subject, not
in the b
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Modification of the coding style
- Add my email address to copyright
- Remove a typedef
- Move some defines to driver file
---
arch/arm/include/asm/arch-s3c24x0/gpio.h | 171
arch/arm
On Sun, Apr 29, 2012 at 11:32:27PM +0200, Wolfgang Denk wrote:
> Dear Gabriel Huau,
>
> In message <1335734845-27396-1-git-send-email-cont...@huau-gabriel.fr> you
> wrote:
> >
> > >> +/*
> > >> + * When booting from NAND, it is impossible to acces
E.mini2440 file
- Use gpio/iomux interface in case of magic numbers
- Use get_ram_size()
Signed-off-by: Gabriel Huau
---
MAINTAINERS |4 +
board/friendlyarm/mini2440/Makefile | 44 +++
board/friendlyarm/mini2440/mini2440.c | 135 +
Signed-off-by: Gabriel Huau
---
arch/arm/include/asm/arch-s3c24x0/gpio.h | 183 +++
arch/arm/include/asm/arch-s3c24x0/iomux.h | 197 +
drivers/gpio/Makefile |1 +
drivers/gpio/s3c2440_gpio.c | 74
ot, we don't have access to NOR because the SteppingStone
(SRAM) is mapped at the same range.
Gabriel Huau (2):
Add GPIO Driver and IOMUX definition for S3C2440
Add support for MINI2440 (s3c2440).
MAINTAINERS |4 +
arch/arm/include/asm/arch-s3c24x0/gpi
This patch can be cancel/ignore ... PLL initialization is BOARD-specific
and not SoC So, now, no more problem about magic number in
others boards and management of s3c2410/s3c2440 :).
On Sun, Apr 22, 2012 at 11:32:18PM +0200, Marek Vasut wrote:
> Dear Gabriel Huau,
>
> > On
On Sun, Apr 22, 2012 at 10:30:52PM +0200, Marek Vasut wrote:
> Dear Gabriel Huau,
>
> > Signed-off-by: Gabriel Huau
> > ---
> > arch/arm/cpu/arm920t/s3c24x0/timer.c | 36
> > ++ board/mpl/vcma9/lowlevel_init.S |
> > 22
dram_init() instead low_levelinit
- Remove u-boot env from configuration file and change
the address of initial SP
- Remove PLL init, now it's SoC specific
Signed-off-by: Gabriel Huau
---
board/friendlyarm/mini2440/Makefile | 44 +++
board/friendlyarm/mini2440/mi
Signed-off-by: Gabriel Huau
---
arch/arm/cpu/arm920t/s3c24x0/timer.c | 36 ++
board/mpl/vcma9/lowlevel_init.S | 22 -
board/samsung/smdk2410/smdk2410.c| 19 --
3 files changed, 36 insertions(+), 41 deletions
These patches add the support for the mini2440 (s3c2440 arm). Currently, I'm
supporting only boot from NOR. The first patch move the PLL initialization
to SoC specific directory. I also changed boards which depend on this SoC.
Gabriel Huau (2):
S3C2440 : PLL Initialization should b
On Sat, Apr 21, 2012 at 02:51:46AM +0400, Ilya Averyanov wrote:
> 2012/4/21 Marek Vasut
>
> > Dear Vasily Khoruzhick,
> >
> > > 2012/4/20 Marek Vasut :
> > > > Which doesn't matter, either way you need stack ... and you can have
> > the
> > > > stack in cache ;-)
> > >
> > > s3c24xx has 4kb of SR
On Thu, Apr 19, 2012 at 10:45:21PM +0200, Marek Vasut wrote:
> Dear Gabriel Huau,
>
> > On Thu, Apr 19, 2012 at 10:08:47PM +0200, Marek Vasut wrote:
> > > Dear Gabriel Huau,
> > >
> > > > ---
> > > >
> > > > Changes for v
On Thu, Apr 19, 2012 at 10:08:47PM +0200, Marek Vasut wrote:
> Dear Gabriel Huau,
>
> > ---
> > Changes for v2:
> > - Coding style cleanup
> > - Remove unnecessary files modification
> > - Remove unnecessary board configuration set
> >
ft.nl) and
+ * Jan-Derk Bakker (j.d.bak...@its.tudelft.nl)
+ *
+ * Modified for the Samsung SMDK2410 by
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG,
+ *
+ * (C) Copyright 2012
+ * Gabriel Huau
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This
s.
I forget to say in my first mail that is a porting from an old version
of u-boot patched by BusError (Michel Pollet).
>From 9cefb0a55332b094256447f32d1b27c4f3f7808a Mon Sep 17 00:00:00 2001
From: Gabriel Huau
Date: Sun, 15 Apr 2012 00:10:22 +0200
Subject: [PATCH v2] Add support for MINI2440
e can boot from NOR and the network
is available (tftp, dhcp, ...). Boot from NAND will be the next step
(and laters MMC).
Best regards,
>From 5f373acac7447aaf3072f0d1ba88d364a8b2ebfe Mon Sep 17 00:00:00 2001
From: Gabriel Huau
Date: Sun, 15 Apr 2012 00:10:22 +0200
Subject: [PATCH] Add sup
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