> Subject: [PATCH 2/4] imx: imxrt1050-evk: Fix missing clocks for mmc
>
> Two of the clocks required by the usdhc1 controller are missing from
> the clock controller node. A recent change enables all the clocks in the
> esdhc node, which fails as they are not defined in the clock controller.
>
>
Hello Rasmus,
On 24.10.24 14:27, Rasmus Villemoes wrote:
Loading flash.bin using uuu fails when flash.bin does not have the
right size.
When flash.bin is loaded from some storage medium (sd card/emmc), SPL
just loads some random garbage bytes from beyond what has been
populated when flash.bin w
The Ethenet interfaces on the Renesas RZ/G2L SoC family can operate at
multiple power supply voltages: 3.3V (default value), 2.5V and 1.8V.
rzg2l_pinconf_set() is extended to support the 2.5V setting, with a
check to ensure this is only used on Ethernet interfaces as it is not
supported on the SD
On Wed, 16 Oct 2024 13:10:48 +0530, Vaishnav Achath wrote:
> Add the latest 4000 MT/s DDR config generated by
> Jacinto7_DDRSS_RegConfigTool Rev 0.11 for J722S , make it the
> default config and update A53 default clock to 1.4 GHz matching
> the default speed grade (K).
>
>
Applied to u-boot/ma
On Thu, 24 Oct 2024 at 17:04, Ilias Apalodimas
wrote:
>
> Replying to myself here but
>
> On Thu, 24 Oct 2024 at 14:25, Ilias Apalodimas
> wrote:
> >
> > With the recent changes of lwip & mbedTLS we can now download from
> > https:// urls instead of just http://.
> > Adjust our wget lwip version
> From: Simek, Michal
> Sent: Wednesday, October 23, 2024 11:37 AM
> To: u-boot@lists.denx.de; g...@xilinx.com
> Cc: Leo ; Padmarao Begari
> ; Rick Chen ; Tom Rini
>
> Subject: [PATCH] riscv: mbv: Align DT with QEMU
>
> Align U-Boot with QEMU amd-microblaze-v-virt platform to be able to wire it
On Thu, 24 Oct 2024 at 20:56, Paul Barker wrote:
>
> On the RZ/G2L & RZ/V2L SMARC SOMs, the RGMII interface between the SoC
> and the Ethernet PHY operates at 1.8V.
>
> The power supply for this interface may be correctly configured in
> u-boot, but the kernel should not be relying on this. Now th
On Thu, 24 Oct 2024 at 20:55, Paul Barker wrote:
>
> Configure ET0_TXC and ET1_TXC as outputs on the Renesas RZ/[GV]2L SMARC
> SoMs, as per RGMII specification.
>
> Signed-off-by: Paul Barker
> Reviewed-by: Geert Uytterhoeven
> Acked-by: Linus Walleij
> Link:
> https://lore.kernel.org/20240625
Provide Sphinx style documentation for struct ext2_inode.
Signed-off-by: Heinrich Schuchardt
Reviewed-by: Simon Glass
---
v2:
add reference to the Linux documentation
---
include/ext_common.h | 33 ++---
1 file changed, 30 insertions(+), 3 deletions(-)
diff
The init_r parsing of U-Boot device tree to search the binman
information errors. set CONFIG_BINMAN_FDT to no to fix this.
Fixes: 7079eeb72fc ("imx: imxrt1050-evk: Add support for SPI flash booting
s")
Signed-off-by: Jesse Taube
---
configs/imxrt1020-evk_defconfig | 1 +
configs/imxrt1050-e
Hi Tom,
Please pull the below PR.
CI:
https://source.denx.de/u-boot/custodians/u-boot-spi/-/pipelines/22949
thanks,
Jagan.
The following changes since commit 7af813341d5df064aeee764c31ffb50ffcdf4eb6:
Merge https://source.denx.de/u-boot/custodians/u-boot-watchdog (2024-10-23
08:33:56 -0600)
Hi Bryan
On 23/10/24 20:15, Bryan Brattlof wrote:
On October 21, 2024 thus sayeth Santhosh Kumar K:
From: Neha Malcom Francis
Add CONFIG_K3_INLINE_ECC so that ECC functions can be compiled into R5 SPL
only when the config has been enabled.
Signed-off-by: Neha Malcom Francis
---
drivers/ra
Add #address-cells and #size-cells to the memory node to fix warnings
Signed-off-by: Jesse Taube
---
arch/arm/dts/imxrt1170-evk.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/dts/imxrt1170-evk.dts b/arch/arm/dts/imxrt1170-evk.dts
index c2fd0c0392c..0d8e7016860 100644
--- a/ar
Enable standard boot support and add default environments for the
imxrt1050-evk board.
Signed-off-by: Jesse Taube
---
board/freescale/imxrt1050-evk/imxrt1050-evk-nor.env | 13 +
board/freescale/imxrt1050-evk/imxrt1050-evk.env | 13 +
configs/imxrt1050-evk_defconfig
On Tue, Oct 22, 2024 at 08:04:28AM +0200, Jan Kiszka wrote:
> From: Jan Kiszka
>
> Allow for the sysinfo drivers to provide a system UUID to SMBIOS. Will
> be first used by the IOT2050 boards.
>
> Based on original patch by Li Hua Qian.
>
> Signed-off-by: Jan Kiszka
> Reviewed-by: Simon Glass
On Tue, Oct 22, 2024 at 08:09:48AM +0200, Jan Kiszka wrote:
> On 10.10.24 08:34, Michael Nazzareno Trimarchi wrote:
> > On Thu, Oct 10, 2024 at 7:56 AM Jan Kiszka wrote:
> >>
> >> From: Jan Kiszka
> >>
> >> This prevented to set m2_manual_config - as evaluated by
> >> m2_connector_setup - under s
Several Renesas SoCs in the RZ/G2L family have two Ethernet interfaces.
To support this second interface, we extend the bb_miiphy_buses[] array
and keep track of the current bus index in ravb_of_to_plat().
Support for an arbitrary number of instances is not implemented - it is
expected that bb_mii
The Emcraft Systems NavQ+ kit is a mobile robotics platform
based on NXP i.MX8 MPlus SoC.
The following interfaces and devices are enabled:
- eMMC
- Gigabit Ethernet (through eQOS interface)
- SD-Card
- UART console
The device tree file is taken from upstream Linux Kernel
through OF_UPSTREAM
Sig
On Fri, 18 Oct 2024 03:30:12 +0200, Heinrich Schuchardt wrote:
> There should be a defined interface between block devices drivers and the
> block class layer. Most drivers already use blk_create_devicef() to
> generate block devices. The EFI block device driver and the Rockchip
> rkmtd driver are
Various signal skew values may be set in the device tree for the ksz9131
Ethernet PHY. For example, the RZ/G2L board requires non-default values
for rxc-skew-psec & txc-skew-psec.
This is based on the ksz9131 phy driver in Linux v6.11.
Signed-off-by: Paul Barker
---
drivers/net/phy/micrel_ksz90
On Thu, Oct 24, 2024 at 10:19:41AM -0400, Raymond Mao wrote:
> Hi Tom,
>
> On Thu, 24 Oct 2024 at 10:10, Tom Rini wrote:
>
> > On Thu, Oct 24, 2024 at 09:35:36AM -0400, Raymond Mao wrote:
> > > Hi Tom,
> > >
> > > On Wed, 23 Oct 2024 at 20:23, Tom Rini wrote:
> > >
> > > > On Tue, Oct 22, 2024
Thanks Peter for your help and suggestions
This is for marvel Alleycat-5x which has armv8.
Upgrade is not allowed without the approval.
Regards,
Girish
-Original Message-
From: Peter Robinson
Sent: Thursday, October 24, 2024 2:07 PM
To: Kumar Girish
Cc: u-boot@lists.denx.de
Subject:
On Thu, 24 Oct 2024 at 15:16, Heinrich Schuchardt
wrote:
>
> Provide Sphinx style documentation for struct ext2_inode.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> include/ext_common.h | 30 +++---
> 1 file changed, 27 insertions(+), 3 deletions(-)
>
Reviewed-by: Simon
On 10/24/24 5:20 PM, Tom Rini wrote:
On Thu, Oct 24, 2024 at 04:06:03PM +0200, Marek Vasut wrote:
On 10/24/24 3:18 PM, Rasmus Villemoes wrote:
On Thu, Oct 24 2024, Marek Vasut wrote:
On 10/24/24 12:01 PM, Rasmus Villemoes wrote:
I enabled IMX_HAB on an imx8mp board, but even though I knew a
On Mon, 21 Oct 2024 16:56:33 +0300, Andy Shevchenko wrote:
> Some functions are not used anywhere except the same file
> where they are defined. Mark them static. This helps avoiding
> the compiler warnings:
>
> cmd/nvedit.c:201:5: warning: no previous prototype for ‘do_env_ask’
> [-Wmissing-p
On Thu, Oct 24, 2024 at 08:03:04PM +0530, Jagan Teki wrote:
> Hi Tom,
>
> Please pull the below PR.
>
> CI:
> https://source.denx.de/u-boot/custodians/u-boot-spi/-/pipelines/22949
>
> thanks,
> Jagan.
>
> The following changes since commit 7af813341d5df064aeee764c31ffb50ffcdf4eb6:
>
> Merge
On Thu, 24 Oct 2024 at 17:36, Simon Glass wrote:
>
> Hi Peter,
>
> On Thu, 24 Oct 2024 at 14:16, Peter Robinson wrote:
> >
> > On Tue, 22 Oct 2024 at 09:48, Peter Robinson wrote:
> > >
> > > > On Mon, Oct 21, 2024 at 01:38:08PM +0200, Simon Glass wrote:
> > > > > There has been an LED framework
Hi Peter,
On Thu, 24 Oct 2024 at 14:16, Peter Robinson wrote:
>
> On Tue, 22 Oct 2024 at 09:48, Peter Robinson wrote:
> >
> > > On Mon, Oct 21, 2024 at 01:38:08PM +0200, Simon Glass wrote:
> > > > There has been an LED framework in U-Boot which uses driver model for
> > > > about 9 years now. Re
Hi Kumar,
> Thanks Peter for your help and suggestions
> This is for marvel Alleycat-5x which has armv8.
> Upgrade is not allowed without the approval.
I suggest you reach out to the Marvel team them and ask them for a fix.
> Regards,
> Girish
>
> -Original Message-
> From: Peter Robinso
On Thu, Oct 24, 2024 at 12:04 AM Yannic Moog wrote:
>
> There have been attempts to get op-tee node integrated upstream in the
> past [1][2]. The challenge is on how to handle the load and entry
> addresses where the op-tee image should be loaded to.
> Different SoC families and architectures have
On October 24, 2024 thus sayeth Neha Malcom Francis:
> Hi Bryan
>
> On 23/10/24 20:09, Bryan Brattlof wrote:
> > On October 21, 2024 thus sayeth Santhosh Kumar K:
> > > As R5 is a 32 bit processor, the RAM banks' base and size calculation
> > > is restricted to 32 bits, which results in wrong valu
In the RZ/G2L family, core clocks are always on and can't be disabled.
However, drivers which are shared with other SoCs may call clk_enable()
or clk_enable_bulk() for a clock referenced in the device tree which
happens to be a core clock on the RZ/G2L. To avoid the need for
conditionals in these d
On 24/10/2024 16:24, Paul Barker wrote:
> Configure ET0_TXC and ET1_TXC as outputs on the Renesas RZ/[GV]2L SMARC
> SoMs, as per RGMII specification.
>
> Signed-off-by: Paul Barker
> Reviewed-by: Geert Uytterhoeven
> Acked-by: Linus Walleij
> Link:
> https://lore.kernel.org/20240625200316.4282
On Thu, Oct 24, 2024 at 12:04 AM Yannic Moog wrote:
>
> Add tee node in SoC u-boot device trees. Each board adds their specific
> load and entry addresses for the op-tee image in the respective
> board-u-boot.dtsi file.
>
> Signed-off-by: Yannic Moog
> ---
> arch/arm/dts/imx8mm-u-boot.dtsi | 15
On the RZ/G2L & RZ/V2L SMARC SOMs, the RGMII interface between the SoC
and the Ethernet PHY operates at 1.8V.
The power supply for this interface may be correctly configured in
u-boot, but the kernel should not be relying on this. Now that the
RZ/G2L pinctrl driver supports configuring the Etherne
For Ethernet to work on the RZ/G2L board, we need to enable support for
the ksz9131 PHY and enable random MAC address generation (as no MAC
address is programmed into the board).
We also enable the `dhcp`, `mii` and `ping` commands so that Ethernet
functionality can be tested and used to boot Linu
The Renesas R9A07G044L (RZ/G2L) SoC includes two Gigabit Ethernet
interfaces which can be supported using the ravb driver. Some RZ/G2L
specific steps need to be taken during initialization due to differences
between this SoC and previously supported SoCs. We also need to ensure
that the module rese
We can call dev_read_u32_default() instead of calling fdt_getprop() then
fdt32_to_cpu().
Signed-off-by: Paul Barker
---
drivers/net/ravb.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c
index 9b33ce929618..fb869cd0872e 100644
--- a
We can call phy_modify_mmd() instead of manually calling drv->readext()
and drv->writeext().
Signed-off-by: Paul Barker
---
drivers/net/phy/micrel_ksz90x1.c | 26 --
1 file changed, 8 insertions(+), 18 deletions(-)
diff --git a/drivers/net/phy/micrel_ksz90x1.c b/drivers/
Configure ET0_TXC and ET1_TXC as outputs on the Renesas RZ/[GV]2L SMARC
SoMs, as per RGMII specification.
Signed-off-by: Paul Barker
Reviewed-by: Geert Uytterhoeven
Acked-by: Linus Walleij
Link:
https://lore.kernel.org/20240625200316.4282-5-paul.barker...@bp.renesas.com
Signed-off-by: Geert Uy
This patch series enables the usage of both Ethernet interfaces on the
Renesas RZ/G2L SMARC EVK board. This requires changes to the RZ/G2L
clock driver, RZ/G2L pinctrl driver, ksz9131 phy driver and ravb network
driver. Once all drivers have the required support, we enable the
relevant options in t
On Thu, Oct 24, 2024 at 04:06:03PM +0200, Marek Vasut wrote:
> On 10/24/24 3:18 PM, Rasmus Villemoes wrote:
> > On Thu, Oct 24 2024, Marek Vasut wrote:
> >
> > > On 10/24/24 12:01 PM, Rasmus Villemoes wrote:
> > > > I enabled IMX_HAB on an imx8mp board, but even though I knew about the
> > > > im
Hi Raymond
On Thu, 24 Oct 2024 at 17:13, Raymond Mao wrote:
>
> Hi Ilias,
>
> On Thu, 24 Oct 2024 at 07:25, Ilias Apalodimas
> wrote:
>>
>> Since lwIP and mbedTLS have been merged we can tweak the config options
>> and enable TLS1.2 support. Add RSA and ECDSA by default and enable
>> enough blo
On Thu, Oct 24, 2024 at 08:18:40AM -0600, Tom Rini wrote:
> On Thu, Oct 24, 2024 at 09:26:14AM +0300, Andy Shevchenko wrote:
> > On Thu, Oct 24, 2024 at 07:03:24AM +0200, Heinrich Schuchardt wrote:
> > > Am 22. Oktober 2024 15:18:45 MESZ schrieb Andy Shevchenko
> > > :
> > > >On Tue, Oct 22, 2024
On 24/10/2024 15:11, Caleb Connolly wrote:
Hi Neil,
On 16/10/2024 11:17, Neil Armstrong wrote:
On earlier platforms, the vqmmc regulator was enabled by the
previous bootloader, but on the newest (SM8650) it's not
and we need vqmmc to be enabled in order to have the card
to respond.
Isn't/shou
Adding Simon.
On Thu, Oct 24, 2024 at 11:14 AM Marek Vasut wrote:
>
> On 10/24/24 2:27 PM, Rasmus Villemoes wrote:
> > Loading flash.bin using uuu fails when flash.bin does not have the
> > right size.
> >
> > When flash.bin is loaded from some storage medium (sd card/emmc), SPL
> > just loads so
On 10/24/24 2:27 PM, Rasmus Villemoes wrote:
Loading flash.bin using uuu fails when flash.bin does not have the
right size.
When flash.bin is loaded from some storage medium (sd card/emmc), SPL
just loads some random garbage bytes from beyond what has been
populated when flash.bin was written, b
Hi Ilias,
On Thu, 24 Oct 2024 at 07:25, Ilias Apalodimas
wrote:
> Since lwIP and mbedTLS have been merged we can tweak the config options
> and enable TLS1.2 support. Add RSA and ECDSA by default and enable
> enough block cipher modes of operation to be comatible with modern
> TLS requirements a
On Thu, Oct 24, 2024 at 09:35:36AM -0400, Raymond Mao wrote:
> Hi Tom,
>
> On Wed, 23 Oct 2024 at 20:23, Tom Rini wrote:
>
> > On Tue, Oct 22, 2024 at 01:05:21PM -0700, Raymond Mao wrote:
> >
> > > Motivations for changes:
> > > Current SMBIOS library and command-line tool is not fully matching
Hi Tom,
On Wed, 23 Oct 2024 at 20:23, Tom Rini wrote:
> On Tue, Oct 22, 2024 at 01:05:21PM -0700, Raymond Mao wrote:
>
> > Motivations for changes:
> > Current SMBIOS library and command-line tool is not fully matching with
> > the requirements:
> > 1. Missing support for other mandatory types (
On Tue, 22 Oct 2024 at 09:48, Peter Robinson wrote:
>
> > On Mon, Oct 21, 2024 at 01:38:08PM +0200, Simon Glass wrote:
> > > There has been an LED framework in U-Boot which uses driver model for
> > > about 9 years now. Recent work is underway to improve it and provide
> > > more features. It is p
On Thu, Oct 24 2024, Marek Vasut wrote:
> On 10/24/24 12:01 PM, Rasmus Villemoes wrote:
>> I enabled IMX_HAB on an imx8mp board, but even though I knew about the
>> implementation, I forgot that I had to provide a sane value for
>> SPL_LOAD_FIT_ADDRESS. The help text for IMX_HAB doesn't mention t
Provide Sphinx style documentation for struct ext2_inode.
Signed-off-by: Heinrich Schuchardt
---
include/ext_common.h | 30 +++---
1 file changed, 27 insertions(+), 3 deletions(-)
diff --git a/include/ext_common.h b/include/ext_common.h
index b09bbde116a..a85ac04f79a 100
Loading flash.bin using uuu fails when flash.bin does not have the
right size.
When flash.bin is loaded from some storage medium (sd card/emmc), SPL
just loads some random garbage bytes from beyond what has been
populated when flash.bin was written, but when loaded via uuu, SPL
hangs waiting for t
On 10/24/24 12:01 PM, Rasmus Villemoes wrote:
I enabled IMX_HAB on an imx8mp board, but even though I knew about the
implementation, I forgot that I had to provide a sane value for
SPL_LOAD_FIT_ADDRESS. The help text for IMX_HAB doesn't mention this
implicit requirement, and there's no build-time
Hi all,
This is a respin of [0] adding https support to wget. In short
patch#1 enables the crypto algorithms we need in mbedTLS
patches#2, #3 enable anf fix the lwIP part we need
patch#4 is adding https:// parsing support in our wget
patch#5 is making https:// the default for QEMU lwip defconfig
We now can use a combination og lwIP & mbedTLS and download from
https://. Describe the config options needed to enable it as well
as some limitations
Reviewed-by: Simon Glass
Signed-off-by: Ilias Apalodimas
---
doc/develop/uefi/uefi.rst | 45 +--
1 file chan
Hi Martin,
> The functions fdt_simplefb_add_node and fdt_simplefb_enable_and_mem_rsv
> are only available if CONFIG_FDT_SIMPLEFB is enabled.
Is this a follow up on the patch [1] you sent a month ago? If so it's
not really a v1, and you should add a chnagelog as to what's changed
as well as cc: th
QEMU already has an lwip variant of a defconfig. That defconfig
is also configured with mbedTLS by default. So let's enable the
remaining config options to enable wget for https:// as well
and test that codepath in the CI
Reviewed-by: Jerome Forissier
Reviewed-by: Peter Robinson
Reviewed-by: Sim
With the recent changes of lwip & mbedTLS we can now download from
https:// urls instead of just http://.
Adjust our wget lwip version parsing to support both URLs.
While at it adjust the default TCP window for QEMU since https seems to
require at least 16384
Signed-off-by: Ilias Apalodimas
---
From: Javier Tia
SNI, or Server Name Indication, is an addition to the TLS encryption
protocol that enables a client device to specify the domain name it is
trying to reach in the first step of the TLS handshake, preventing
common name mismatch errors and not reaching to HTTPS server that
enforce
From: Javier Tia
The current code support mbedTLS 2.28. Since we are using a newer
version in U-Boot, update the necessary accessors and the lwIP codebase
to work with mbedTLS 3.6.0. It's worth noting that the patches are
already sent to lwIP [0]
While at it enable LWIP_ALTCP_TLS and enable TLS
Since lwIP and mbedTLS have been merged we can tweak the config options
and enable TLS1.2 support. Add RSA and ECDSA by default and enable
enough block cipher modes of operation to be comatible with modern
TLS requirements and webservers
Signed-off-by: Ilias Apalodimas
---
lib/mbedtls/Kconfig
We currently call efi_free_pages() with a notify flag and explicitly
update the efi memory map. That's not needed as lmb_free_flags() will do
that for us if the LMB_NONOTIFY flag is removed
Signed-off-by: Ilias Apalodimas
---
lib/efi_loader/efi_memory.c | 14 ++
1 file changed, 6 ins
We never free and unmap the memory on errors and we never unmap it when
freeing it. This won't cause any problems on actual hardware but it will
on sandbox
Fixes: commit 22f2c9ed9f53 ("efi: memory: use the lmb API's for allocating and
freeing memory")
Signed-off-by: Ilias Apalodimas
---
lib/efi
We never unmap the memory used to update the EFI memory map after
notifications
Fixes: commit 2f6191526a13 ("lmb: notify of any changes to the LMB memory map")
Signed-off-by: Ilias Apalodimas
---
lib/lmb.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/lib/lmb.c b/lib/lmb.c
index 890e2cbfdf
From: Saeed Nowshadi
In previous version of pwm driver, the polarity of pwm were implemented
in reverse. In recent release, that issue in the driver is fixed,
therefore, correctly set the polarity in the device tree.
Signed-off-by: Saeed Nowshadi
Signed-off-by: Michal Simek
---
arch/arm/dts
* Describe the fields of struct fs_dir_stream.
* Update fs_readdir() and fs_opendir() description.
* Fix Sphinx errors.
Signed-off-by: Heinrich Schuchardt
---
include/fs.h | 66
1 file changed, 41 insertions(+), 25 deletions(-)
diff --git a/i
I enabled IMX_HAB on an imx8mp board, but even though I knew about the
implementation, I forgot that I had to provide a sane value for
SPL_LOAD_FIT_ADDRESS. The help text for IMX_HAB doesn't mention this
implicit requirement, and there's no build-time warning; the default
0x0 value just ends up bei
Create an SoC R5 dtsi file that could be used at board level R5 files. This
would help in keeping the SoC level changes in sync across board files.
Signed-off-by: Manorit Chawdhry
---
Test logs: https://gist.github.com/manorit2001/108a42ab67e936707f47f71e1d18e90a
---
arch/arm/dts/k3-am69-r5-sk.d
* Describe the fields of struct fs_dir_stream.
* Update fs_readdir() and fs_opendir() description.
* Fix Sphinx errors.
* Add include/fs.h to the API documentation.
Heinrich Schuchardt (2):
fs: improve API documentation
doc: include file-system API into HTML docs
doc/api/fs.rst| 7 +
Hi,
On Thu, 17 Oct 2024 17:12:05 +0300, Dmitry Rokosov wrote:
> The patch series include changes:
> - move ab_select_slot() documentation to @ notation
> - redesign 'bcb' command to U_BOOT_LONGHELP approach
> - move ab_select command to bcb subcommands
> - introduce the ab_dump com
Hi,
On Tue, 01 Oct 2024 18:06:10 +0200, Neil Armstrong wrote:
> With DM_SPI_FLASH is enabled, the code uses the legacy
> SPI FLASH code leading to probable errors since it doesn't
> use speed and mode provided by DT.
>
> This adds the DM functions as dummy inline functions
> to add both legacy an
Add tee node in SoC u-boot device trees. Each board adds their specific
load and entry addresses for the op-tee image in the respective
board-u-boot.dtsi file.
Signed-off-by: Yannic Moog
---
arch/arm/dts/imx8mm-u-boot.dtsi | 15 ++-
arch/arm/dts/imx8mn-u-boot.dtsi | 15 ++
Add documentation for the phyBOARD-Pollux i.MX 8M Plus on OP-TEE
integration.
Also add missing '-' to TF-A build instruction while at it.
Signed-off-by: Yannic Moog
---
doc/board/phytec/phycore-imx8mp.rst | 26 +-
1 file changed, 25 insertions(+), 1 deletion(-)
diff --gi
The phyBOARD-Polis i.MX 8M Mini expects 0x5600 address to load optee.
Signed-off-by: Yannic Moog
---
arch/arm/dts/imx8mm-phyboard-polis-rdk-u-boot.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/imx8mm-phyboard-polis-rdk-u-boot.dtsi
b/arch/arm/dts/imx8mm-phyboard-
The phyBOARD-Pollux expects 0x5600 address to load optee.
Signed-off-by: Yannic Moog
---
arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
b/arch/arm/dts/imx8mp-phyboard-pollux-rdk
Add instructions on how to build and package OP-TEE for the
phycore-imx8mm based boards. The build instructions are identical for
phyGATE-Tauri-L and phyBOARD-Polis.
Also fix missig '-' for TF-A build instructions.
Signed-off-by: Yannic Moog
---
doc/board/phytec/imx8mm-phygate-tauri-l.rst | 26 +
The phyGATE-Tauri-L expects 0x5600 address to load optee.
Signed-off-by: Yannic Moog
---
arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi
b/arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi
There have been attempts to get op-tee node integrated upstream in the
past [1][2]. The challenge is on how to handle the load and entry
addresses where the op-tee image should be loaded to.
Different SoC families and architectures have different RAM base
addresses. Further the final addresses can
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