Hi,
On Wed, 28 Aug 2024 08:37:57 -0600, Joshua Watt wrote:
> The backup offset is in bytes, but was incorrectly be interpreted as
> blocks, leading to it being written to the wrong location. Fix the
> calculation, clarify that ANDROID_AB_BACKUP_OFFSET is in bytes and must
> be a multiple of the bl
On 04.09.24 19:29, Frank Wunderlich wrote:
>
>
>> Gesendet: Mittwoch, 04. September 2024 um 19:16 Uhr
>> Von: "Jan Kiszka"
>> OK, our overlay sources are on their way into mainline, will only take
>> until 6.12-rc1 to get them here. To accelerate the preparation, I ported
>> that change to a loc
On Wed, 4 Sept 2024 at 17:30, Michal Simek wrote:
>
>
>
> On 8/30/24 13:40, Sughosh Ganu wrote:
> >
> > The following set of patches are miscellaneous fixes and some
> > hardening of the FWU update logic.
> >
> > Sughosh Ganu (6):
> >fwu: v2: perform some checks before reading metadata
> >
Read chipselect properties from DT which are populated using 'reg'
property and save it in plat->cs[] array for later use.
Also read multi chipselect capability which is used for
parallel-memories and return errors if they are passed on using DT but
driver is not capable of handling it.
Adding th
Add support for parallel memories in zynq_qspi.c driver. In case of
parallel memories STRIPE bit is set and sent to the qspi ip, which will
send data bits to both the flashes in parallel. However for few commands
we should not use stripe, instead send same data to both the flashes.
Those commands a
Add support for parallel memories in zynqmp_gqspi.c driver. In case of
parallel memories STRIPE bit is set and sent to the qspi ip, which will
send data bits to both the flashes in parallel. However for few commands
we should not use stripe, instead send same data to both the flashes.
Those command
Enable the SPI_ADVANCE config option for all xilinx platforms, as
this is required for parallel-memories.
Signed-off-by: Venkatesh Yadav Abbarapu
---
configs/xilinx_versal_net_virt_defconfig | 1 +
configs/xilinx_versal_virt_defconfig | 1 +
configs/xilinx_zynq_virt_defconfig | 1 +
co
From: Ashok Reddy Soma
Add support for parallel memories and stacked memories configuration
in read_bar and write_bar functions.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Venkatesh Yadav Abbarapu
---
drivers/mtd/spi/spi-nor-core.c | 55 +-
1 file changed,
From: Ashok Reddy Soma
Add support for parallel memories flash configuration in read status
register and read flag status register functions.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Venkatesh Yadav Abbarapu
---
drivers/mtd/spi/spi-nor-core.c | 50 --
1 f
By default flash lock option is enabled, enable this option only
when it is required. By disabling the lock config will save some
amount of memory.
Signed-off-by: Venkatesh Yadav Abbarapu
---
configs/mx6sabresd_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/mx6sabresd_defc
In parallel mode, the current implementation assumes that a maximum of
two flashes are connected. The QSPI controller splits the data evenly
between both the flashes so, both the flashes that are connected in
parallel mode should be identical.
During each operation SPI-NOR sets 0th bit for CS0 & 1s
This series adds support for Xilinx qspi parallel and
stacked memeories.
In parallel mode, the current implementation assumes that a maximum
of two flashes are connected. The QSPI controller splits the data
evenly between both the flashes so, both the flashes that are connected
in parallel mode sh
Hello Tom,
On Wed, Sep 04, 2024 at 03:27:21PM -0600, Tom Rini wrote:
> On Sat, Aug 31, 2024 at 03:49:11PM +0200, Francesco Dolcini wrote:
> > On Fri, Aug 30, 2024 at 02:51:19PM -0600, Tom Rini wrote:
> > > On Mon, Aug 26, 2024 at 03:19:33PM -0300, Hiago De Franco wrote:
> > >
> > > > From: Hiago
On Thu, 1 Aug 2024 17:55:11 -0500
Chris Morgan wrote:
> From: Jernej Skrabec
>
> Adjust H616 DDR3 DRAM settings to be in line with vendor driver.
>
> Signed-off-by: Jernej Skrabec
> Tested-by: Chris Morgan
> ---
> arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c | 5 -
> 1 file change
On Sat, 3 Aug 2024 16:17:26 +0300
Mikhail Kalashnikov wrote:
Hi Mikhail,
> On 02.08.2024 01:55, Chris Morgan wrote:
> > From: Jernej Skrabec
> >
> > Adjust H616 LPDDR3 DRAM settings to be in line with vendor driver.
> >
> > Signed-off-by: Jernej Skrabec
> > Tested-by: Chris Morgan
> > ---
> >
On Thu, 29 Aug 2024 12:56:01 -0600, Tom Rini wrote:
> Rather than guess what we need to name our u-boot.bin file as for it to
> boot make use of the kernel= option to always call it u-boot.bin and
> then on 64bit platforms (and since future platforms use rpi_arm64 this
> list should not grow) also
In case lists_driver_lookup_name("rst_gen3") fails, the clk_gen3 driver
has to be unbound before erroring out. Reorder the function such that
both clk_gen3 and rst_gen3 drivers are looked up first, if either look
up fails then the function errors out right away. Second, the clk_gen3
is bound, if bi
On Sun, Sep 01, 2024 at 02:09:43PM -0600, Simon Glass wrote:
> Hi Ilias,
>
> On Fri, 30 Aug 2024 at 03:27, Ilias Apalodimas
> wrote:
> >
> > Hi Simon,
> >
> > On Fri, 30 Aug 2024 at 03:59, Simon Glass wrote:
> > >
> > > Hi Jerome,
> > >
> > > On Thu, 29 Aug 2024 at 10:21, Jerome Forissier
> > >
On Thu, Aug 29, 2024 at 08:57:48AM -0600, Simon Glass wrote:
> Some code has crept in which ignores this parameter. Fix this and add a
> little debugging.
>
> Signed-off-by: Simon Glass
Can you please add a Fixes tag, as that will help in reviewing this too,
to ensure we aren't breaking the cas
On Thu, Aug 29, 2024 at 08:57:46AM -0600, Simon Glass wrote:
> When the best-match feature fails to find something, use the provided
> config name as a fallback. The allows SPL to select a suitable config
> when best-match is enabled.
>
> Signed-off-by: Simon Glass
> ---
>
> boot/image-fit.c |
On Sat, Aug 31, 2024 at 03:49:11PM +0200, Francesco Dolcini wrote:
> On Fri, Aug 30, 2024 at 02:51:19PM -0600, Tom Rini wrote:
> > On Mon, Aug 26, 2024 at 03:19:33PM -0300, Hiago De Franco wrote:
> >
> > > From: Hiago De Franco
> > >
> > > When SPL_FS_LOADER is set to y and FS_LOADER is not enab
On Wed, Aug 28, 2024 at 11:02:21AM +0100, Oliver Gaskell wrote:
> Adds support for Analog Devices' SC598-SOM-EZKIT board. Includes:
> - CONFIG options common to all SC5xx SoCs
> - SoC specific configs in mach-sc5xx/Kconfig
> - Memory Map for SPL
> - Necessary board-specific init functions
> - Boar
On Wed, Aug 28, 2024 at 11:02:20AM +0100, Oliver Gaskell wrote:
> Moves common options between all SC5xx series boards to the ARCH_SC5XX
> option instead of duplicating them.
>
> Also, it was possible to select multiple of the SoC support options.
> Given a U-Boot binary can only support a single
On Tue, Aug 27, 2024 at 07:45:31PM -0600, Simon Glass wrote:
> Some boards want to use DM_MMC in TPL so add an option for that.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/mmc/Kconfig | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc
On Tue, Aug 27, 2024 at 07:45:32PM -0600, Simon Glass wrote:
> When MMC booting fails it is sometimes hard to figure out what went
> wrong as there is no error code. It isn't even clear which MMC device
> was chosen, since SPL can have its own numbering.
>
> Add some debugging to help with this.
On Tue, Aug 27, 2024 at 07:45:26PM -0600, Simon Glass wrote:
> Some boards want to use RAM in TPL so add an option for that.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/ram/Kconfig | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
On Wed, Sep 04, 2024 at 10:18:40AM +0200, Rasmus Villemoes wrote:
> The Kconfig symbols SYS_ARCH, SYS_CPU, SYS_SOC, SYS_VENDOR and
> SYS_BOARD are defined in arch/Kconfig as having type string, and most
> board files simply amend those definition with suitable
>
> default "foo"
>
> or
>
> d
On Wed, Sep 04, 2024 at 10:17:43AM +0200, Stefan Roese wrote:
> Hi Tom,
>
> I know it's late in the release process. But please consider
> pulling these Turris Omnia DDR related patches / fixes, which
> Marek would like to see in the upcoming release:
>
Applied to u-boot/master, thanks!
--
To
> Gesendet: Mittwoch, 04. September 2024 um 19:16 Uhr
> Von: "Jan Kiszka"
> OK, our overlay sources are on their way into mainline, will only take
> until 6.12-rc1 to get them here. To accelerate the preparation, I ported
> that change to a local branch - just to find out that OF_UPSTREAM has n
On 27.08.24 12:39, Sumit Garg wrote:
> On Tue, 27 Aug 2024 at 15:05, Jan Kiszka wrote:
>>
>> On 27.08.24 09:13, Sumit Garg wrote:
>>> On Mon, 26 Aug 2024 at 18:02, Jan Kiszka wrote:
On 26.08.24 09:10, Sumit Garg wrote:
> On Mon, 26 Aug 2024 at 12:19, Jan Kiszka wrote:
>>
>>
On Wed, Sep 04, 2024 at 01:48:43PM +0100, Peter Robinson wrote:
> Hi Simon,
>
> > I wonder if we could leave out the SHA stuff? The algorithms are
>
> One of the big advantages of the mbedtls when it comes to all things
> security is that it's seen a wide audit of it's code which for a lot
> of u
On Wed, Sep 04, 2024 at 09:54:15AM +0200, Jerome Forissier wrote:
> Hi Simon,
>
> On 8/29/24 16:05, Simon Glass wrote:
> > Hi Jerome,
> >
> > On Fri, 23 Aug 2024 at 07:49, Jerome Forissier
> > wrote:
> >>
> >> Add what it takes to enable NETDEVICES with NET_LWIP and enable DHCP as
> >> well as t
On Tue, Sep 03, 2024 at 23:59 GMT, Rasmus Villemoes wrote:
> scripts/Makefile.lib | 5 +
> 1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
> index df754d1d9f0..5dfb4b6e46f 100644
> --- a/scripts/Makefile.lib
> +++ b/scripts/Makefile.
Hi Simon,
On 8/29/24 16:05, Simon Glass wrote:
> Hi Jerome,
>
> On Fri, 23 Aug 2024 at 07:49, Jerome Forissier
> wrote:
>>
>> Add what it takes to enable NETDEVICES with NET_LWIP and enable DHCP as
>> well as the dhcp command. CMD_TFTPBOOT is selected by BOOTMETH_EFI due
>> to this code having a
On 9/3/2024 5:14 PM, Neha Malcom Francis wrote:
Add a driver for the BIST module which currently includes support for
BIST IPs that trigger PBIST (Memory BIST).
Signed-off-by: Neha Malcom Francis
---
drivers/misc/Kconfig | 8 +
drivers/misc/Makefile | 1 +
d
On 9/3/2024 5:13 PM, Neha Malcom Francis wrote:
Add bootph-pre-ram as well as the clocks and power-domains for
MAIN_R5_2_x. This ensures that LPSC sets the appropriate power and clock
and allows for BIST to turn the cores on and off for running the
self-test at R5 SPL stage.
Signed-off-by: Neh
On 9/3/2024 5:13 PM, Neha Malcom Francis wrote:
Add DT node for PBIST_14 that is responsible for triggering the BIST
self-tests for the MAIN_R5_2_x cores.
Signed-off-by: Neha Malcom Francis
---
dts/upstream/src/arm64/ti/k3-j784s4-main.dtsi | 10 ++
1 file changed, 10 insertions(+)
On 9/3/2024 5:13 PM, Neha Malcom Francis wrote:
Add clock and power domains for MAIN_R5_2_0, MAIN_R5_2_1 and PBIST_14.
Please keep provision for other R core as well, BIST may be needed in
future on those
Signed-off-by: Neha Malcom Francis
---
arch/arm/mach-k3/r5/j784s4/clk-data.c |
Hi Simon,
> I wonder if we could leave out the SHA stuff? The algorithms are
One of the big advantages of the mbedtls when it comes to all things
security is that it's seen a wide audit of it's code which for a lot
of usecases is very useful from a security PoV, I'm not sure the
amount of audit t
On 8/30/24 13:40, Sughosh Ganu wrote:
The platform transitions out of Trial State into the Regular State
only when all the images in the update bank have been accepted. Check
for this condition before transitioning out of Trial State.
Signed-off-by: Sughosh Ganu
---
include/fwu.h
On 8/30/24 13:40, Sughosh Ganu wrote:
When in Trial State, the platform keeps a count of the number of times
it has booted in the Trial State. Once the threshold of the maximum
allowed count exceeds, the platform reverts to boot from a different
bank on subsequent boot, thus coming out of the
On 8/30/24 13:40, Sughosh Ganu wrote:
The following set of patches are miscellaneous fixes and some
hardening of the FWU update logic.
Sughosh Ganu (6):
fwu: v2: perform some checks before reading metadata
fwu: v2: try reading both copies of metadata
fwu: v1: do a version check for
On Wed, 4 Sept 2024 at 13:45, Michal Simek wrote:
>
>
>
> On 8/30/24 13:40, Sughosh Ganu wrote:
> >
> > The following set of patches are miscellaneous fixes and some
> > hardening of the FWU update logic.
> >
> > Sughosh Ganu (6):
> >fwu: v2: perform some checks before reading metadata
> >
low,
"androidboot.force_normal_boot",
"1", false);
---
base-commit: 360aaddd9cea8c256f50c576794415cadfb61819
change-id: 20240904-bootmeth-bootloader-version-2a2b35fce4cf
Best regards,
--
Mattijs Korpershoek
On Wed, 4 Sep 2024 10:02:16 +0530
Sumit Garg wrote:
Hi,
> Hi Chris,
>
> On Fri, 30 Aug 2024 at 21:27, Chris Morgan wrote:
> >
> > From: Chris Morgan
> >
> > Add pinctrl nodes for the r_i2c node. Without the pinmux defined the
> > r_i2c bus may fail to work, possibly if the bootloader uses rsb
On 8/30/24 13:40, Sughosh Ganu wrote:
The version 2 of the FWU metadata has a top level structure, followed
by optional information on the updatable images. Perform some sanity
checks on some of the fields in the top level structure to determine
if the rest of the structure has to be read.
Si
Rasmus Villemoes writes:
So the moment I sent this I noticed that my $subject is a bit odd, in
that there's no "type string" anywhere, with or without the quotes. A
better $subject would have been
treewide: drop redundant type annotations for SYS_SOC and friends
Rasmus
The Kconfig symbols SYS_ARCH, SYS_CPU, SYS_SOC, SYS_VENDOR and
SYS_BOARD are defined in arch/Kconfig as having type string, and most
board files simply amend those definition with suitable
default "foo"
or
default "foo" if BAR
stanzas. But some also include a redundant repetition of the typ
Hi Tom,
I know it's late in the release process. But please consider
pulling these Turris Omnia DDR related patches / fixes, which
Marek would like to see in the upcoming release:
- Turris Omnia DDR speed change with reset button (
On 8/30/24 13:40, Sughosh Ganu wrote:
The following set of patches are miscellaneous fixes and some
hardening of the FWU update logic.
Sughosh Ganu (6):
fwu: v2: perform some checks before reading metadata
fwu: v2: try reading both copies of metadata
fwu: v1: do a version check for
On 8/29/24 10:08, Marek Behún wrote:
Hello Stefan,
this series adds the ability to select 1333H DDR speed mode for DDR
training (instead of the default 1600K) with the factory reset button.
If possible, I would like if this series went for U-Boot 2024.10
release. The heavy stuff to support DDR
On 8/30/24 13:40, Sughosh Ganu wrote:
The FWU code supports both versions of the FWU metadata, i.e. v1 and
v2. A platform can then select one of the two versions through a
config symbol. Put a dependency in the FWU metadata version selection
config symbol to ensure that both versions of the me
On 8/30/24 13:40, Sughosh Ganu wrote:
In the version 2 of the FWU metadata, the metadata is broken into two
parts, a top-level structure, which provides information on the total
size of the structure among other things. Try reading the primary
partition first, and if that fails, try reading th
Hi Sebastian,
On 2024-09-03 20:16, Sebastian Reichel wrote:
> This adds TCPM framework in preparation for fusb302 support, which can
> handle USB power delivery messages. This is needed to solve issues with
> devices, that are running from a USB-C port supporting USB-PD, but not
> having a battery
On Tue, 3 Sept 2024 at 19:22, Michal Simek wrote:
>
>
>
> On 8/30/24 13:40, Sughosh Ganu wrote:
> > The version 2 of the FWU metadata has a top level structure, followed
> > by optional information on the updatable images. Perform some sanity
> > checks on some of the fields in the top level struc
On Tue, 3 Sept 2024 at 22:37, Michal Simek wrote:
>
>
>
> On 8/30/24 13:40, Sughosh Ganu wrote:
> > In the version 2 of the FWU metadata, the metadata is broken into two
> > parts, a top-level structure, which provides information on the total
> > size of the structure among other things. Try read
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