On Fri, Aug 02, 2024 at 06:26:35PM +0200, Jerome Forissier wrote:
> Add what it takes to enable NETDEVICES with NET_LWIP and enable DHCP as
> well as the dhcp command. CMD_TFTPBOOT is selected by BOOTMETH_EFI due
> to this code having an implicit dependency on do_tftpb().
>
> Signed-off-by: Jerom
024-08-01
> 15:35:28 -0600)
>
> are available in the Git repository at:
>
> https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git
> tags/u-boot-imx-master-20240802
>
> for you to fetch changes up to 0ee02e1c252da85a6ac75865ca33accde69072b7:
>
> config: Adjust Phy
With the commit 6afdb1585112 ("dm: core: migrate debug() messages to use
dm_warn") use of DM_WARN/SPL_DM_WARN print a lot of debug messages.
Disable the SPL_DM_WARN Kconfig option to remove verbose logging and
restore normal serial console output during boot.
Signed-off-by: Jonas Karlman
---
co
hi,
please don't merge this for a while.
I'm thinking opposite change may be better to align with ROCK 4/5
series. (OTG port is "host")
any comment?
--
FUKAUMI Naoki
Radxa Computer (Shenzhen) Co., Ltd.
On 8/2/24 11:58, FUKAUMI Naoki wrote:
since dr_mode of "usb_host0_xhci" is "otg", we can
Add aliases for gpio controllers to soc u-boot dtsi files that are
missing aliases in soc dtsi files to ensure dev_seq() return the
expected number when a gpio controller is included in SPL.
Also drop the aliases from rk3288-u-boot.dtsi, they are already part of
rk3288.dtsi.
Signed-off-by: Jonas
Add gpio-ranges props to supported SoCs based on the following Linux
patches:
ARM: dts: rockchip: add gpio-ranges property to gpio nodes
https://lore.kernel.org/all/26007385-81dc-9961-05d5-8b9a0969d...@gmail.com/
arm64: dts: rockchip: add gpio-ranges property to gpio nodes
https://lore.kernel.org
Use the pinctrl pin offset to get_gpio_mux() to remove the bank num
dependency and instead only use the bank num to assign a bank name.
Most Rockchip SoCs use all 32 pins of each gpio controller, meaning the
pinctrl pin offset typically is aligned to 32.
However, for gpio0 on RK3288 only 24 pins
Add a request() ops that call pinctrl_gpio_request() when the required
gpio-ranges prop has been defined to signal pinctrl driver to use gpio
pinmux.
Signed-off-by: Jonas Karlman
---
v2: New patch from "rockchip: Add gpio request() ops" series
---
drivers/gpio/rk_gpio.c | 10 ++
1 file c
Implement gpio_request_enable() ops so that the gpio request() ops can
be implemented and a gpio requested pin automatically is pinmuxed for
gpio use, similar to Linux kernel.
Signed-off-by: Jonas Karlman
---
v2: New patch from "rockchip: Add gpio request() ops" series
---
drivers/pinctrl/rockch
Get pinctrl device from gpio-ranges phandle when the property exists,
fallback to get the first pinctrl device.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
---
v2: Collect r-b tag
---
drivers/gpio/rk_gpio.c | 27 +++
1 file changed, 19 insertions(+), 8 deletions
Add a way to get_gpio_mux() based on the pinctrl pin offset, use -1 as
banknum to use the pinctrl pin offset mode instead of bank pin offset.
This mode will be used by the gpio driver to ensure a pin used by gpio
request() and get_function() ops always refer to the same pinctrl pin.
Also add veri
Add get_pins_count(), get_pin_name() and get_pin_muxing() ops to support
the pinmux status cmd.
=> pinmux dev pinctrl
dev: pinctrl
=> pinmux status
GPIO0_A0 : gpio
GPIO0_A1 : func-1
GPIO0_A2 : gpio
GPIO0_A3 : gpio
GPIO0_A4 : func-1
GPIO0_A5 : gpio
GPIO0_A6 : gpio
GPIO0
Add a pin_to_bank() helper that can locate a pin bank based on the pin
offset, to be used in get_gpio_mux() and gpio_request_enable() ops.
Reset ctrl->nr_pins to 0 so that pin_to_bank() can locate a bank after
the second probe in U-Boot proper.
Signed-off-by: Jonas Karlman
---
v2: New patch spli
This series includes some cleanup, add support for using the pinmux
status cmd and add support for the gpio request ops.
Following is an example on a Radxa ROCK 5A (RK3588S):
=> pinmux dev pinctrl
dev: pinctrl
=> pinmux status
GPIO0_A0 : gpio
GPIO0_A1 : func-2
GPIO0_A2 : gpio
GPI
Use syscon_regmap_lookup_by_phandle() to simplify the code.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
---
v2: Collect r-b tag
---
.../pinctrl/rockchip/pinctrl-rockchip-core.c | 39 ++-
1 file changed, 12 insertions(+), 27 deletions(-)
diff --git a/drivers/pinctrl/ro
The Radxa ZERO 3W/3E is an ultra-small, high-performance single board
computer based on the Rockchip RK3566, with a compact form factor and
rich interfaces.
Implement rk_board_late_init() to set correct fdtfile env var and
board_fit_config_name_match() to load correct FIT config based on what
boar
What model of Radxa ZERO 3W/3E board can be identified using ADC at
runtime, add a Kconfig symbol to allow use of ADC in SPL.
This will be used to identify board model in SPL to allow loading
correct FIT configuration and FDT for U-Boot proper at SPL phase.
Signed-off-by: Jonas Karlman
---
v2:
-
From: Trevor Woerner
Add names to the pins of the general-purpose expansion header as given
in the Radxa documentation[1] following the conventions in the kernel[2]
to make it easier for users to correlate pins with functions when using
utilities such as 'gpioinfo'.
[1] https://docs.radxa.com/en
From: FUKAUMI Naoki
align with other Radxa products.
- mmc0 is eMMC
- mmc1 is microSD
for ZERO 3E, there is no eMMC, but aliases should start at 0, so mmc0
is microSD as exception.
Fixes: 1a5c8d307c83 ("arm64: dts: rockchip: Add Radxa ZERO 3W/3E")
Signed-off-by: FUKAUMI Naoki
Changes in v3:
The Radxa ZERO 3W/3E is an ultra-small, high-performance single board
computer based on the Rockchip RK3566, with a compact form factor and
rich interfaces.
The ZERO 3W and ZERO 3E are basically the same size and model, but
differ only in storage and network interfaces.
- eMMC (3W)
- SD-card (bot
This series add support for the RK3566 based Radxa ZERO 3W/3E boards.
rk_board_late_init() and board_fit_config_name_match() has been
implemented to set fdtfile env var and load correct FIT config based
on what board is detected at runtime.
Features tested on a ZERO 3W 8GB v1.11:
- SD-card boot
-
Hi Sebastian,
On 2024-08-02 19:59, Sebastian Reichel wrote:
> Since older U-Boot releases do not negotiate USB PD, the kernel
> DT may not enable the USB-C controller by default to avoid a
> regression. The plan is to upstream it with 'status = "fail";'
> instead. U-Boot should then mark it as 'st
From: Dragan Simic
Rename the Rockchip RK3588 SoC dtsi files and, consequently, adjust their
contents appropriately, to prepare them for the ability to specify different
CPU and GPU OPPs for each of the supported RK3588 SoC variants.
As already discussed, [1][2][3][4] some of the RK3588 SoC vari
The ROCK 5 ITX as the name suggests is made in the ITX form factor and
actually built in a form to be used in a regular case even providing
connectors for regular front-panel io.
It can be powered either by 12V, ATX power-supply or PoE.
Notable peripherals are the 4 SATA ports, M.2 M-Key slot, M.
The Rock 5 ITX is board in ITX form factor using the RK358 SoC
It can be powered either by 12V, ATX power-supply or PoE.
Notable peripherals are the 4 SATA ports, M.2 M-Key slot, M.2 E-key slot,
2*2.5Gb PCIe-connected Ethernet NICs.
Display options are 2*HDMI, DP via USB-c, eDP + 2*DSI via PCB c
From: Alexey Charkov
This includes the necessary device tree data to allow thermal
monitoring on RK3588(s) using the on-chip TSADC device, along with
trip points for automatic thermal management.
Each of the CPU clusters (one for the little cores and two for
the big cores) get a passive cooling
Support for the Rock 5 ITX is now part of 6.11-rc1, so add
support for it in u-boot as well.
The naming follows Dragan's suggestion in the mainline submission:
"the name of this board deviates from the standard Radxa naming scheme,
which is something like "ROCK " thus, "rock-5a" is
f
Hi Sebastian,
On 2024-08-02 19:59, Sebastian Reichel wrote:
> Enable support for the fusb302 USB Type-C controller.
>
> This will do early USB PD (power deliver) negotiation, which must happen
> within 5 seconds after the USB-C connector has plugged in according to
> the specification. It takes a
On Thu, Aug 01, 2024 at 04:40:03PM +0200, Jerome Forissier wrote:
>
>
> On 7/26/24 00:34, Tom Rini wrote:
> > On Thu, Jul 25, 2024 at 11:22:20AM -0600, Tom Rini wrote:
> >> On Thu, Jul 25, 2024 at 02:57:21PM +0200, Jerome Forissier wrote:
> >>
> >>> This is a rework of a patch series by Maxim Uva
res needs to be large enough to store both strings rem and target,
plus the path separator and the terminator.
Currently the space for the path separator is not accounted, so
the heap is corrupted by one byte.
Signed-off-by: Richard Weinberger
---
fs/squashfs/sqfs.c | 7 +--
1 file changed,
Rename each entry from CK to CLK to match the include in upstream kernel
linux.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7981.dtsi | 112 ++---
drivers/clk/mediatek/clk-mt7981.c | 552 -
include/dt-bindings/clock/mt7981-clk.h | 382 --
Convert to infracfg gates + muxes implementation now that it's
supported.
Drop infracfg-ao nodes and rename all infracfg-ao clocks to infracfg.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7981.dtsi | 46 +--
drivers/clk/mediatek/clk-mt7981.c | 26 ++-
Add and fix support for pwm3 clock. In the pwm DTSI node we were
actually using PWM2 clock for PWM3. Now that we have correct ID also add
the missing entry of gate and mux to support PWM3 clock.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7981.dtsi | 3 +--
drivers/clk/mediatek/
Replace infracfg clk ID with upstream linux version.
Add some missing clk for PWM3 and for PCIe. The same format is used here
with the factor first, then mux and then gates.
To correctly reference the gates in clk_gate function, define the
gates_offs value in clk_tree now that they are at an offs
Now that we can have advanced parent handling for mux, we can drop
spurious infracfg 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7981.
Drop the factor entry from mt7981-clk.h and reference to them in
mt7981.dtsi. Muxes and gates are updated to refer
Implement missing sgmii0/1 clock and update the compatible the DTS to
match upstream kernel linux and in preparation for OF_UPSTREAM support
since the ethernet node define these additional clocks.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7981.dtsi | 4 +-
drivers/clk/mediate
Fix wrong parent list for INFRA_PWM1_SEL mux. The list is incorrect and
the parents are just 2. This also match the upstream linux
implementation.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7981.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/cl
Fix wrong parent for TOP_FAUD clock. Upstream linux sets the parent for
TOP_FAUD to TOP_AUD_SEL instead of CB_CKSQ_40M.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7981.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/mediatek/clk-mt7981.c
b/
Swap wrong clock-names for spi nodes as they were wrong and the spi-clk
was referencing the sel-clk and the sel-clk was referencing the spi-clk.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7981.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/mt
Add missing clock for spi1 node. Clocks taken from upstream clock
definition and clock mux.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7981.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi
index 131adc00a56..d80eceb8d4c
Fix wrong clock definition for spi2 node as they reference spi0 clock
instead of spi2.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7981.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi
index 1056667ba65..131a
Fix wrong mux width for pwm2 and pwm1. Upstream have width 1 but U-Boot
have width set to 2. Change the value to follow upstream implementation.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7981.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/
Fix a typo for infra_i2c0_ck where 0 was misspelled as O.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7981.dtsi | 2 +-
drivers/clk/mediatek/clk-mt7981.c | 2 +-
include/dt-bindings/clock/mt7981-clk.h | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git
Add missing clock for infra_ipcie_pipe to make PCIe correctly work. This
clock is a parent of the fixed clock from topckgen cb_cksq_40m.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7981.c | 1 +
include/dt-bindings/clock/mt7981-clk.h | 3 ++-
2 files changed, 3 insertion
These are all the required patches to migrate clk and correctly support
OF_UPSTREAM. This will align the clk index to upstream to support the same
clk implementation with downstream and upstream DTS.
Christian Marangi (14):
clk: mediatek: mt7981: add missing clock for infra_ipcie_pipe
clk: med
Add missing A1/2SYS clock ID just as a reference for OF_UPSTREAM
support. These clocks are not defined and are not usable as current
clock topckgen OPs doesn't support gates.
These special node won't ever be used by uboot hence just add them for
reference.
Signed-off-by: Christian Marangi
---
i
Add missing PERIBUS_SEL clock to match upstream linux clk ID order. Also
convert pericfg to mux + gate implementation as now we have also mux on
top of gates.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7622.c | 22 +-
include/dt-bindings/clock/mt7622-clk.h | 59
Add missing clock PERI_UART4_PD for peri clock gates. This is needed to
match upstream linux clk ID in preparation for OF_UPSTREAM.
Also convert infracfg to mux + gate implementation as now we have mux on
top of gates.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7622.c |
Add missing infra clock MUX1_SEL needed for CPU clock. This is needed to
match the upstream clk ID order in preparation for OF_UPSTREAM.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7622.c | 24 +++-
include/dt-bindings/clock/mt7622-clk.h | 13 +++-
Add missing clock for MAIN_CORE_EN. This is a special clock as it's a
gate for the APMIXED clocks required as a parent for CPU clocks.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7622.c | 29 +++---
include/dt-bindings/clock/mt7622-clk.h | 1 +
2 fil
Move INFRA_TRNG clock to the bottom of the clk ID to match upstream
linux order. This is in preparation of OF_UPSTREAM.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7622.c | 2 +-
include/dt-bindings/clock/mt7622-clk.h | 10 +-
2 files changed, 6 insertions(+), 6
Rename AUDIO_AWB3 to AUDIO_AWB2 to match upstream linux naming in
preparation for OF_UPSTREAM support.
Signed-off-by: Christian Marangi
---
include/dt-bindings/clock/mt7622-clk.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/dt-bindings/clock/mt7622-clk.h
b/include
Fix broken peri_cgs clock with XTAL parents as they have wrong
definition of the parent type.
Correctly fix them and use CLK_PARENT_XTAL for them.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7622.c | 26 +++---
1 file changed, 15 insertions(+), 11 deletio
These are all the required patches to migrate clk and correctly support
OF_UPSTREAM. This will align the clk index to upstream to support the same
clk implementation with downstream and upstream DTS.
Christian Marangi (8):
clk: mediatek: mt7622: fix broken peri_cgs clk with XTAL parents
clk: m
Upstream kernel linux makes use of peri clock MUX to setup UART.
Add definition for these and add remap table as in the upstream clock ID
order gates are before MUX but we require MUX first and then clocks in
our downstream driver.
Convert the peri clk tree to MUX + GATE implementation.
Signed-o
Define remap table also for apmixedsys clock ID. The clock ID starts
from 1 instead of 0 in upstream kernel linux.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7623.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/clk/mediatek/clk-mt7623.c
b/dr
Define id_offs_map and use clk ID form upstream linux kernel to have a
1:1 match for the TOPCKGEN clock and permit usage of OF_UPSTREAM with
upstream dtsi.
For all the gate clock, the clk ID starts from 1 instead of zero. Define
an additional clock tree for them and set the .gates_offs to 1 to
acc
Split clk tree to dedicated topckgen and apmixed in preparation for
remap table.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7623.c | 25 -
1 file changed, 16 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7623.c
b/drivers/clk/
Fix broken peri_cgs and infra_cgs clock with XTAL parents as they have
wrong definition of the parent type.
Correctly fix them and use CLK_PARENT_XTAL for them.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7623.c | 27 ++-
1 file changed, 18 insertions
These are all the required patches to migrate clk and correctly support
OF_UPSTREAM. This will align the clk index to upstream to support the same
clk implementation with downstream and upstream DTS.
Christian Marangi (5):
clk: mediatek: mt7623: fix broken peri_cgs clk with XTAL parents
clk: m
Hi Paul,
On Thu, Jul 18, 2024 at 2:02 PM Fabio Estevam wrote:
> > Okay, thanks for checking, I will wait for the details and make the
> > necessary adjustments
>
> Please let us know if you have more information on this so we can
> proceed with this patch.
Please re-send this series whenever y
On Thu, Aug 1, 2024 at 11:47 AM Lukasz Majewski wrote:
>
> This change adds support for PCIe connected nvme disk - phyBOARD-Polis
> base board.
>
> One needs to call following commands in u-boot:
> > pci enum
> > nvme scan
> > nvme info
>
> And then ones to access proper file system (like fat[ls|l
On Thu, Aug 1, 2024 at 12:39 AM Zhiqiang Hou wrote:
>
> From: Hou Zhiqiang
>
> This patch set is to add a subcommand 'release' to the 'cpu' command
> in cmd/cpu.c, making the command is able to release a core to run
> baremetal and RTOS applications.
>
> Fixed some problems of the imx8_cpu.c and
On Wed, Jul 31, 2024 at 4:23 AM Yannic Moog wrote:
>
> Enable CMD_ERASEENV config option for
> imx8mm-phygate-tauri-l,
> phycore-imx8mm,
> phycore-imx8mp.
>
> ---
> Yannic Moog (3):
> configs: imx8mm-phygate-tauri-l_defconfig: enable CMD_ERASEENV
> configs: phycore-imx8mm_defconfig: en
On Mon, Jul 22, 2024 at 2:59 PM Fabio Estevam wrote:
>
> Instead of using the local imx7s-warp devicetree copies from U-Boot,
> convert the imx7s-warp board to OF_UPSTREAM so that the upstream
> kernel devicetree can be used instead.
>
> Signed-off-by: Fabio Estevam
Applied, thanks.
/custodians/u-boot-imx.git
tags/u-boot-imx-master-20240802
for you to fetch changes up to 0ee02e1c252da85a6ac75865ca33accde69072b7:
config: Adjust Phytec imx8mm module config to support NVME disk (2024-08-02
15:16:54 -0300)
u-boot-imx-master-20240802
--
CI: https
Newer Samsung SoCs (including newer Exynos, ExynosAuto, Google Tensor)
still use these IPs, or slightly newer versions of it.
Make these drivers available on these platforms by guarding
EXYNOS4/EXYNOS5 specific code behind their configs, and using CCF for
clocks on other platforms.
Tested S3C I2C
This has been dead code for many years now. Remove it.
Signed-off-by: David Virag
---
drivers/i2c/exynos_hs_i2c.c | 4
drivers/i2c/s3c24x0_i2c.c | 8
2 files changed, 12 deletions(-)
diff --git a/drivers/i2c/exynos_hs_i2c.c b/drivers/i2c/exynos_hs_i2c.c
index 2ab0bae449..189ce6d
This set of patches should enable the Samsung I2C drivers to work on
platforms other than EXYNOS4/EXYNOS5.
This has been tested on Exynos7885 with the S3C I2C driver.
With the clocks for it implemented in it's driver, this should also
enable S3C I2C to work on Exynos850.
While at it, clean up som
Hi Henrik,
On Fri, 2024-08-02 at 19:31 +0200, Henrik Grimler wrote:
[snip]
> The exynos_hs_i2c driver no longer compiles for exynos4 or exynos5
> with these changes, I am getting (with for example `make
> odroid-xu3_defconfig; make`):
>
> CC drivers/i2c/exynos_hs_i2c.o
> ../drivers/i2c/ex
On Fri, Aug 02, 2024 at 06:26:27PM +0200, Jerome Forissier wrote:
> This is a rework of a patch series by Maxim Uvarov: "net/lwip: add lwip
> library for the network stack" [1]. The goal is to introduce the lwIP TCP/IP
> stack [2] [3] as an alternative to the current implementation in net/,
> sele
Add new section for USB TypeC Port Manager (TCPM) support, which
is needed to figure out cable orientation of USB-C plus and to do
USB PD communication.
Signed-off-by: Sebastian Reichel
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c
Now that all code has been prepared update the default configuration to
make use of it.
Signed-off-by: Sebastian Reichel
---
configs/rock5b-rk3588_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig
index fc118cea7b
Add USB-C controller (fusb302), which will be used by U-Boot to
initialize USB-PD. This is needed, because USB-PD communication
must happen within 5 seconds after the USB-C connector got plugged.
On my Rock 5B it often takes 5 seconds to jump to the Linux binary,
so it must happen before Linux is i
Since older U-Boot releases do not negotiate USB PD, the kernel
DT may not enable the USB-C controller by default to avoid a
regression. The plan is to upstream it with 'status = "fail";'
instead. U-Boot should then mark it as 'status = "okay";' if
it negotiated USB PD. Currently existing upstream
This adds TCPM framework in preparation for fusb302 support, which can
handle USB power delivery messages. This is needed to solve issues with
devices, that are running from a USB-C port supporting USB-PD, but not
having a battery.
Such a device currently boots to the kernel without interacting wi
Now that the TCPM framework exists we can introduce fusb302
driver using it. This chip is a very common USB-C controller
chip with PD support, which can be found in the Radxa Rock 5B
among many other boards. Apart from Power Delivery, it also
handles detection of the cable orientation. That can be
Enable support for the fusb302 USB Type-C controller.
This will do early USB PD (power deliver) negotiation, which must happen
within 5 seconds after the USB-C connector has plugged in according to
the specification. It takes almost 5 seconds to go through the bootchain
on Rock 5B and jump to the
Hi,
On ROCK 5B power is usually supplied via it's USB-C port. This port has the
data lines connected to RK3588, VBUS connected to the input regulator and
CC pins connected to FUSB302. FUSB302 is a USB-C controller, which can be
accessed via I2C from RK3588. The USB-C controller is needed to figure
Hi David,
On Sat, Jul 27, 2024 at 07:41:48PM +0200, David Virag wrote:
> Newer Samsung SoCs (including newer Exynos, ExynosAuto, Google Tensor)
> still use these IPs, or slightly newer versions of it.
>
> Make these drivers available on these platforms by guarding
> EXYNOS4/EXYNOS5 specific code
The squashfs driver blindly follows symlinks, and calls sqfs_size()
recursively. So an attacker can create a crafted filesystem and with
a deep enough nesting level a stack overflow can be achieved.
Fix by limiting the nesting level to 8.
Signed-off-by: Richard Weinberger
---
Changes since v1:
-
The function can fail and return NULL.
Signed-off-by: Richard Weinberger
Reviewed-by: Miquel Raynal
---
fs/squashfs/sqfs.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index 16a07c0622..fa99d514f2 100644
--- a/fs/squashfs/sqfs.c
A carefully crafted squashfs filesystem can exhibit an extremly large
inode size and overflow the calculation in sqfs_inode_size().
As a consequence, the squashfs driver will read from wrong locations.
Fix by using __builtin_add_overflow() to detect the overflow.
Signed-off-by: Richard Weinberger
A carefully crafted squashfs filesystem can exhibit an inode size of 0x,
as a consequence malloc() will do a zero allocation.
Later in the function the inode size is again used for copying data.
So an attacker can overwrite memory.
Avoid the overflow by using the __builtin_add_overflow() he
Add what it takes to enable NETDEVICES with NET_LWIP and enable DHCP as
well as the dhcp command. CMD_TFTPBOOT is selected by BOOTMETH_EFI due
to this code having an implicit dependency on do_tftpb().
Signed-off-by: Jerome Forissier
---
board/engicam/imx8mp/icore_mx8mp.c| 2 +-
...
The parent patch has made the networking stack a choice between NO_NET,
NET and NET_LWIP. Therefore '# CONFIG_NET is not set' is now
'CONFIG_NO_NET=y'. Adjust the defconfigs accordingly. Note that this
patch is intended to be folded in but is kept separate separate for now
to make review easier.
S
Prepare the introduction of the lwIP (lightweight IP) TCP/IP stack by
adding a new net/lwip/ directory and the NET_LWIP symbol. Network
support is either NO_NET, NET (legacy stack) or NET_LWIP. Subsequent
commits will introduce the lwIP code, re-work the NETDEVICE integration
and port some of the N
Add myself as a maintainer for the lwIP network stack integration code
and network commands. The library code itself (i.e., most files under
lib/lwip/ except README, Makefile and integration files in u-boot) is
unmodified from upstream and therefore does not need a maintainer.
Signed-off-by: Jerom
Build and run qemu_arm64_lwip_defconfig in CI. This tests the lightweight
IP (lwIP) implementation of the dhcp, tftpboot and ping commands.
Signed-off-by: Jerome Forissier
---
.azure-pipelines.yml | 7 +++
1 file changed, 7 insertions(+)
diff --git a/.azure-pipelines.yml b/.azure-pipelines.
Add support for setting the TFTP block size. The default value (1468)
is fine for Ethernet and allows a better throughput than the TFTP
default (512), if the server supports the blksize option of course.
I tested this change with qemu_arm64_lwip_defconfig. The throughput is
now 875 KiB/s vs. 313 K
The TFTP protocol uses a default block size of 512 bytes. This value is
sub-optimal for ethernet devices, which have a MTU (Maximum Transmission
Unit) of 1500 bytes. When taking into acount the overhead of the IP and
UDP layers, this leaves 1468 bytes for the TFTP payload.
This patch introduces a
Add qemu_arm64_lwip_defconfig which #include's qemu_arm64_defconfig and
selects NET_LWIP instead of NET. This config has all the supported net
commands enabled.
Signed-off-by: Jerome Forissier
Reviewed-by: Ilias Apalodimas
---
configs/qemu_arm64_lwip_defconfig | 9 +
1 file changed, 9 i
Support "bdinfo -e" when lwIP is selected.
Signed-off-by: Jerome Forissier
Reviewed-by: Ilias Apalodimas
Reviewed-by: Tom Rini
---
cmd/bdinfo.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 437ac4e8630..472e5c42b08 100644
--- a/cmd/b
From: Jonathan Humphreys
Signed-off-by: Jonathan Humphreys
Signed-off-by: Jerome Forissier
---
net/lwip/wget.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/net/lwip/wget.c b/net/lwip/wget.c
index 65a69fab6e8..bd1aab499d2 100644
--- a/net/lwip/wget.c
+++ b/net/lwip/wget.c
@@ -264,12
Add support for the wget command with NET_LWIP.
Based on code initially developed by Maxim U.
Signed-off-by: Jerome Forissier
Co-developed-by: Maxim Uvarov
Cc: Maxim Uvarov
Signed-off-by: Jerome Forissier
---
cmd/Kconfig| 16 +--
cmd/net-lwip.c | 8 ++
include/net-lwip.h | 18
Extract some code from cmd/net.c that will be useful in a subsequent
commit to implement wget with NET_LWIP.
Signed-off-by: Jerome Forissier
Reviewed-by: Ilias Apalodimas
---
cmd/Makefile | 5 ++-
cmd/net-common.c | 109
cmd/net.c| 115
Add CMD_DNS when NET_LWIP is enabled to provide the dns command using
lwIP.
Signed-off-by: Jerome Forissier
---
cmd/Kconfig| 11 ++--
cmd/net-lwip.c | 8 +++
include/net-lwip.h | 1 +
net/lwip/Makefile | 1 +
net/lwip/dns.c | 127 ++
Add support for the the ping command with NET_LWIP. The implementation
is derived from lwIP's contrib/apps/ping/ping.c.
Signed-off-by: Jerome Forissier
---
cmd/Kconfig| 11 +--
cmd/net-lwip.c | 8 ++
include/net-lwip.h | 1 +
net/lwip/Makefile | 1 +
net/lwip/ping.c| 177
Implement do_tftpb(). This implementation of the tftp command
supports an optional port number. For example:
tftp 192.168.0.30:9069:file.bin
Signed-off-by: Jerome Forissier
---
cmd/Kconfig | 3 +-
cmd/net-lwip.c | 8 ++
net/lwip/dhcp.c | 11 +-
net/lwip/tftp.c | 269 +
Build the lwIP library when NET_LWIP is enabled. The following files
are adaptation layers written specially for U-Boot:
lib/lwip/u-boot/arch/cc.h
lib/lwip/u-boot/arch/sys_arch.h (empty)
lib/lwip/u-boot/limits.h (empty)
lib/lwip/u-boot/lwipopts.h
They were initially contributed by Maxim in a
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