Add missing clock PERI_UART4_PD for peri clock gates. This is needed to
match upstream linux clk ID in preparation for OF_UPSTREAM.
Also convert infracfg to mux + gate implementation as now we have mux on
top of gates.
Signed-off-by: Christian Marangi <ansuels...@gmail.com>
---
drivers/clk/mediatek/clk-mt7622.c | 1 +
include/dt-bindings/clock/mt7622-clk.h | 25 +++++++++++++------------
2 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7622.c
b/drivers/clk/mediatek/clk-mt7622.c
index 0da7a848163..5df62e64c9a 100644
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -472,6 +472,7 @@ static const struct mtk_gate peri_cgs[] = {
GATE_PERI0(CLK_PERI_UART1_PD, CLK_TOP_AXI_SEL, 18),
GATE_PERI0(CLK_PERI_UART2_PD, CLK_TOP_AXI_SEL, 19),
GATE_PERI0(CLK_PERI_UART3_PD, CLK_TOP_AXI_SEL, 20),
+ GATE_PERI0(CLK_PERI_UART4_PD, CLK_TOP_AXI_SEL, 21),
GATE_PERI0(CLK_PERI_BTIF_PD, CLK_TOP_AXI_SEL, 22),
GATE_PERI0(CLK_PERI_I2C0_PD, CLK_TOP_AXI_SEL, 23),
GATE_PERI0(CLK_PERI_I2C1_PD, CLK_TOP_AXI_SEL, 24),
diff --git a/include/dt-bindings/clock/mt7622-clk.h
b/include/dt-bindings/clock/mt7622-clk.h
index 0820fab0a22..4b6501c1020 100644
--- a/include/dt-bindings/clock/mt7622-clk.h
+++ b/include/dt-bindings/clock/mt7622-clk.h
@@ -146,18 +146,19 @@
#define CLK_PERI_UART1_PD 13
#define CLK_PERI_UART2_PD 14
#define CLK_PERI_UART3_PD 15
-#define CLK_PERI_BTIF_PD 16
-#define CLK_PERI_I2C0_PD 17
-#define CLK_PERI_I2C1_PD 18
-#define CLK_PERI_I2C2_PD 19
-#define CLK_PERI_SPI1_PD 20
-#define CLK_PERI_AUXADC_PD 21
-#define CLK_PERI_SPI0_PD 22
-#define CLK_PERI_SNFI_PD 23
-#define CLK_PERI_NFI_PD 24
-#define CLK_PERI_NFIECC_PD 25
-#define CLK_PERI_FLASH_PD 26
-#define CLK_PERI_IRTX_PD 27
+#define CLK_PERI_UART4_PD 16
+#define CLK_PERI_BTIF_PD 17
+#define CLK_PERI_I2C0_PD 18
+#define CLK_PERI_I2C1_PD 19
+#define CLK_PERI_I2C2_PD 20
+#define CLK_PERI_SPI1_PD 21
+#define CLK_PERI_AUXADC_PD 22
+#define CLK_PERI_SPI0_PD 23
+#define CLK_PERI_SNFI_PD 24
+#define CLK_PERI_NFI_PD 25
+#define CLK_PERI_NFIECC_PD 26
+#define CLK_PERI_FLASH_PD 27
+#define CLK_PERI_IRTX_PD 28
/* APMIXEDSYS */
--
2.45.2
