[PATCH 06/14] clk: mediatek: mt7981: swap wrong clock-names for spi nodes

[Christian Marangi]

Swap wrong clock-names for spi nodes as they were wrong and the spi-clk
was referencing the sel-clk and the sel-clk was referencing the spi-clk.

Signed-off-by: Christian Marangi <ansuels...@gmail.com>
---
 arch/arm/dts/mt7981.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi
index d80eceb8d4c..be0d42bc997 100644
--- a/arch/arm/dts/mt7981.dtsi
+++ b/arch/arm/dts/mt7981.dtsi
@@ -271,7 +271,7 @@
                                  <&infracfg CK_INFRA_SPI0_SEL>;
                assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>,
                                         <&topckgen CK_INFRA_ISPI0>;
-               clock-names = "sel-clk", "spi-clk";
+               clock-names = "spi-clk", "sel-clk";
                interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
@@ -286,7 +286,7 @@
                                  <&infracfg CK_INFRA_SPI1_SEL>;
                assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>,
                                         <&topckgen CK_INFRA_ISPI1>;
-               clock-names = "sel-clk", "spi-clk";
+               clock-names = "spi-clk", "sel-clk";
                status = "disabled";
        };
 
@@ -299,7 +299,7 @@
                                  <&infracfg CK_INFRA_SPI2_SEL>;
                assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>,
                                         <&topckgen CK_INFRA_ISPI0>;
-               clock-names = "sel-clk", "spi-clk";
+               clock-names = "spi-clk", "sel-clk";
                interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
-- 
2.45.2