Hi Heinrich,
I'm about to send v4 patch series.
> 1) keep if (!IS_ENABLED(CONFIG_EFI_SECURE_BOOT)) condition
I chose this option, but I reverted #ifdef statement instead of using
"if (IS_ENABLED)" because I think it is better not to rely on compiler
optimization.
> 2) remove if (!IS_ENABLED(CON
On Mon, May 10, 2021 at 05:08:16PM +0800, Bin Meng wrote:
> This reverts commit bc8bbb77f74f21582b3bfd790334397757f88575.
>
> This commit breaks U-Boot booting on SiFive Unleashed board, as
> there is no such CSR on U54 core.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/cpu/fu540/spl.c | 1
On 12/05/21 11:50 am, Vignesh Raghavendra wrote:
>
>
> On 5/12/21 11:40 AM, Lokesh Vutla wrote:
>>
>>
>> On 11/05/21 11:34 am, Vignesh Raghavendra wrote:
>>>
>>>
>>> On 5/11/21 10:21 AM, Lokesh Vutla wrote:
On 10/05/21 10:54 pm, Vignesh Raghavendra wrote:
> R5 SPL needs acce
On 5/12/21 11:40 AM, Lokesh Vutla wrote:
>
>
> On 11/05/21 11:34 am, Vignesh Raghavendra wrote:
>>
>>
>> On 5/11/21 10:21 AM, Lokesh Vutla wrote:
>>>
>>>
>>> On 10/05/21 10:54 pm, Vignesh Raghavendra wrote:
R5 SPL needs access to cfg space of Rings and UDMAP, therefore add RING
CFG,
Hi Green,
This patch series seems to have failed CI test.
Could you please check the CI result ? Thanks!
https://dev.azure.com/ycliang-tw/u-boot-riscv/_build/results?buildId=28&view=results
Best regards,
Leo
On Fri, May 07, 2021 at 10:36:47AM -0700, Green Wan wrote:
> Add SiFive fu740 cpu to su
On 11/05/21 11:34 am, Vignesh Raghavendra wrote:
>
>
> On 5/11/21 10:21 AM, Lokesh Vutla wrote:
>>
>>
>> On 10/05/21 10:54 pm, Vignesh Raghavendra wrote:
>>> R5 SPL needs access to cfg space of Rings and UDMAP, therefore add RING
>>> CFG, TCHAN CFG and RCHAN CFG address ranges.
>>>
>>> Signed-
Am 12. Mai 2021 06:57:49 MESZ schrieb AKASHI Takahiro
:
>As I discussed in [1], I have made a couple of improvements on
>the current implemenation of capsule update.
>
>Among others, this patch series
>1. add signing feature to mkeficapsule
>2. remove dtb operation from mkeficapsule
>3. add pytest
Add a couple of test cases against dealing with a signed capsule file.
Signed-off-by: AKASHI Takahiro
---
.../py/tests/test_efi_capsule/capsule_defs.py | 5 +
test/py/tests/test_efi_capsule/conftest.py| 35 ++-
test/py/tests/test_efi_capsule/signature.dts | 8 +
.../test_capsule_firmwa
This command allows us to add a certificate (or public key) to dtb blob:
{
signature {
capsule-key = "...";
};
}
The value is actually a signature list in terms of UEFI specificaion,
and used in verifying UEFI capsules.
The code was originally developed by Sughosh
As we discussed, "-K" and "-D" options have nothing to do with
creating a capsule file. The same result can be obtained by
using standard commands like:
=== signature.dts ===
/dts-v1/;
/plugin/;
&{/} {
signature {
capsule-key = /incbin/("SIGNER.esl");
};
}
With this enhancement, mkeficapsule will be able to create a capsule
file with a signature which will be verified later by FMP's SetImage().
We will have to specify addtional command parameters:
-monotonic-cout : monotonic count
-private-key : private key file
-certificate : certificate f
As I discussed in [1], I have made a couple of improvements on
the current implemenation of capsule update.
Among others, this patch series
1. add signing feature to mkeficapsule
2. remove dtb operation from mkeficapsule
3. add pytest for capsule authentication (on sandbox)
NOTE:
I temporarily in
Hello Vincent,
On 03.05.21 09:26, Vincent Chen wrote:
> The pwm_sifive_set_config() and pwm_sifive_set_enable() cannot work
> properly due to the wrong implementations. It will cause the u-boot
> PWM command to not work as expected. The bugs will be resolved in this
> patch.
>
> Signed-off-by: Vi
> From: Bin Meng
> Sent: Monday, May 10, 2021 8:24 PM
> To: Simon Glass ; Rick Jian-Zhi Chen(陳建志)
> ; u-boot@lists.denx.de
> Cc: Bin Meng
> Subject: [PATCH v5 05/13] binman: Add support for RISC-V OpenSBI fw_dynamic
> blob
>
> Add an entry for RISC-V OpenSBI's 'fw_dynamic' firmware payload.
>
>
> From: Bin Meng
> Sent: Monday, May 10, 2021 8:24 PM
> To: Simon Glass ; Rick Jian-Zhi Chen(陳建志)
> ; u-boot@lists.denx.de
> Cc: Bin Meng
> Subject: [PATCH v5 02/13] binman: Correct '-a' description in the doc
>
> It needs a space around '-a'.
>
> Signed-off-by: Bin Meng
> Reviewed-by: Simon Gl
> From: Bin Meng
> Sent: Monday, May 10, 2021 8:23 PM
> To: Simon Glass ; Rick Jian-Zhi Chen(陳建志)
> ; u-boot@lists.denx.de
> Cc: Bin Meng
> Subject: [PATCH v5 01/13] common: kconfig: Correct a typo in SPL_LOAD_FIT
>
> It should be FDT, not FTD.
>
> Signed-off-by: Bin Meng
> Reviewed-by: Simon G
> From: Bin Meng
> Sent: Monday, May 10, 2021 8:24 PM
> To: Simon Glass ; Rick Jian-Zhi Chen(陳建志)
> ; u-boot@lists.denx.de
> Cc: Bin Meng
> Subject: [PATCH v5 12/13] riscv: ae350: Switch to use binman to generate
> u-boot.itb
>
> Use the new BINMAN_STANDALONE_FDT option for AE350 based SPL defc
Hi Rick,
On Wed, May 12, 2021 at 11:25 AM Rick Chen wrote:
>
> HI Bin,
>
> >
> > > Hi Rick,
> > >
> > > On Tue, May 11, 2021 at 8:49 AM Rick Chen wrote:
> > > >
> > > > Hi Bin,
> > > >
> > > > > Hi Rick,
> > > > >
> > > > > On Mon, May 10, 2021 at 3:22 PM Rick Chen
> > > > > wrote:
> > > > > >
HI Bin,
>
> > Hi Rick,
> >
> > On Tue, May 11, 2021 at 8:49 AM Rick Chen wrote:
> > >
> > > Hi Bin,
> > >
> > > > Hi Rick,
> > > >
> > > > On Mon, May 10, 2021 at 3:22 PM Rick Chen wrote:
> > > > >
> > > > > Hi Bin
> > > > >
> > > > > > Hi Bin,
> > > > > >
> > > > > > > From: Bin Meng
> > > > >
On Tue, May 11, 2021 at 07:50:38PM -0500, Alex G. wrote:
> On 5/11/21 5:34 PM, Tom Rini wrote:
> > On Tue, May 11, 2021 at 02:57:03PM -0500, Alex G. wrote:
> > > On 5/6/21 9:24 AM, Simon Glass wrote:
> > > > In preparation for enabling CONFIG_IS_ENABLED() on the host build, add
> > > > some options
On 5/11/21 5:34 PM, Tom Rini wrote:
On Tue, May 11, 2021 at 02:57:03PM -0500, Alex G. wrote:
On 5/6/21 9:24 AM, Simon Glass wrote:
In preparation for enabling CONFIG_IS_ENABLED() on the host build, add
some options to enable the various FIT options expected in these tools.
This will ensure that
On Tue, May 11, 2021 at 04:46:14PM +0200, Stefano Babic wrote:
> Hi Tom,
>
> please pull from u-boot-imx, thanks !
>
> CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7368
>
>
> The following changes since commit 8ddaf943589756442bba21e5be645cd47526d82b:
>
> Merge tag '
> From: U-Boot On Behalf Of Vincent Chen
> Sent: Monday, May 03, 2021 3:27 PM
> To: s...@chromium.org; h...@denx.de
> Cc: u-boot@lists.denx.de; Vincent Chen
> Subject: [PATCH] pwm: sifive: make set_config() and set_enable() work properly
>
> The pwm_sifive_set_config() and pwm_sifive_set_enable()
Dear Andy
On 5/11/21 4:39 PM, andy...@sony.com wrote:
> Hi Jaehoon
>
>> If you're ok, I will test after reverted the patch on tomorrow, and I will
>> share
>> result.
>> Or I will try to reproduce timeout issue on 410c board.
>
> Sorry, but is there any update for this comments?
Sorry for repl
On 5/11/21 5:30 PM, Tero Kristo wrote:
> From: Tero Kristo
>
> Add support command for debugging K3 power domains. This is useful with
> the HSM rearch setup, where power domains are directly controlled by SPL
> instead of going through the TI SCI layer. The debugging support is only
> available
On 5/11/21 5:30 PM, Tero Kristo wrote:
> From: Tero Kristo
>
> Normally, power domains are handled via TI-SCI in K3 SoCs. However,
> SPL is not going to have access to sysfw resources, so it must control
> them directly. Add driver for supporting this.
>
> Signed-off-by: Tero Kristo
> Signed-of
On Tue, May 11, 2021 at 02:57:03PM -0500, Alex G. wrote:
> On 5/6/21 9:24 AM, Simon Glass wrote:
> > In preparation for enabling CONFIG_IS_ENABLED() on the host build, add
> > some options to enable the various FIT options expected in these tools.
> > This will ensure that the code builds correctly
Up to now we are stopping the EFI subsystem if a TPMv2 exists but the
protocol fails to install. Now that we've switched the config to 'default
y' the sandbox TPM fails, since it doesn't support all the required
capabilities of the protocol.
Not installing the protocol is not catastrophic. If th
On 5/6/21 9:24 AM, Simon Glass wrote:
In preparation for enabling CONFIG_IS_ENABLED() on the host build, add
some options to enable the various FIT options expected in these tools.
This will ensure that the code builds correctly when CONFIG_HOST_xxx
is distinct from CONFIG_xxx.
Signed-off-by: Si
Addresses in state->ram_buf must be in the low 4 GiB of the address space.
Otherwise we cannot correctly fill SMBIOS tables. This shows up in warnings
like:
WARNING: SMBIOS table_address overflow 7f752735e020
Ensure that state->ram_buf is initialized by the first invocation of
os_malloc().
S
Up to now we are stopping the EFI subsystem if a TPMv2 exists but the
protocol fails to install. Now that we've switched the config to 'default
y' the sandbox TPM fails, since it doesn't support all the required
capabilities of the protocol.
Not installing the protocol is not catastrophic. If th
Hello Simon,
with sandbox_defconfig and 'bootefi hello' I see a message
WARNING: SMBIOS table_address overflow 7f752735e020
The problem is caused by mmap() being passed the same value 0x1000
on each call. Only the first call will give you a low address.
It is this call where we need a lo
Hi Simon,
On 5/11/21 5:27 PM, Simon Glass wrote:
>>
>> [snip]
>>
diff --git a/common/autoboot.c b/common/autoboot.c
index 50ab9281e7..6f55abe388 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -316,3 +316,4 @@ static int abortboot_key_sequence(int bootdelay)
From: Sinan Akman
Signed-off-by: Sinan Akman
---
arch/powerpc/cpu/mpc83xx/pci.c| 2 ++
arch/powerpc/dts/mpc8379erdb.dts | 52 +++
board/freescale/mpc837xerdb/mpc837xerdb.c | 11 ++-
configs/MPC837XERDB_defconfig | 18 +--
Hi Kishon,
On Tue, 11 May 2021 at 00:26, Kishon Vijay Abraham I wrote:
>
> Hi Simon,
>
> On 07/05/21 10:04 pm, Simon Glass wrote:
> > Hi Kishon,
> >
> > On Fri, 7 May 2021 at 05:02, Kishon Vijay Abraham I wrote:
> >>
> >> In order for client to know whether it was able to successfully get a
> >>
On Wed, Apr 21, 2021 at 03:32:27PM -0400, Tom Rini wrote:
> As it has been now two years past the migration deadline, it is required
> to have migrated. Remove the check from the Makefile and rework some of
> the Kconfig logic slightly to get the functional dependencies of DM_MMC
> / BLK right in
On Wed, Apr 21, 2021 at 03:32:26PM -0400, Tom Rini wrote:
> The migration deadline for having LIBATA mean that AHCI is also enabled
> was v2019.07. As that has long since passed, adjust the Kconfig
> dependencies.
>
> Signed-off-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
signatu
On Wed, Apr 21, 2021 at 03:32:25PM -0400, Tom Rini wrote:
> There are a number of platforms that depend on a SATA driver that has
> been converted to require AHCI but the platforms themselves are behind
> on other migrations that would make it trivial to enable AHCI. Disable
> SATA in these cases
On Mon, May 10, 2021 at 10:54:35PM +0530, Vignesh Raghavendra wrote:
> This series add DMA support for R5 SPL on J721e/J7200 SoCs post HSM
> Rearch.
>
> Depends on Tero's base HSM rearch support series.
>
> Vignesh Raghavendra (7):
> mailbox: k3-sec-proxy: Add DM to DMSC communication thread
>
On Wed, Apr 21, 2021 at 12:32:46PM -0400, Tom Rini wrote:
> These specific configs are missing a number of migrations. In addition,
> they are blocking completion of the now-expired DM_MMC migration as it
> requires enabling BLK.
>
> Cc: Priyanka Jain
> Cc: Ruchika Gupta
> Cc: Sumit Garg
> Si
Hi Steffen,
On Tue, 11 May 2021 at 09:02, Steffen Jaeckel
wrote:
>
> Hi Simon,
>
> On 5/10/21 10:45 PM, Simon Glass wrote:
> > On Mon, 10 May 2021 at 13:37, Steffen Jaeckel
> > wrote:
>
> [snip]
>
> >> diff --git a/common/autoboot.c b/common/autoboot.c
> >> index 50ab9281e7..6f55abe388 100644
>
Use Linux style u32 instead of uint32_t.
Signed-off-by: Dave Gerlach
---
drivers/ram/k3-j721e/lpddr4_ctl_regs.h | 3028
1 file changed, 1514 insertions(+), 1514 deletions(-)
diff --git a/drivers/ram/k3-j721e/lpddr4_ctl_regs.h
b/drivers/ram/k3-j721e/lpddr4_ctl_regs.h
in
Rename the k3-j721e folder under drivers/ram to k3-ddrss in preparation
of introducing additional support for other platforms to the same
driver.
Signed-off-by: Dave Gerlach
---
drivers/ram/Makefile| 2 +-
drivers/ram/{k3-j721e => k3-ddrss}/Makefile
Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach
---
.../k3-j721e/lpddr4_address_slice_0_macros.h | 334 +-
1 file changed, 167 insertions(+), 16
Create a new CONFIG_K3_DDRSS option to select the common parts of the
k3-ddrss driver. Also introduce a choice that depends on the top level
option to select CONFIG_K3_J721E_DDRSS for j721e support, and update
corresponding Kconfig as required.
Signed-off-by: Dave Gerlach
---
board/ti/j721e/Kcon
From: Lokesh Vutla
Attempt to get and enable a vtt regulator if one is provided from the
dts. If we do not find one, continue as not all platforms have this.
Signed-off-by: Nishanth Menon
Signed-off-by: Lokesh Vutla
Signed-off-by: Dave Gerlach
---
drivers/ram/k3-ddrss/k3-ddrss.c | 14 +++
This is v2 of the series to update the existing k3-j721e driver to a
common driver to support both j721e and the new am642 SoC. It renames
drivers/ram/k3-j721e to drivers/ram/k3-ddrss and then introduces a
refactored common driver with the existing j721e support moved to files
named with 32bit and
Update the k3-ddrss DT binding document to include compatible
for k3,am64-ddrss.
Signed-off-by: Dave Gerlach
---
doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/doc/device-tree-bindings/memory-controller/k3-j721e
Hi Simon,
On 5/10/21 10:45 PM, Simon Glass wrote:
> On Mon, 10 May 2021 at 13:37, Steffen Jaeckel
> wrote:
[snip]
>> diff --git a/common/autoboot.c b/common/autoboot.c
>> index 50ab9281e7..6f55abe388 100644
>> --- a/common/autoboot.c
>> +++ b/common/autoboot.c
>> @@ -316,3 +316,4 @@ static int
Hi Tom,
please pull from u-boot-imx, thanks !
CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7368
The following changes since commit 8ddaf943589756442bba21e5be645cd47526d82b:
Merge tag 'dm-pull-29apr21' of
https://source.denx.de/u-boot/custodians/u-boot-dm (2021-04-29
On Tue, May 11, 2021 at 07:28:10PM +0530, Kishon Vijay Abraham I wrote:
> Hi Tom,
>
> On 07/05/21 10:44 pm, Tom Rini wrote:
> > On Tue, May 04, 2021 at 04:11:54PM +0530, Kishon Vijay Abraham I wrote:
> >
> >> MAIN CPSW0 requires the PHY to be powered on and reset for QSGMII
> >> operation. Add a
Hi Tom,
On 07/05/21 10:44 pm, Tom Rini wrote:
> On Tue, May 04, 2021 at 04:11:54PM +0530, Kishon Vijay Abraham I wrote:
>
>> MAIN CPSW0 requires the PHY to be powered on and reset for QSGMII
>> operation. Add a env variable to configure driving "0" on ENET_EXP_PWRDN
>> controlled by GPIO EXPANDER
On Tue, May 11, 2021 at 1:18 PM Florence Riker <1460...@gmail.com> wrote:>
> Hi, I want to port u boot for a custom-made Qualcomm IPQ4019 based router,
> I've finished the dts part but had problems with these files:
>
>
> board/.c
> include/configs/.h
>
>
> Since there is no similar board to take r
Hi all,
Le 08/05/2021 à 23:51, Simon Glass a écrit :
Hi,
On Thu, 4 Feb 2021 at 15:32, João Marcos Costa wrote:
Em qua., 27 de jan. de 2021 às 12:15, Simon Glass escreveu:
Hi Joao,
Hello!
This test works the first time I run it but fails the second time,
since the directory already exi
On 5/11/21 8:04 AM, Bin Meng wrote:
At present there is only one Kconfig option CONFIG_SIFIVE_CLINT to
control the enabling of SiFive CLINT support in both SPL (M-mode)
and U-Boot proper (S-mode). So for a typical SPL config that the
SiFive CLINT driver is enabled in both SPL and U-Boot proper, t
On Tue, May 11, 2021 at 04:04:34PM +0800, Darren Ng wrote:
> On Sat, May 8, 2021 at 1:40 AM Tom Rini wrote:
>
> > On Sat, May 08, 2021 at 12:02:21AM +0800, Darren Ng wrote:
> >
> > > (Hello, from a U-Boot NOOB.)
> > >
> > > Issue
> > > -
> > > After sending u-boot-spl.bin with xmodem, the ser
On 11/05/2021 15:07, Tom Rini wrote:
On Tue, May 11, 2021 at 10:40:15AM +0300, Tero Kristo wrote:
This fits the TFTP progress bar on single line based on the size of the
file being downloaded, reducing unnecessary spam and also making it
easier to track the download progress.
Signed-off-by: Te
On Tue, May 11, 2021 at 08:28:32AM -0400, Trevor Woerner wrote:
> On Mon, May 10, 2021 at 5:06 PM Tom Rini wrote:
>
> > and shortly after this I will pull in the patches
> > needed to enforce the DM migrations that are now 2 years past their
> > warning dates.
> >
>
> Could you please be more sp
On Mon, May 10, 2021 at 5:06 PM Tom Rini wrote:
> and shortly after this I will pull in the patches
> needed to enforce the DM migrations that are now 2 years past their
> warning dates.
>
Could you please be more specific with respect to which DM subsystem(s)
migrations are targeted next?
Hi, I want to port u boot for a custom-made Qualcomm IPQ4019 based router,
I've finished the dts part but had problems with these files:
board/.c
include/configs/.h
Since there is no similar board to take reference, I have absolutely no
idea what code should I write to these files.
I've read so
On Tue, May 11, 2021 at 10:40:15AM +0300, Tero Kristo wrote:
> This fits the TFTP progress bar on single line based on the size of the
> file being downloaded, reducing unnecessary spam and also making it
> easier to track the download progress.
>
> Signed-off-by: Tero Kristo
> ---
> include/co
At present there is only one Kconfig option CONFIG_SIFIVE_CLINT to
control the enabling of SiFive CLINT support in both SPL (M-mode)
and U-Boot proper (S-mode). So for a typical SPL config that the
SiFive CLINT driver is enabled in both SPL and U-Boot proper, that
means the S-mode U-Boot tries to a
On 11.05.21 13:40, Ilias Apalodimas wrote:
> EFI_TCG2 depends not only on TPMv2 but also on the underlying algorithms.
> So select the missing SHA1, SHA256, SHA384 and SHA512 we currently support
>
> Reported-by: Michal Simek
> Signed-off-by: Ilias Apalodimas
I will add the default=y when mergin
EFI_TCG2 depends not only on TPMv2 but also on the underlying algorithms.
So select the missing SHA1, SHA256, SHA384 and SHA512 we currently support
Reported-by: Michal Simek
Signed-off-by: Ilias Apalodimas
---
changes since v3:
- add multiple select lines
changes since v2:
- remove 'on' after
EFI_TCG2 depends not only on TPMv2 but also on the underlying algorithms.
So select the missing SHA1, SHA256, SHA384 and SHA512 we currently support
Reported-by: Michal Simek
Signed-off-by: Ilias Apalodimas
---
changes since v1:
- use 'select' instead of 'depend'
changes since v2:
- remove 'on'
doh yea, forgot to delete the 'on' from depends. Let me send a v3
On Tue, 11 May 2021 at 14:03, Michal Simek wrote:
>
>
>
> On 5/11/21 12:57 PM, Ilias Apalodimas wrote:
> > EFI_TCG2 depends not only on TPMv2 but also on the underlying algorithms.
> > So select the missing SHA1, SHA256, SHA384 and
On 5/11/21 12:57 PM, Ilias Apalodimas wrote:
> EFI_TCG2 depends not only on TPMv2 but also on the underlying algorithms.
> So select the missing SHA1, SHA256, SHA384 and SHA512 we currently support
>
> Reported-by: Michal Simek
> Signed-off-by: Ilias Apalodimas
> ---
> Changes since v1:
> - u
EFI_TCG2 depends not only on TPMv2 but also on the underlying algorithms.
So select the missing SHA1, SHA256, SHA384 and SHA512 we currently support
Reported-by: Michal Simek
Signed-off-by: Ilias Apalodimas
---
Changes since v1:
- use 'select' instead of 'depends'
lib/efi_loader/Kconfig | 1 +
From: Dave Gerlach
Sysfw is not going to provide access to power management features in the
new architecture, so SPL must implement these itself. Enable all the raw
register access based clock + power domain drivers.
Signed-off-by: Dave Gerlach
Signed-off-by: Tero Kristo
---
configs/j7200_evm
MCU timer1 is used as the tick timer for MCU R5 SPL, and the
clock-frequency defined in DT appears to be incorrect at the moment.
Actual clock source for the timer is MCU_SYSCLK0 / 4 which is 250MHz.
Earlier setup of 25MHz went unnoticed, as there was a separate issue
with omap-timer, which caused
From: Tero Kristo
Update build instructions and image formats based on HSM rearch. A new
DM image is added into the build, which gets executed right after R5
SPL finishes its job.
Signed-off-by: Tero Kristo
Signed-off-by: Tero Kristo
---
board/ti/j721e/README | 9 ++---
1 file changed, 6
From: Dave Gerlach
Force the clk-k3 driver to probe early during R5 SPL boot to ensure the
default system clock configuration is completed. Many other drivers
assume a default state of the clock tree and it is currently possible
for them to probe before clk-k3 depending on the exact system
config
From: Tero Kristo
Copy the contents of the board config loaded from sysfw.itb into an
EXTBOOT shared memory buffer that gets passed to sciserver. This only
needs to be done if EXTBOOT area has not been populated by ROM code yet.
Signed-off-by: Tero Kristo
Signed-off-by: Tero Kristo
---
arch/a
From: Tero Kristo
Sysfw is not going to provide access to power management features in the
new architecture, so SPL must implement these itself. Enable all the raw
register access based clock + power domain drivers.
Signed-off-by: Tero Kristo
Signed-off-by: Tero Kristo
---
configs/j721e_evm_r
From: Dave Gerlach
Add platform clock and powerdomain data for J721e and J7200. This data
is used by the corresponding drivers to register all the required device
clocks and powerdomains.
Signed-off-by: Dave Gerlach
Signed-off-by: Tero Kristo
---
arch/arm/mach-k3/Makefile | 2 +-
ar
From: Dave Gerlach
Only start-up the non-linux remote cores if we are running in legacy
boot mode. HSM rearch is not yet supporting this.
Signed-off-by: Dave Gerlach
Signed-off-by: Tero Kristo
Signed-off-by: Tero Kristo
---
arch/arm/mach-k3/common.c | 7 ---
1 file changed, 4 insertions(
From: Tero Kristo
If the raw PM support is built in, we are operating in the split
firmware approach mode where PM support is not available. In this
case, skip the board config for this.
Signed-off-by: Tero Kristo
Signed-off-by: Tero Kristo
---
arch/arm/mach-k3/sysfw-loader.c | 2 ++
1 file c
From: Tero Kristo
Add DM (device manager) firmware image to the fit image that is loaded by
R5 SPL. This is needed with the HSM rearch where the firmware allocation
has been changed slightly.
Signed-off-by: Tero Kristo
Signed-off-by: Tero Kristo
---
arch/arm/mach-k3/config.mk | 4
tools
From: Tero Kristo
Add callback routines for parsing the firmware info from FIT image, and
use the data to boot up ATF and the MCU R5 firmware.
Signed-off-by: Tero Kristo
Signed-off-by: Tero Kristo
---
arch/arm/mach-k3/common.c | 80 +
arch/arm/mach-k3/com
From: Tero Kristo
Add driver to support TI K3 generation SoC clocks. This driver registers
the clocks provided via platform data, and adds support for controlling
the clocks via DT handles.
Signed-off-by: Tero Kristo
Signed-off-by: Tero Kristo
---
drivers/clk/ti/Kconfig | 12 ++
drivers/clk
From: Tero Kristo
Add support command for debugging K3 power domains. This is useful with
the HSM rearch setup, where power domains are directly controlled by SPL
instead of going through the TI SCI layer. The debugging support is only
available in the u-boot codebase though, so the raw register
From: Tero Kristo
Normally, power domains are handled via TI-SCI in K3 SoCs. However,
SPL is not going to have access to sysfw resources, so it must control
them directly. Add driver for supporting this.
Signed-off-by: Tero Kristo
Signed-off-by: Tero Kristo
---
drivers/power/domain/Kconfig
From: Tero Kristo
Add support for TI K3 SoC PLLs. This clock type supports
enabling/disabling/setting and querying the clock rate for the PLL. The
euclidean library routine is used to calculate divider/multiplier rates
for the PLLs.
Signed-off-by: Tero Kristo
Signed-off-by: Tero Kristo
---
dr
From: Tero Kristo
Clock rates are cached within the individual clock nodes, and right now
if one changes a clock rate somewhere in the middle of the tree, none
of its child clocks notice the change. To fix this, clear up all the
cached rates for us and our child clocks.
Signed-off-by: Tero Krist
From: Tero Kristo
Set rate should return the new clock rate on success, and negative error
value on failure. Fix this, as currently set_rate returns 0 on success.
Signed-off-by: Tero Kristo
Signed-off-by: Tero Kristo
---
drivers/clk/ti/clk-sci.c | 6 --
1 file changed, 4 insertions(+), 2
From: Tero Kristo
If a clock provider is not ready for assigning default rates/parents
during its probe, it may return -EPROBE_DEFER directly from xlate.
Handle this special case properly by skipping the entry and adjusting the
return value to pass. The defaults will be handled properly in post p
From: Tero Kristo
Add new clk subcommand "clk setfreq", for setting up a clock rate
directly from u-boot cmdline. This is handy for any debugging purposes
towards clocks.
Acked-by: Lukasz Majewski
Signed-off-by: Tero Kristo
Signed-off-by: Tero Kristo
---
cmd/clk.c | 49 ++
From: Tero Kristo
Some clocks are not associated to a DM node, so just parsing the DM is not
enough. This is especially true for root clocks, which typically don't have
any parents. Instead, fetch every registered UCLASS_CLK instance, and dump
these out.
Signed-off-by: Tero Kristo
Signed-off-by
From: Tero Kristo
Bail out early if device returned for the parent clock is null.
This avoids warning prints like this when doing clk dump:
dev_get_uclass_priv: null device
Signed-off-by: Tero Kristo
Signed-off-by: Tero Kristo
---
drivers/clk/clk-uclass.c | 2 ++
1 file changed, 2 insertio
From: Lokesh Vutla
board_fit_image_post_process() passes only start and size of the image,
but type of the image is not passed. So pass fit and node_offset, to
derive information about image to be processed.
Signed-off-by: Lokesh Vutla
Reviewed-by: Tom Rini
Signed-off-by: Tero Kristo
---
arc
From: Tero Kristo
Current driver only supports registering fixed rate clocks from DT. Add
new API which makes it possible to register fixed rate clocks directly
from e.g. platform specific clock drivers.
Reviewed-by: Peng Fan
Signed-off-by: Tero Kristo
Signed-off-by: Tero Kristo
---
drivers/
From: Tero Kristo
With the sysfw rearch, sysfw PM calls are no longer available from SPL
level. To properly support this, remove the is_on checks and the reset
assertion from the R5 remoteproc driver as these are not supported.
Attempting to access unavailable services will cause the device to ha
From: Tero Kristo
On J7 family of SoCs (J721E and J7200), sysfw is being split to be run
under two cores, TIFS portion on DMSC core, and DM firmware under MCU
R5. As MCU R5 is also used to run one phase of the bootloader, we must
prevent access from here towards sysfw services. To support this, a
Hello,
Couple of small changes in v4:
- re-worked patch #14 to include review comments from Jaehoon Chung
* changed code to use iopoll version instead of hand crafted loops
for timeout handling
* other mostly cosmetic changes
- patch #19/#21 changed to allow RM init to happen based on comm
From: Tero Kristo
Copy the best rational approximation calculation routines from Linux.
Typical usecase for these routines is to calculate the M/N divider
values for PLLs to reach a specific clock rate.
This is based on linux kernel commit:
"lib/math/rational.c: fix possible incorrect result fro
On Sat, May 8, 2021 at 1:40 AM Tom Rini wrote:
> On Sat, May 08, 2021 at 12:02:21AM +0800, Darren Ng wrote:
>
> > (Hello, from a U-Boot NOOB.)
> >
> > Issue
> > -
> > After sending u-boot-spl.bin with xmodem, the serial debug port seems to
> > hang.
> > Neither "...U-Boot SPL...\n...\nTrying
This fits the TFTP progress bar on single line based on the size of the
file being downloaded, reducing unnecessary spam and also making it
easier to track the download progress.
Signed-off-by: Tero Kristo
---
include/configs/ti_armv7_common.h | 2 ++
1 file changed, 2 insertions(+)
diff --git
Hi Jaehoon
> If you're ok, I will test after reverted the patch on tomorrow, and I will
> share
> result.
> Or I will try to reproduce timeout issue on 410c board.
Sorry, but is there any update for this comments?
Best Regards
Andy Wu
> -Original Message-
> From: U-Boot On Behalf Of J
On Tue, May 11, 2021 at 09:25:04AM +0200, Heinrich Schuchardt wrote:
> On 10.05.21 20:26, Ilias Apalodimas wrote:
> > EFI_TCG2 depends not only on TPMv2 but also on the underlying algorithms.
> > So add the missing SHA1, SHA256, SHA384 and SHA512 we currently support
> > as depenmdencies
>
> Thank
From: MengLi
In latest u-boot code, watchdog feature is implemented, so enable
wdt command by default.
Signed-off-by: Meng Li
---
configs/socfpga_stratix10_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/socfpga_stratix10_defconfig
b/configs/socfpga_stratix10_defconfig
i
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