On Mon, May 10, 2021 at 05:08:16PM +0800, Bin Meng wrote:
> This reverts commit bc8bbb77f74f21582b3bfd790334397757f88575.
>
> This commit breaks U-Boot booting on SiFive Unleashed board, as
> there is no such CSR on U54 core.
>
> Signed-off-by: Bin Meng <bmeng...@gmail.com>
> ---
>
> arch/riscv/cpu/fu540/spl.c | 15 ---------------
> 1 file changed, 15 deletions(-)
>
> diff --git a/arch/riscv/cpu/fu540/spl.c b/arch/riscv/cpu/fu540/spl.c
> index 1740ef98b6..45657b7909 100644
> --- a/arch/riscv/cpu/fu540/spl.c
> +++ b/arch/riscv/cpu/fu540/spl.c
> @@ -6,9 +6,6 @@
>
> #include <dm.h>
> #include <log.h>
> -#include <asm/csr.h>
> -
> -#define CSR_U74_FEATURE_DISABLE 0x7c1
>
> int spl_soc_init(void)
> {
> @@ -24,15 +21,3 @@ int spl_soc_init(void)
>
> return 0;
> }
> -
> -void harts_early_init(void)
> -{
> - /*
> - * Feature Disable CSR
> - *
> - * Clear feature disable CSR to '0' to turn on all features for
> - * each core. This operation must be in M-mode.
> - */
> - if (CONFIG_IS_ENABLED(RISCV_MMODE))
> - csr_write(CSR_U74_FEATURE_DISABLE, 0);
> -}
> --
> 2.25.1
>
Reviewed-by: Leo Yu-Chi Liang <ycli...@andestech.com>
