Hello Tom,
Please pull tag u-boot-atmel-2020.01-a , the first set of new features
for the 2020.01 release
The feature set includes support for two new boards from Microchip AT91:
The sama5d27_wlsom1_ek , an evaluation kit which includes the SAMA5D2
SOC packaged in a 256 MB LPDDR2 SIP, on a SOM
On Mon, Oct 7, 2019 at 9:55 AM Bin Meng wrote:
>
> On Sat, Oct 5, 2019 at 11:30 PM Bin Meng wrote:
> >
> > On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> > >
> > > At present libfdt is included in SPL/TPL if SPL/TPL_OF_CONTROL is enabled.
> > > But if of-platdata is in use this is not req
On 10/8/19 4:58 AM, liuhao wrote:
When creating the commit your forgot to leave an empty line between the
subject line and the rest of the commit message.
The commit subject and text should allow merging without further
editing. It is sufficient that your commit subject and message describe
the
On 2019/10/7 上午12:28, Simon South wrote:
Fix a typo that caused incorrect values to be loaded into the DRAM
controller's deskew registers.
Signed-off-by: Simon South
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/ram/rockchip/sdram_rk3328.c | 2 +-
1 file changed, 1 insertion(+), 1
On 2019/10/7 上午12:28, Simon South wrote:
Fix a pair of tests in phy_dll_bypass_set() that used incorrect units
for the DDR frequency, causing the DRAM controller to be misconfigured
in most cases.
Signed-off-by: Simon South
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/ram/rockch
Hi Qu and Mani,
This patch has already on the mater, you can try with master code and
use idbloader.img
directly.
Thanks,
- Kever
On 2019/10/6 上午9:30, Qu Wenruo wrote:
On 2019/10/6 上午9:05, Qu Wenruo wrote:
On 2019/7/16 下午7:56, Jagan Teki wrote:
This is next revison of lpddr4 support
The phandlep pointer returning the phandle to the caller is optional
and if it is not set when calling fdtdec_add_reserved_memory() it is
highly likely that the caller is not interested in a phandle to the
created reserved-memory area and really just wants that area added.
So just don't create a p
The loading convention for optee or any other tee on arm64 is as bl32
parameter to the trusted-firmware. So TF-A gets invoked with the TEE as
bl32 and main u-boot as bl33. Once it has done its startup TF-A jumps
into the bl32 for the TEE startup, returns to TF-A and then jumps to bl33.
All of them
The change adding fdtdec_add_reserved_memory() already protected the added
phandle against the phandlep being NULL - making the phandlep var optional.
But in the early code checking for an already existing carveout this check
was not done and thus the phandle assignment could run into trouble,
so
On Mon, Oct 07, 2019 at 06:45:08PM +0200, Heinrich Schuchardt wrote:
> On 10/7/19 5:43 PM, Tom Rini wrote:
> >On Mon, Oct 07, 2019 at 02:02:26PM +0900, AKASHI Takahiro wrote:
> >>On Sun, Oct 06, 2019 at 09:42:30PM -0400, Tom Rini wrote:
> >>>On Mon, Oct 07, 2019 at 09:47:46AM +0900, AKASHI Takahiro
On Mon, Oct 07, 2019 at 07:56:35PM +0200, Wolfgang Denk wrote:
> Dear Patrick,
>
> In message <20191003072428.19197-1-patrick.delau...@st.com> you wrote:
> >
> > This patchset follow
> > http://patchwork.ozlabs.org/project/uboot/list/?series=131268&state=*
> >
> > It follow the first proposal
>
We may not always be able to write to the default output directory so
have a temporary directory for our output be created.
Cc: Simon Glass
Cc: Stephen Warren
Suggested-by: Stephen Warren
Signed-off-by: Tom Rini
---
Changes in v2:
Switch to using a dynamic tmp dir, per Stephen.
---
tools/buil
On Mon, Oct 07, 2019 at 07:10:50PM +0300, Eugeniy Paltsev wrote:
> The commit
> 642b80d256e ("net: designware: drop compatible altr, socfpga-stmmac")
> breaks designware ethernet for all ARC boards. It removes
> "altr, socfpga-stmmac" compatible from "drivers/net/designware.c"
> without changing c
Hey all,
It's release day and while we've once again had some last minute
regression fixes, I feel things are as stable as they are likely to get
so I've tagged and released v2019.07 and I would like to thank all of
our contributor for their efforts.
To repeat something I posted about in the prev
hello,
as i was porting altera_tse driver to my customize board(which is very
similar to the arria 5)
i tried to check everything works correctly, but it seemed like i only got
one packet every run.
so i learned a little more about it and i understood there is a need to
write a descriptor every tim
Hi Stefano,
Le 07/10/2019 à 21:58, Stefano Babic a écrit :
Hi Pierre-Jen,
On 07/10/19 20:44, Pierre-Jean Texier wrote:
Stefano, Peng,
I just compiled a fresh U-Boot with u-boot-imx/next and It looks
like commit 34f2feb ("imx: mmc_env: update runtime SD/MMC boot env
device") [1]
breaks my WaRP
Hi Pierre-Jen,
On 07/10/19 20:44, Pierre-Jean Texier wrote:
> Stefano, Peng,
>
> I just compiled a fresh U-Boot with u-boot-imx/next and It looks
> like commit 34f2feb ("imx: mmc_env: update runtime SD/MMC boot env
> device") [1]
> breaks my WaRP7 (but the same for the Pico-Pi i.MX7, tested by Jo
Stefano, Peng,
I just compiled a fresh U-Boot with u-boot-imx/next and It looks
like commit 34f2feb ("imx: mmc_env: update runtime SD/MMC boot env
device") [1]
breaks my WaRP7 (but the same for the Pico-Pi i.MX7, tested by Joris in
CC),
see logs after:
U-Boot 2019.10-rc4-00232-gd03193d (Oct 0
On Mon, Aug 26, 2019 at 11:28 PM Peng Fan wrote:
>
> diff --git a/board/freescale/imx8mm_evk/README
> b/board/freescale/imx8mm_evk/README
> new file mode 100644
> index 00..a885bc5c97
> --- /dev/null
> +++ b/board/freescale/imx8mm_evk/README
Hi Peng,
I'm working with an IMX8MM with U-B
Dear Patrick,
In message <20191003072428.19197-1-patrick.delau...@st.com> you wrote:
>
> This patchset follow
> http://patchwork.ozlabs.org/project/uboot/list/?series=131268&state=*
>
> It follow the first proposal
> http://patchwork.ozlabs.org/project/uboot/list/?series=129339
> "env: Add
On 10/7/19 3:29 PM, Yannick Fertré wrote:
If the size of the bitmap is bigger than the size of
the panel then errors appear when calculating axis alignment
and the copy of bitmap is done outside of framebuffer.
Signed-off-by: Yannick Fertré
---
drivers/video/video_bmp.c | 7 +++
1 file c
On 10/7/19 5:43 PM, Tom Rini wrote:
On Mon, Oct 07, 2019 at 02:02:26PM +0900, AKASHI Takahiro wrote:
On Sun, Oct 06, 2019 at 09:42:30PM -0400, Tom Rini wrote:
On Mon, Oct 07, 2019 at 09:47:46AM +0900, AKASHI Takahiro wrote:
On Sat, Oct 05, 2019 at 08:53:39AM +0200, Heinrich Schuchardt wrote:
The commit
642b80d256e ("net: designware: drop compatible altr, socfpga-stmmac")
breaks designware ethernet for all ARC boards. It removes
"altr, socfpga-stmmac" compatible from "drivers/net/designware.c"
without changing compatible in the boards which use it.
Fix that by adding "snps,arc-dwmac-3.
Hi Parthiban,
On 23/08/19 18:19, Parthiban Nallathambi wrote:
> Firmware Configuration Block(FCB) for imx6ul(l) needs to be
> BCH encoded. This patch depends on [1].
>
> [1]: https://patchwork.ozlabs.org/project/uboot/list/?series=113810
>
Why does it depend on this if it is just defoconfig for
On Mon, Oct 07, 2019 at 11:43:07AM +0200, Jean-Jacques Hiblot wrote:
>
> On 06/10/2019 19:12, Tom Rini wrote:
> > On Sun, Oct 06, 2019 at 04:57:29PM +, Auer, Lukas wrote:
> > > Hi Jean-Jacques,
> > >
> > > On Fri, 2019-09-20 at 17:28 +0200, Jean-Jacques Hiblot wrote:
> > > > To reduce the com
On 07/10/19 17:41, Joris Offouga wrote:
> Hi Stefano,
>
> I try to build pico-pi_imx7d_defconfig in your next branch but build
> failed. You apply my series but V1 version not V2.
I have already found it, I guess it came when I pull Otavio's (but I am
not sure). I fixed and Technexion's board ar
On Mon, Oct 07, 2019 at 02:02:26PM +0900, AKASHI Takahiro wrote:
> On Sun, Oct 06, 2019 at 09:42:30PM -0400, Tom Rini wrote:
> > On Mon, Oct 07, 2019 at 09:47:46AM +0900, AKASHI Takahiro wrote:
> > > On Sat, Oct 05, 2019 at 08:53:39AM +0200, Heinrich Schuchardt wrote:
> > > > On 10/4/19 3:20 AM, AK
Hi Stefano,
I try to build pico-pi_imx7d_defconfig in your next branch but build
failed. You apply my series but V1 version not V2.
See patchwork:
https://patchwork.ozlabs.org/project/uboot/list/?series=132098
Best regards,
Joris Offouga
___
U-
Ok pour moi
On 10/7/19 3:29 PM, Yannick Fertré wrote:
> Version 1:
> - Initial commit.
>
> Version 2:
> - swap patches to avoid compilation issue.
> - remove panel timings from device tree.
>
> Version 3:
> - Share same include file mipi_display.h with kernel linux.
> - Rework ltdc driver with las
On Mon, 2019-10-07 at 07:49 -0700, Dalon L Westergreen wrote:
> On Mon, 2019-10-07 at 16:06 +0200, Marek Vasut wrote:
> > On 10/7/19 4:03 PM, Dalon L Westergreen wrote:
> > > On Sat, 2019-10-05 at 16:23 -0700, Dalon L Westergreen wrote:
> > > > On Sat, 2019-10-05 at 01:47 +0200, Marek Vasut wrote:
On Mon, 2019-10-07 at 16:06 +0200, Marek Vasut wrote:
> On 10/7/19 4:03 PM, Dalon L Westergreen wrote:
> > On Sat, 2019-10-05 at 16:23 -0700, Dalon L Westergreen wrote:
> > > On Sat, 2019-10-05 at 01:47 +0200, Marek Vasut wrote:
> > > > On 10/5/19 12:30 AM, Dalon Westergreen wrote:
> > > > > From:
Hi Vignesh,
I've tested your "[U-Boot,RFT,v2,0/3] spi-nor: spi-nor-ids: Fix 4 Byte
addressing " series
applies on the latest master (879396a2405).
'axs103_defconfig' was used without changes.
Probe/read/write/erase work for n25q512ax3.
Lock/unlock don't work, so here is debug log:
(I've tried t
There's something wrong with your mailer: indentation of replies doesn't seem
to work. It gets kind of hard to read who wrote what...
On Mon, Oct 7, 2019 at 4:34 PM Dalon L Westergreen
wrote:
>
> On Sun, 2019-10-06 at 20:05 +0200, Simon Goldschmidt wrote:
>
> Am 06.10.2019 um 19:44 schrieb Dalon
On Mon, Oct 07, 2019 at 10:23:32PM +0800, Bin Meng wrote:
> Hi Tom,
>
> On Mon, Oct 7, 2019 at 10:15 PM Tom Rini wrote:
> >
> > On Sun, Oct 06, 2019 at 11:13:21PM +0200, Heinrich Schuchardt wrote:
> >
> > > The following changes since commit
> > > dac51e9aaf6fd38298007b266feb6a80e9ec91ee:
> > >
Hi Simon,
On Wed, Oct 2, 2019 at 8:34 PM Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Oct 2, 2019 at 10:15 AM Simon Glass wrote:
> >
> > Hi Bin,
> >
> > On Wed, 25 Sep 2019 at 08:58, Simon Glass wrote:
> > >
> > > Apollolake is an Intel SoC generation aimed at relatively low-end embedded
> > > sys
On Sun, 2019-10-06 at 20:05 +0200, Simon Goldschmidt wrote:
> Am 06.10.2019 um 19:44 schrieb Dalon L Westergreen:
> > On Sun, 2019-10-06 at 15:44 +0200, Marek Vasut wrote:
> > > On 10/6/19 1:19 AM, Dalon L Westergreen wrote:
> > > > On Sat, 2019-10-05 at 01:51 +0200, Marek Vasut wrote:
> > > > > On
Hi Tom,
On Mon, Oct 7, 2019 at 10:15 PM Tom Rini wrote:
>
> On Sun, Oct 06, 2019 at 11:13:21PM +0200, Heinrich Schuchardt wrote:
>
> > The following changes since commit dac51e9aaf6fd38298007b266feb6a80e9ec91ee:
> >
> > Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-10-05
> > 20:06:
On Sun, Oct 06, 2019 at 11:13:21PM +0200, Heinrich Schuchardt wrote:
> The following changes since commit dac51e9aaf6fd38298007b266feb6a80e9ec91ee:
>
> Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-10-05
> 20:06:58 -0400)
>
> are available in the Git repository at:
>
> https://
On Mon, Oct 7, 2019 at 9:53 PM Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> >
> > With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init
> > happens in TPL. Enable this, using a variable to try to make the
> > conditions more palatable.
> >
> > Signed-off
On Mon, Oct 7, 2019 at 9:53 PM Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> >
> > Normally U-Boot handles MTRRs through an add/commit process which
> > overwrites all MTRRs. But in very early boot it is not desirable to clear
> > the existing MTRRs since they may be i
On Mon, Oct 7, 2019 at 9:53 PM Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> >
> > We don't need this driver very early in boot and it adds code size. Drop
> > it.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > arch/x86/cpu/Makefile | 5 -
> > 1 file changed,
On Mon, Oct 7, 2019 at 9:53 PM Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> >
> > Move the code that actually sets up the MTRR into another function so it
> > can be used elsewhere in the file.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > arch/x86/cpu/mtrr.c |
On 10/7/19 4:03 PM, Dalon L Westergreen wrote:
> On Sat, 2019-10-05 at 16:23 -0700, Dalon L Westergreen wrote:
>> On Sat, 2019-10-05 at 01:47 +0200, Marek Vasut wrote:
>>> On 10/5/19 12:30 AM, Dalon Westergreen wrote:
From: Dalon Westergreen Sync devicetree from
5.2 kernel.
>>>
>>> Linux
On Mon, Oct 7, 2019 at 3:38 PM Dalon L Westergreen
wrote:
>
> On Sat, 2019-10-05 at 01:49 +0200, Marek Vasut wrote:
>
> On 10/5/19 12:30 AM, Dalon Westergreen wrote:
>
> From: Dalon Westergreen <
>
> dalon.westergr...@intel.com
>
> >
>
>
> Add a common u-boot devicetree include file for the SocFPG
On Sat, 2019-10-05 at 16:23 -0700, Dalon L Westergreen wrote:
> On Sat, 2019-10-05 at 01:47 +0200, Marek Vasut wrote:
> > On 10/5/19 12:30 AM, Dalon Westergreen wrote:
> > > From: Dalon Westergreen Sync devicetree from
> > > 5.2 kernel.
> >
> > Linux 5.3 was already released, can you update this ?
Add DT binding documentation for DDR sub system present on J721E device.
Signed-off-by: Lokesh Vutla
---
.../memory-controller/k3-j721e-ddrss.txt | 2241 +
1 file changed, 2241 insertions(+)
create mode 100644
doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt
In SPL, DDR should be made available by the end of board_init_f()
so that apis in board_init_r() can use ddr. Adding support for
triggering DDR initialization from board_init_f().
Signed-off-by: Lokesh Vutla
---
arch/arm/mach-k3/j721e_init.c | 8 +++-
board/ti/j721e/Kconfig| 1 +
2 f
This series adds support for J721E ddr controller and adds DT node
for supporting it on J721E devices.
Kevin Scholz (1):
ram: k3-j721e: Add support for J721E DDR controller
Lokesh Vutla (3):
dt-bindings: memory-controller: Introduce J721E DDRSS bindings
arm: dts: k3-j721e: Add ddr node
ar
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
>
> We don't need this driver very early in boot and it adds code size. Drop
> it.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/Makefile | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
Reviewed-by: Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
>
> Early in boot it is necessary to decode the PCI device/function values for
> particular peripherals in the device tree or of-platdata. Add functions to
> handle this.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/pci.c | 18
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
>
> With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init
> happens in TPL. Enable this, using a variable to try to make the
> conditions more palatable.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/lib/init_helpers.c | 22 ++
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
>
> Normally U-Boot handles MTRRs through an add/commit process which
> overwrites all MTRRs. But in very early boot it is not desirable to clear
> the existing MTRRs since they may be in use and it can cause a hang.
>
> Add a new mtrr_set_next_v
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
>
> Move the code that actually sets up the MTRR into another function so it
> can be used elsewhere in the file.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/mtrr.c | 19 ---
> 1 file changed, 12 insertions(+), 7 delet
On Sat, 2019-10-05 at 01:49 +0200, Marek Vasut wrote:
> On 10/5/19 12:30 AM, Dalon Westergreen wrote:
> > From: Dalon Westergreen
> > Add a common u-boot devicetree include file for the SocFPGAArria10 device.
>
> Isn't arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi doing basicallythe same
> thi
Enable the display controller, mipi dsi bridge & panel.
Set panel display timings.
Signed-off-by: Yannick Fertré
---
arch/arm/dts/stm32f769-disco-u-boot.dtsi | 62
1 file changed, 62 insertions(+)
diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi
b/arch/arm
Update video configs to support bitmap 16bpp, 24bpp,
32bpp & RLE8.
Signed-off-by: Yannick Fertré
---
include/configs/stm32mp1.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h
index 92660fe..988992b 100644
--- a/include/configs/s
Support for Raydium RM68200 720p dsi 2dl video mode panel.
This rm68200 panel driver is based on the Linux Kernel driver from
drivers/gpu/drm/panel/panel-raydium-rm68200.c.
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig | 9 ++
drivers/video/Makefile | 1 +
driver
Signed-off-by: Yannick Fertré
---
configs/stm32f769-disco_defconfig | 63 +++
1 file changed, 63 insertions(+)
create mode 100644 configs/stm32f769-disco_defconfig
diff --git a/configs/stm32f769-disco_defconfig
b/configs/stm32f769-disco_defconfig
new file mo
Add support of panels otm8009A, RM68200 & DSI controller.
Limit resolution to 1280x800.
Signed-off-by: Yannick Fertré
---
configs/stm32mp15_basic_defconfig | 6 ++
configs/stm32mp15_optee_defconfig | 6 ++
configs/stm32mp15_trusted_defconfig | 6 ++
3 files changed, 18 insertions
The new class dsi host allows the management of the bridge DPI to DSI.
This bridge is embedded in the chipset mp1 (come from synopsys company).
Signed-off-by: Yannick Fertré
---
arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/stm32mp
The new class dsi host allows the management of the bridge DPI to DSI.
This bridge is embedded in the chipset mp1 (come from synopsys company).
Signed-off-by: Yannick Fertré
---
arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/stm32
Add a Synopsys Designware MIPI DSI host bridge driver, based on the
Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig | 10 +
drivers/video/Makefile | 1 +
drivers/video/dw_mipi_dsi.c | 838 +
Hi Simon,
On 28/09/2019 01:28, s...@google.com wrote:
> From: Matthias Brugger
>
> Add internal fdt_cells() to avoid copy and paste. Fix typo in
> fdt_size_cells() documentation comment.
>
> This is based in upstream commit:
> c12b2b0 ("libfdt: fdt_address_cells() and fdt_size_cells()")
> but m
Add the STM32 DSI controller driver that uses the Synopsys DesignWare
MIPI DSI host controller bridge.
Signed-off-by: Yannick Fertré
---
drivers/video/stm32/Kconfig | 9 +
drivers/video/stm32/Makefile| 1 +
drivers/video/stm32/stm32_dsi.c | 490 +++
Display Serial Interface (DSI) host can usefully be modelled
as their own uclass.
DSI defines a serial bus and a communication protocol
between the host and the device (panel, bridge).
Signed-off-by: Yannick Fertré
---
arch/sandbox/dts/sandbox.dts | 6 ++-
configs/sandbox_defconfig|
Mipi_display.c contains a set of dsi helpers.
This file is a copy of file drm_mipi_dsi.c (linux kernel).
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig| 8 +
drivers/video/Makefile | 1 +
drivers/video/mipi_dsi.c | 828 +++
include/m
Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig | 9 +
drivers/video/Makefile | 1 +
drivers/video/orisetech_otm8009a.c | 379 +
3 files changed, 389 insertions
Adding new DCS commands which are specified in the
DCS 1.3 spec related to CABC.
Signed-off-by: Yannick Fertré
---
include/mipi_display.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/mipi_display.h b/include/mipi_display.h
index ddcc8ca..19aa65a 100644
--- a/include/mipi_d
Manage a bridge insert between the display controller & a panel.
Signed-off-by: Yannick Fertré
---
drivers/video/stm32/stm32_ltdc.c | 143 +++
1 file changed, 83 insertions(+), 60 deletions(-)
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm3
If the size of the bitmap is bigger than the size of
the panel then errors appear when calculating axis alignment
and the copy of bitmap is done outside of framebuffer.
Signed-off-by: Yannick Fertré
---
drivers/video/video_bmp.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/
Version 1:
- Initial commit.
Version 2:
- swap patches to avoid compilation issue.
- remove panel timings from device tree.
Version 3:
- Share same include file mipi_display.h with kernel linux.
- Rework ltdc driver with last comments of Anatolij Gustshin.
- Check ordering (file dw_mipi_dsi.c).
-
On Mon, Oct 7, 2019 at 8:32 AM Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> >
> > At present these uclasses assumes that they are used with a device tree.
> > Update them to support of-platdata as well.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > arch/x86/lib
On Mon, Oct 7, 2019 at 12:09 AM Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> >
> > Some MSR registers are defined twice in different parts of the file. Move
> > them together and remove the duplicates. Also drop some thermal defines
> > which are not used.
> >
> > Sig
On Mon, Oct 7, 2019 at 8:32 AM Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> >
> > The code in swapcase can be used by other sandbox drivers. Move it into a
> > common place to allow this.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > arch/sandbox/include/asm/te
On Mon, Oct 7, 2019 at 12:15 AM Bin Meng wrote:
>
> On Mon, Oct 7, 2019 at 12:09 AM Bin Meng wrote:
> >
> > On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> > >
> > > These functions are the same on modern Intel CPUs, so use common code to
> > > set them.
> > >
> > > Signed-off-by: Simon Gl
On Mon, Oct 7, 2019 at 8:32 AM Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> >
> > Add a few more CPU functions that are common on Intel CPUs. Also add
> > attribution for the code source.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > arch/x86/cpu/intel_common/c
On Mon, Oct 7, 2019 at 12:08 AM Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> >
> > Remove the duplicate definition as it is not needed.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > arch/x86/cpu/broadwell/cpu.c | 2 +-
> > arch/x86/cpu/broadwell/cpu_full.c
On Mon, Oct 7, 2019 at 8:32 AM Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> >
> > This function ise effectively replaced by ofnode_read_pci_addr() which
> > works with flat tree. Delete it to avoid code duplication.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> >
On Mon, Oct 7, 2019 at 12:09 AM Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> >
> > Modern Intel CPUs use a standard bus clock value of 100MHz, so put this in
> > a common file and tidy up the copies.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > arch/x86/cpu/br
On Mon, Oct 7, 2019 at 12:08 AM Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> >
> > This code appears in a few places, so move it to a common file.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > arch/x86/cpu/broadwell/cpu_full.c| 20 +---
> >
On Mon, Oct 7, 2019 at 8:24 PM Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> >
> > This parameter is needed by the PCI driver-mode interface but is always
> > NULL on x86. There are a number of calls to this function so it makes
> > sense to minimise the parameters.
>
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
>
> This parameter is needed by the PCI driver-mode interface but is always
> NULL on x86. There are a number of calls to this function so it makes
> sense to minimise the parameters.
>
> Adjust the x86 function to omit the first parameter, and i
This choice is not about SPL for which we have a separate choice.
Fixes: 95f4bbd581 ("lib: fdt: Allow LZO and GZIP DT compression in U-Boot")
Cc: Marek Vasut
Signed-off-by: Baruch Siach
---
dts/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dts/Kconfig b/dts/Kconfig
On 06/10/2019 19:12, Tom Rini wrote:
On Sun, Oct 06, 2019 at 04:57:29PM +, Auer, Lukas wrote:
Hi Jean-Jacques,
On Fri, 2019-09-20 at 17:28 +0200, Jean-Jacques Hiblot wrote:
To reduce the complexity of the Makefile, let the generator tell what its
dependencies are. For this purpose use the
From: James Doublesin
Added training support for LPDDR4 and DDR3L DDRs. Also added/changed
some register configuration to support all 3 DDR types
Signed-off-by: James Doublesin
Signed-off-by: Lokesh Vutla
---
drivers/ram/k3-am654-ddrss.c | 241 +--
1 file chan
From: James Doublesin
Added the following registers to the DDR configuration:
- ACIOCR0,
- ACIOCR3,
- V2H_CTL_REG,
- DX8SLxDQSCTL.
Modified enable_dqs_pd and disable_dqs_pd to only touch the associated
bit fields for pullup and pulldown registers (to preserve slew rate and
other bits in that sam
From: James Doublesin
The current configuration of DDR on AM654 base board is for 1600MTs but
the file name is specified as k3-am654-base-board-ddr4-1600MHz.dtsi.
Since 1600MHz is misleading, rename it to
k3-am654-base-board-ddr4-1600MTs.dtsi
Signed-off-by: James Doublesin
Signed-off-by: Lokesh
This series adds support for LPDDR4 and DDR3L ddrs for k3-am654 and
minor updates to driver.
James Doublesin (3):
armv7r: dts: am654-base-board: Rename 1600MHz to 1600MTs in dtsi
filename
ram: k3-am654: add support for LPDDR4 and DDR3L DDRs
ram: k3-am654: Do not rely on default values fo
U-Boot cleans and invalidate L1 and L2 caches before jumping to Linux
by set/way in cleanup_before_linux(). Additionally there is a custom
hook provided to clean and invalidate L3 cache.
Unfortunately on K3 devices(having a coherent architecture), there is no
easy way to quickly clean all the cach
Store the start and end of the OS image that is loaded in images
structure.
Signed-off-by: Lokesh Vutla
---
cmd/booti.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/cmd/booti.c b/cmd/booti.c
index c36b0235df..841eff10d1 100644
--- a/cmd/booti.c
+++ b/cmd/booti.c
@@ -48,6 +48,9 @@ stati
Once the arch specific boot_prepare_linux completes, boards wants to
have a custom preparation for linux. Add support for a custom
board_prep_linux.
Signed-off-by: Lokesh Vutla
---
- This is similar to hook available in arch/arc/
https://gitlab.denx.de/u-boot/u-boot/blob/master/arch/arc/lib/bootm
This series make sure that on K3 devices, Linux image is completely written
to DDR from L3 and then control is given to Linux from U-Boot.
Lokesh Vutla (3):
boot: arm: Enable support for custom board_prep_linux
cmd: booti: Store OS start and end info in images structure
arm: K3: Clean and in
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